source: trunk/platforms/caba-ring-ccxcachev4_memcachev4-mips32el/segmentation.h @ 337

Last change on this file since 337 was 140, checked in by kane, 14 years ago

yAjout du multi_cache : plusieurs processeur peuvent ce partager le même cache L1.
2 remarques, (1) deux nouveaux paramètres : nb_cpu, nb_cache. Pour avoir un cache dont le comportement est identique à la version d'avant, mettre ces paramètres à 1.
(2) le port d'interruption est maintenant un tableau dépendant du nombre de processeur.
Voir le fichier "platforms/caba-ring-ccxcachev4_memcachev4-mips32el/top.cpp" pour plus de détails.

--Cette ligne, et les suivantes ci-dessous, seront ignorées--

M platforms/tsarv4_dspin_generic_32/tsarv4_dspin_generic_32_top.cpp
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/segmentation.h
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/top.cpp
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/configuration/default.cfg
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/configuration/gen_config.sh
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/dhrystone/dhry21a.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/define.h
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/matrix_multiplication/matrix_multiplication.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/common/common.c
A platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/self_code_modifying
A platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/self_code_modifying/self_code_modifying.c
A platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/self_code_modifying/self_code_modifying.h
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark.h
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark_sort.c
A platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark_self_code_modifying.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark_matrix_multiplication.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/Makefile
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/Makefile
M platforms/tsarv4_vgmn_generic_32/tsarv4_vgmn_generic_32_top.cpp
M modules/vci_cc_xcache_wrapper_v4/caba/source/include/vci_cc_xcache_wrapper_v4.h
M modules/vci_cc_xcache_wrapper_v4/caba/source/src/vci_cc_xcache_wrapper_v4.cpp
M modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h
M modules/vci_mem_cache_v4/caba/source/include/mem_cache_directory_v4.h
M modules/vci_mem_cache_v4/caba/source/src/vci_mem_cache_v4.cpp
  • Property svn:executable set to *
File size: 1.7 KB
Line 
1
2/////////////////////////////////////////////////////////////////
3//      ADDRESS SPACE SEGMENTATION
4//
5//      This file must be included in the system.cpp file,
6//      for harware configuration : It is used to build
7//      the SOCLIB_SEGMENT_TABLE.
8//
9//      This file can also be used by the ldscript generator,
10//      for embedded software generation.
11//     
12//      It gives the system integrator the garanty
13//      that hardware and software have the same
14//      description of the address space segmentation.
15/////////////////////////////////////////////////////////////////
16
17/////////////////////////////////////////////////////////////////
18//      reset, and exception segments
19//      base address required by MIPS processor
20/////////////////////////////////////////////////////////////////
21#define RESET_BASE      0xBFC00000
22#define RESET_SIZE      0x00010000
23
24#define EXCEP_BASE      0x80000000
25#define EXCEP_SIZE      0x00010000
26
27#define TEXT_BASE       0x00400000
28#define TEXT_SIZE       0x00050000
29
30/////////////////////////////////////////////////////////////////
31//      global data segment (initialised)
32/////////////////////////////////////////////////////////////////
33
34#define MC_M_BASE       0x10000000
35#define MC_M_SIZE       0x000F0000
36
37#define MC_R_BASE       0x20200000
38#define MC_R_SIZE       0x00000008
39
40#define MC_U_BASE       0x30000000
41#define MC_U_SIZE       0x000F0000
42
43//////////////////////////////////////////////////////////
44//      System devices
45///////////////////////////////////////////////////////////
46
47#define TTY_BASE        0xC0200000
48#define TTY_SIZE        0x00000100
49
50#define XICU_BASE       0xD0200000
51#define XICU_SIZE       0x00000100
52
53#define SIMHELPER_BASE  0xF0200000
54#define SIMHELPER_SIZE  0x00000100
55
56#define C_PROC_BASE     0x01200000
57#define C_PROC_SIZE     0x00000010
58#define C_PROC_SPAN     0x01000000
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