Last change
on this file since 358 was
140,
checked in by kane, 14 years ago
|
yAjout du multi_cache : plusieurs processeur peuvent ce partager le même cache L1.
2 remarques, (1) deux nouveaux paramètres : nb_cpu, nb_cache. Pour avoir un cache dont le comportement est identique à la version d'avant, mettre ces paramètres à 1.
(2) le port d'interruption est maintenant un tableau dépendant du nombre de processeur.
Voir le fichier "platforms/caba-ring-ccxcachev4_memcachev4-mips32el/top.cpp" pour plus de détails.
--Cette ligne, et les suivantes ci-dessous, seront ignorées--
M platforms/tsarv4_dspin_generic_32/tsarv4_dspin_generic_32_top.cpp
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/segmentation.h
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/top.cpp
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/configuration/default.cfg
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/configuration/gen_config.sh
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/dhrystone/dhry21a.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/define.h
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/matrix_multiplication/matrix_multiplication.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/common/common.c
A platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/self_code_modifying
A platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/self_code_modifying/self_code_modifying.c
A platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/self_code_modifying/self_code_modifying.h
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark.h
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark_sort.c
A platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark_self_code_modifying.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/benchmark/benchmark_matrix_multiplication.c
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/soft/Makefile
M platforms/caba-ring-ccxcachev4_memcachev4-mips32el/Makefile
M platforms/tsarv4_vgmn_generic_32/tsarv4_vgmn_generic_32_top.cpp
M modules/vci_cc_xcache_wrapper_v4/caba/source/include/vci_cc_xcache_wrapper_v4.h
M modules/vci_cc_xcache_wrapper_v4/caba/source/src/vci_cc_xcache_wrapper_v4.cpp
M modules/vci_mem_cache_v4/caba/source/include/vci_mem_cache_v4.h
M modules/vci_mem_cache_v4/caba/source/include/mem_cache_directory_v4.h
M modules/vci_mem_cache_v4/caba/source/src/vci_mem_cache_v4.cpp
|
File size:
1.3 KB
|
Rev | Line | |
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[134] | 1 | #include "matrix_multiplication.h" |
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| 2 | #include "stdio.h" |
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| 3 | #include "system.h" |
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[140] | 4 | #include "stdint.h" |
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[134] | 5 | |
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| 6 | void matrix_multiplication_st (int ** a, |
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| 7 | int ** b, |
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| 8 | int ** d, |
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| 9 | unsigned int n) |
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| 10 | { |
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[140] | 11 | uint32_t x, y; |
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[134] | 12 | |
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| 13 | for (x=0; x<n; ++x) |
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| 14 | { |
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| 15 | printf("%d, ",x); |
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| 16 | |
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| 17 | for (y=0; y<n; ++y) |
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| 18 | { |
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[140] | 19 | uint32_t i; |
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[134] | 20 | |
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| 21 | int tmp = 0; |
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| 22 | for (i=0; i<n; ++i) |
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| 23 | tmp += a[x][i] * b[i][y]; |
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| 24 | d[x][y] = tmp; |
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| 25 | } |
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| 26 | } |
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| 27 | |
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| 28 | printf("finish\n"); |
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| 29 | } |
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| 30 | |
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[140] | 31 | static uint32_t lock; |
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| 32 | static uint32_t next; |
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[134] | 33 | |
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| 34 | void matrix_multiplication_mt (int ** a, |
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| 35 | int ** b, |
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| 36 | int ** d, |
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| 37 | unsigned int n, |
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| 38 | int lock_by_line) |
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| 39 | { |
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[140] | 40 | uint32_t x, y; |
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[134] | 41 | |
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| 42 | while (1) |
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| 43 | { |
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| 44 | lock_lock(&lock); |
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| 45 | |
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| 46 | x=next++; |
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| 47 | |
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| 48 | lock_unlock(&lock); |
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| 49 | |
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| 50 | if (x >= n) |
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| 51 | break; |
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| 52 | |
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| 53 | printf("%d, ",x); |
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| 54 | for (y=0; y<n; ++y) |
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| 55 | { |
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| 56 | int line =(lock_by_line)?x:y; |
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| 57 | int column=(lock_by_line)?y:x; |
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| 58 | |
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| 59 | int i; |
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| 60 | int tmp = 0; |
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| 61 | for (i=0; i<n; ++i) |
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| 62 | tmp += a[column][i] * b[i][line]; |
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| 63 | d[column][line] = tmp; |
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| 64 | } |
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| 65 | } |
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| 66 | |
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| 67 | printf("finish\n"); |
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| 68 | } |
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