source: trunk/platforms/caba-ring-memcache-mipsel/segmentation.h @ 38

Last change on this file since 38 was 3, checked in by nipo, 15 years ago

Import platforms

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File size: 1.7 KB
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1
2/////////////////////////////////////////////////////////////////
3//      ADDRESS SPACE SEGMENTATION
4//
5//      This file must be included in the system.cpp file,
6//      for harware configuration : It is used to build
7//      the SOCLIB_SEGMENT_TABLE.
8//
9//      This file can also be used by the ldscript generator,
10//      for embedded software generation.
11//     
12//      It gives the system integrator the garanty
13//      that hardware and software have the same
14//      description of the address space segmentation.
15/////////////////////////////////////////////////////////////////
16
17/////////////////////////////////////////////////////////////////
18//      reset, and exception segments
19//      base address required by MIPS processor
20/////////////////////////////////////////////////////////////////
21
22#define RESET_BASE      0xBFC00000
23#define RESET_SIZE      0x00010000
24
25#define EXCEP_BASE      0x80000080
26#define EXCEP_SIZE      0x00010000
27
28/////////////////////////////////////////////////////////////////
29//      global data segment (initialised)
30/////////////////////////////////////////////////////////////////
31
32#define MC_M_BASE       0x10000000
33#define MC_M_SIZE       0x00400000
34
35//////////////////////////////////////////////////////////
36//      System devices (seen by the software)
37///////////////////////////////////////////////////////////
38
39#define TTY_BASE        0xC0200000
40#define TTY_SIZE        0x00000100
41
42#define TIMER_BASE      0xD0200000
43#define TIMER_SIZE      0x00000100
44
45#define LOCKS_BASE      0xE0200000
46#define LOCKS_SIZE      0x00000100
47
48#define PROC0_BASE      0xF0200000
49#define PROC1_BASE      0xF1200000
50#define PROC2_BASE      0xF2200000
51#define PROC3_BASE      0xF3200000
52
53#define PROC_SIZE       0x00000008
54
55#define XRAM_BASE       0xB0200000
56#define XRAM_SIZE       0x00000008
57
58#define MC_R_BASE       0x20200000
59#define MC_R_SIZE       0x00000008
60
61#define CLEANUP_OFFSET  0x20200000
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