| 1 | |
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| 2 | #include <stdint.h> |
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| 3 | #include <systemc> |
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| 4 | #include <sys/time.h> |
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| 5 | #include <iostream> |
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| 6 | #include <cstdlib> |
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| 7 | #include <cstdarg> |
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| 8 | |
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| 9 | #include "arithmetics.h" |
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| 10 | #include "mapping_table.h" |
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| 11 | #include "alloc_elems.h" |
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| 12 | #include "vci_simple_ram.h" |
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| 13 | #include "vci_local_ring_fast.h" |
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| 14 | #include "virtual_dspin_router.h" |
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| 15 | #include "vci_synthetic_initiator.h" |
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| 16 | |
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| 17 | // MESH SIZE |
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| 18 | #define X_MAX 2 |
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| 19 | #define Y_MAX 2 |
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| 20 | #define N_CLUSTERS X_MAX*Y_MAX |
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| 21 | // FLIT_WIDTH |
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| 22 | #define WIDTH_CMD 40 |
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| 23 | #define WIDTH_RSP 33 |
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| 24 | // Face of each DSPIN Router |
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| 25 | #define NORTH 0 |
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| 26 | #define SOUTH 1 |
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| 27 | #define EAST 2 |
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| 28 | #define WEST 3 |
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| 29 | #define LOCAL 4 |
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| 30 | // VCI parameters |
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| 31 | #define cell_width 4 |
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| 32 | #define plen_width 8 |
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| 33 | #define address_width 32 |
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| 34 | #define error_width 1 |
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| 35 | #define clen_width 1 |
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| 36 | #define rflag_width 1 |
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| 37 | #define srcid_width 11 |
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| 38 | #define pktid_width 4 |
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| 39 | #define trdid_width 4 |
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| 40 | #define wrplen_width 1 |
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| 41 | // Adress of targets |
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| 42 | #define TARGET_ADDR 0x00000000 |
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| 43 | #define TARGET_SIZE 0x400 |
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| 44 | |
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| 45 | |
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| 46 | int _main(int argc, char *argv[]) |
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| 47 | { |
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| 48 | using namespace sc_core; |
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| 49 | // Avoid repeating these everywhere |
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| 50 | using soclib::common::IntTab; |
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| 51 | using soclib::common::Segment; |
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| 52 | |
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| 53 | using soclib::common::uint32_log2; |
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| 54 | |
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| 55 | // Define VCI parameters |
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| 56 | typedef soclib::caba::VciParams<cell_width, |
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| 57 | plen_width, |
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| 58 | address_width, |
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| 59 | error_width, |
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| 60 | clen_width, |
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| 61 | rflag_width, |
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| 62 | srcid_width, |
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| 63 | pktid_width, |
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| 64 | trdid_width, |
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| 65 | wrplen_width> vci_param; |
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| 66 | |
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| 67 | //soclib::common::Loader loader(); |
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| 68 | // Mapping table primary network |
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| 69 | soclib::common::MappingTable maptab0(address_width, IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), |
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| 70 | IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), 0xFFC0000); |
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| 71 | soclib::common::MappingTable maptab1(address_width, IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), |
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| 72 | IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), 0xFFC0000); |
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| 73 | for(int i = 0 ; i < Y_MAX ; i++){ |
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| 74 | for(int j = 0 ; j < X_MAX ; j++){ |
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| 75 | std::ostringstream str0; |
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| 76 | std::ostringstream str1; |
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| 77 | str0 << "Target_c0_" << (i*Y_MAX+j) ; |
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| 78 | str1 << "Target_c1_" << (i*Y_MAX+j) ; |
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| 79 | maptab0.add(Segment(str0.str(), TARGET_ADDR + ((i*Y_MAX+j) << (address_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX))), TARGET_SIZE, IntTab((i*X_MAX+j),0), false)); |
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| 80 | maptab1.add(Segment(str1.str(), TARGET_ADDR + ((i*Y_MAX+j) << (address_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX))), TARGET_SIZE, IntTab((i*X_MAX+j),0), false)); |
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| 81 | } |
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| 82 | } |
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| 83 | |
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| 84 | |
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| 85 | std::cout << maptab0 << std::endl; |
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| 86 | // Signals |
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| 87 | |
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| 88 | sc_clock signal_clk("clk"); |
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| 89 | sc_signal<bool> signal_resetn("resetn"); |
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| 90 | |
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| 91 | soclib::caba::VciSignals<vci_param> ** signal_vci_ini_synth_c0 = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("signal_vci_ini_synth_c0", 2, N_CLUSTERS); |
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| 92 | soclib::caba::VciSignals<vci_param> ** signal_vci_ini_synth_c1 = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("signal_vci_ini_synth_c1", 2, N_CLUSTERS); |
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| 93 | /////////////////////////////////////////////////////////////// |
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| 94 | // VDSPIN Signals : one level for in and out, one level for X length in the mesh, |
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| 95 | // one level for Y length in the mesh, last level for each port of the router |
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| 96 | /////////////////////////////////////////////////////////////// |
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| 97 | soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_0", 2, Y_MAX, X_MAX, 5 ); |
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| 98 | soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_1", 2, Y_MAX, X_MAX, 5 ); |
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| 99 | soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_0", 2, Y_MAX, X_MAX, 5 ); |
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| 100 | soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_2", 2, Y_MAX, X_MAX, 5 ); |
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| 101 | |
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| 102 | //soclib::caba::VciSignals<vci_param> * signal_vci_tgt_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("signal_vci_tgt_proc", N_CLUSTERS); |
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| 103 | |
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| 104 | // N_CLUSTERS ring. |
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| 105 | soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> * local_ring_c0 = (soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> *) malloc(sizeof(soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> ) * N_CLUSTERS) ; |
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| 106 | soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> * local_ring_c1 = (soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> *) malloc(sizeof(soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> ) * N_CLUSTERS) ; |
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| 107 | for(int i = 0 ; i < N_CLUSTERS ; i++){ // ringid, fifo, fifo, nb_init, nb_tgt |
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| 108 | std::cout << "Passe " << i << " pour instanciation ring" << std::endl; |
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| 109 | std::ostringstream str0; |
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| 110 | std::ostringstream str1; |
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| 111 | str0 << "cluster_c0_" << i ; |
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| 112 | str1 << "cluster_c1_" << i ; |
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| 113 | new(&local_ring_c0[i]) soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> (str0.str().c_str(), |
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| 114 | maptab0, |
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| 115 | IntTab(i), |
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| 116 | 2, |
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| 117 | 18, |
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| 118 | 1, |
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| 119 | 1); |
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| 120 | new(&local_ring_c1[i]) soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> (str1.str().c_str(), |
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| 121 | maptab1, |
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| 122 | IntTab(i), |
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| 123 | 2, |
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| 124 | 18, |
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| 125 | 1, |
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| 126 | 1); |
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| 127 | } |
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| 128 | |
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| 129 | // Virtual dspin routers |
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| 130 | soclib::caba::VirtualDspinRouter<WIDTH_CMD> ** routers_cmd = (soclib::caba::VirtualDspinRouter<WIDTH_CMD> **) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_CMD> *) * X_MAX); |
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| 131 | soclib::caba::VirtualDspinRouter<WIDTH_RSP> ** routers_rsp = (soclib::caba::VirtualDspinRouter<WIDTH_RSP> **) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_RSP> *) * X_MAX); |
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| 132 | |
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| 133 | for(int i = 0; i < X_MAX; i++ ){ |
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| 134 | routers_cmd[i] = (soclib::caba::VirtualDspinRouter<WIDTH_CMD> * ) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_CMD>) * Y_MAX); |
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| 135 | routers_rsp[i] = (soclib::caba::VirtualDspinRouter<WIDTH_RSP> * ) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_RSP>) * Y_MAX); |
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| 136 | for(int j = 0; j < Y_MAX; j++){ |
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| 137 | std::cout << "Passe " << i << j << " pour instanciation vdspin" << std::endl; |
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| 138 | std::ostringstream str0; |
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| 139 | std::ostringstream str1; |
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| 140 | str0 << "VDspinRouterCMD" << i << j; |
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| 141 | str1 << "VDspinRouterRSP" << i << j; |
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| 142 | new(&routers_cmd[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_CMD> (str0.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), 4, 4); |
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| 143 | new(&routers_rsp[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_RSP> (str1.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), 4, 4); |
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| 144 | } |
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| 145 | } |
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| 146 | |
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| 147 | |
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| 148 | /////////////////////////////////////////////////////////////// |
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| 149 | // Components |
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| 150 | /////////////////////////////////////////////////////////////// |
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| 151 | |
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| 152 | // N_CLUSTERS VCI Synthetic Initiator (1 initiator per cluster/network) |
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| 153 | soclib::caba::VciSyntheticInitiator<vci_param> * initiator_c0 = (soclib::caba::VciSyntheticInitiator<vci_param> *) malloc(sizeof(soclib::caba::VciSyntheticInitiator<vci_param> )* N_CLUSTERS); |
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| 154 | soclib::caba::VciSyntheticInitiator<vci_param> * initiator_c1 = (soclib::caba::VciSyntheticInitiator<vci_param> *) malloc(sizeof(soclib::caba::VciSyntheticInitiator<vci_param> )* N_CLUSTERS); |
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| 155 | for(int i = 0 ; i < X_MAX; i++) |
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| 156 | for(int j = 0 ; j < Y_MAX ; j++){ |
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| 157 | std::cout << "Passe " << i << j << " pour instanciation synthetic_init" << std::endl; |
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| 158 | std::ostringstream str0; |
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| 159 | std::ostringstream str1; |
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| 160 | str0 << "Initiator_c0_" << (i*Y_MAX+j) ; |
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| 161 | str1 << "Initiator_c1_" << (i*Y_MAX+j) ; |
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| 162 | if( (i == X_MAX-1) && (j == Y_MAX-1)){ |
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| 163 | new(&initiator_c0[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str0.str().c_str() , maptab0, IntTab((i*Y_MAX+j) ,0), 16, 900, 2, X_MAX, Y_MAX, 25, 0, X_MAX, 0, Y_MAX); //, 0, 0, 0, 0, 0); |
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| 164 | new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j) ,0), 16, 900, 2, X_MAX, Y_MAX, 25, 0, X_MAX, 0, Y_MAX); //, 0, 0, 0, 0, 0); |
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| 165 | } else { |
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| 166 | new(&initiator_c0[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str0.str().c_str() , maptab0, IntTab((i*Y_MAX+j),0), 16, 500, 2, X_MAX, Y_MAX); //, 0, 0, 0, 0, 0); |
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| 167 | new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j),0), 16, 500, 2, X_MAX, Y_MAX); //, 0, 0, 0, 0, 0); |
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| 168 | } |
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| 169 | } |
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| 170 | |
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| 171 | soclib::caba::VciSimpleRam<vci_param> * ram_c0 = (soclib::caba::VciSimpleRam<vci_param> *) malloc(sizeof(soclib::caba::VciSimpleRam<vci_param>) * N_CLUSTERS); |
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| 172 | soclib::caba::VciSimpleRam<vci_param> * ram_c1 = (soclib::caba::VciSimpleRam<vci_param> *) malloc(sizeof(soclib::caba::VciSimpleRam<vci_param>) * N_CLUSTERS); |
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| 173 | for(int i = 0 ; i < X_MAX ; i++) |
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| 174 | for(int j = 0 ; j < Y_MAX ; j++){ |
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| 175 | std::cout << "Passe " << i << j << " pour instanciation Ram" << std::endl; |
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| 176 | std::ostringstream str0; |
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| 177 | std::ostringstream str1; |
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| 178 | str0 << "Ram_c0_" << (i*Y_MAX+j) ; |
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| 179 | str1 << "Ram_c1_" << (i*Y_MAX+j) ; |
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| 180 | new(&ram_c0[Y_MAX*i+j]) soclib::caba::VciSimpleRam<vci_param> (str0.str().c_str() , IntTab(i*Y_MAX+j,0), maptab0, soclib::common::Loader(), 0); |
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| 181 | new(&ram_c1[Y_MAX*i+j]) soclib::caba::VciSimpleRam<vci_param> (str1.str().c_str() , IntTab(i*Y_MAX+j,0), maptab1, soclib::common::Loader(), 0); |
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| 182 | } |
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| 183 | |
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| 184 | /////////////////////////////////////////////////////////////// |
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| 185 | // Connection of Synthetic Initiator to each local ring per cluster |
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| 186 | /////////////////////////////////////////////////////////////// |
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| 187 | for(int i = 0 ; i < N_CLUSTERS ; i++){ |
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| 188 | local_ring_c0[i].p_clk(signal_clk); |
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| 189 | local_ring_c0[i].p_resetn(signal_resetn); |
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| 190 | local_ring_c0[i].p_to_initiator[0](signal_vci_ini_synth_c0[0][i]); |
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| 191 | local_ring_c0[i].p_to_target[0](signal_vci_ini_synth_c0[1][i]); |
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| 192 | initiator_c0[i].p_clk(signal_clk); |
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| 193 | initiator_c0[i].p_resetn(signal_resetn); |
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| 194 | initiator_c0[i].p_vci(signal_vci_ini_synth_c0[0][i]); |
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| 195 | ram_c0[i].p_clk(signal_clk); |
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| 196 | ram_c0[i].p_resetn(signal_resetn); |
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| 197 | ram_c0[i].p_vci(signal_vci_ini_synth_c0[1][i]); |
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| 198 | local_ring_c1[i].p_clk(signal_clk); |
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| 199 | local_ring_c1[i].p_resetn(signal_resetn); |
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| 200 | local_ring_c1[i].p_to_initiator[0](signal_vci_ini_synth_c1[0][i]); |
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| 201 | local_ring_c1[i].p_to_target[0](signal_vci_ini_synth_c1[1][i]); |
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| 202 | initiator_c1[i].p_clk(signal_clk); |
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| 203 | initiator_c1[i].p_resetn(signal_resetn); |
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| 204 | initiator_c1[i].p_vci(signal_vci_ini_synth_c1[0][i]); |
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| 205 | ram_c1[i].p_clk(signal_clk); |
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| 206 | ram_c1[i].p_resetn(signal_resetn); |
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| 207 | ram_c1[i].p_vci(signal_vci_ini_synth_c1[1][i]); |
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| 208 | } |
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| 209 | |
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| 210 | /////////////////////////////////////////////////////////////// |
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| 211 | // Connection of each VDspin Router to each local ring and |
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| 212 | // neighbors VDspin Router |
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| 213 | /////////////////////////////////////////////////////////////// |
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| 214 | for(int i = 0; i < X_MAX ; i++){ |
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| 215 | for(int j = 0; j < Y_MAX ; j++){ |
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| 216 | routers_cmd[i][j].p_clk(signal_clk); |
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| 217 | routers_cmd[i][j].p_resetn(signal_resetn); |
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| 218 | routers_rsp[i][j].p_clk(signal_clk); |
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| 219 | routers_rsp[i][j].p_resetn(signal_resetn); |
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| 220 | local_ring_c0[i*Y_MAX+j].p_gate_cmd_in( dspin_signals_cmd_c0[0][i][j][LOCAL]); |
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| 221 | local_ring_c1[i*Y_MAX+j].p_gate_cmd_in( dspin_signals_cmd_c1[0][i][j][LOCAL]); |
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| 222 | local_ring_c0[i*Y_MAX+j].p_gate_cmd_out(dspin_signals_cmd_c0[1][i][j][LOCAL]); |
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| 223 | local_ring_c1[i*Y_MAX+j].p_gate_cmd_out(dspin_signals_cmd_c1[1][i][j][LOCAL]); |
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| 224 | local_ring_c0[i*Y_MAX+j].p_gate_rsp_in( dspin_signals_rsp_c0[0][i][j][LOCAL]); |
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| 225 | local_ring_c1[i*Y_MAX+j].p_gate_rsp_in( dspin_signals_rsp_c1[0][i][j][LOCAL]); |
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| 226 | local_ring_c0[i*Y_MAX+j].p_gate_rsp_out(dspin_signals_rsp_c0[1][i][j][LOCAL]); |
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| 227 | local_ring_c1[i*Y_MAX+j].p_gate_rsp_out(dspin_signals_rsp_c1[1][i][j][LOCAL]); |
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| 228 | std::cout << "Ring to DSPIN Connection done" << std::endl; |
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| 229 | for(int k = 0; k < 5; k++){ |
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| 230 | if(j == 0){ |
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| 231 | if(i == 0){ |
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| 232 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
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| 233 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
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| 234 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
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| 235 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
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| 236 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
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| 237 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
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| 238 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
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| 239 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
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| 240 | } else { |
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| 241 | if(k == WEST){ |
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| 242 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i-1][j][EAST]); |
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| 243 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i-1][j][EAST]); |
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| 244 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i-1][j][EAST]); |
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| 245 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i-1][j][EAST]); |
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| 246 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i-1][j][EAST]); |
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| 247 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i-1][j][EAST]); |
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| 248 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i-1][j][EAST]); |
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| 249 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i-1][j][EAST]); |
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| 250 | } else { |
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| 251 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
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| 252 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
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| 253 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
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| 254 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
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| 255 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
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| 256 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
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| 257 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
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| 258 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
|---|
| 259 | } |
|---|
| 260 | } |
|---|
| 261 | } else { |
|---|
| 262 | if(k == SOUTH){ |
|---|
| 263 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i][j-1][NORTH]); |
|---|
| 264 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i][j-1][NORTH]); |
|---|
| 265 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i][j-1][NORTH]); |
|---|
| 266 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i][j-1][NORTH]); |
|---|
| 267 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i][j-1][NORTH]); |
|---|
| 268 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i][j-1][NORTH]); |
|---|
| 269 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i][j-1][NORTH]); |
|---|
| 270 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i][j-1][NORTH]); |
|---|
| 271 | } else if(k == WEST){ |
|---|
| 272 | if(i == 0){ |
|---|
| 273 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
|---|
| 274 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
|---|
| 275 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
|---|
| 276 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
|---|
| 277 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
|---|
| 278 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
|---|
| 279 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
|---|
| 280 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
|---|
| 281 | } else { |
|---|
| 282 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i-1][j][EAST]); |
|---|
| 283 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i-1][j][EAST]); |
|---|
| 284 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i-1][j][EAST]); |
|---|
| 285 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i-1][j][EAST]); |
|---|
| 286 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i-1][j][EAST]); |
|---|
| 287 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i-1][j][EAST]); |
|---|
| 288 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i-1][j][EAST]); |
|---|
| 289 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i-1][j][EAST]); |
|---|
| 290 | } |
|---|
| 291 | } else { |
|---|
| 292 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
|---|
| 293 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
|---|
| 294 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
|---|
| 295 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
|---|
| 296 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
|---|
| 297 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
|---|
| 298 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
|---|
| 299 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
|---|
| 300 | } |
|---|
| 301 | } |
|---|
| 302 | } |
|---|
| 303 | } |
|---|
| 304 | } |
|---|
| 305 | |
|---|
| 306 | //////////////////////////////////////////////////////// |
|---|
| 307 | for(int i = 0; i < Y_MAX ; i++){ |
|---|
| 308 | for(int j = 0; j < Y_MAX ; j++){ |
|---|
| 309 | if(i == 0){ |
|---|
| 310 | dspin_signals_cmd_c0[0][i][j][SOUTH].read = true ; |
|---|
| 311 | dspin_signals_cmd_c0[1][i][j][SOUTH].write = false ; |
|---|
| 312 | dspin_signals_cmd_c1[0][i][j][SOUTH].read = true ; |
|---|
| 313 | dspin_signals_cmd_c1[1][i][j][SOUTH].write = false ; |
|---|
| 314 | dspin_signals_rsp_c0[0][i][j][SOUTH].read = true ; |
|---|
| 315 | dspin_signals_rsp_c0[1][i][j][SOUTH].write = false ; |
|---|
| 316 | dspin_signals_rsp_c1[0][i][j][SOUTH].read = true ; |
|---|
| 317 | dspin_signals_rsp_c1[1][i][j][SOUTH].write = false ; |
|---|
| 318 | } |
|---|
| 319 | if(i == Y_MAX-1){ |
|---|
| 320 | dspin_signals_cmd_c0[0][i][j][NORTH].read = true ; |
|---|
| 321 | dspin_signals_cmd_c0[1][i][j][NORTH].write = false ; |
|---|
| 322 | dspin_signals_cmd_c1[0][i][j][NORTH].read = true ; |
|---|
| 323 | dspin_signals_cmd_c1[1][i][j][NORTH].write = false ; |
|---|
| 324 | dspin_signals_rsp_c0[0][i][j][NORTH].read = true ; |
|---|
| 325 | dspin_signals_rsp_c0[1][i][j][NORTH].write = false ; |
|---|
| 326 | dspin_signals_rsp_c1[0][i][j][NORTH].read = true ; |
|---|
| 327 | dspin_signals_rsp_c1[1][i][j][NORTH].write = false ; |
|---|
| 328 | } |
|---|
| 329 | if(j == 0){ |
|---|
| 330 | dspin_signals_cmd_c0[0][i][j][WEST].read = true ; |
|---|
| 331 | dspin_signals_cmd_c0[1][i][j][WEST].write = false ; |
|---|
| 332 | dspin_signals_cmd_c1[0][i][j][WEST].read = true ; |
|---|
| 333 | dspin_signals_cmd_c1[1][i][j][WEST].write = false ; |
|---|
| 334 | dspin_signals_rsp_c0[0][i][j][WEST].read = true ; |
|---|
| 335 | dspin_signals_rsp_c0[1][i][j][WEST].write = false ; |
|---|
| 336 | dspin_signals_rsp_c1[0][i][j][WEST].read = true ; |
|---|
| 337 | dspin_signals_rsp_c1[1][i][j][WEST].write = false ; |
|---|
| 338 | } |
|---|
| 339 | if(j == X_MAX-1){ |
|---|
| 340 | dspin_signals_cmd_c0[0][i][j][EAST].read = true ; |
|---|
| 341 | dspin_signals_cmd_c0[1][i][j][EAST].write = false ; |
|---|
| 342 | dspin_signals_cmd_c1[0][i][j][EAST].read = true ; |
|---|
| 343 | dspin_signals_cmd_c1[1][i][j][EAST].write = false ; |
|---|
| 344 | dspin_signals_rsp_c0[0][i][j][EAST].read = true ; |
|---|
| 345 | dspin_signals_rsp_c0[1][i][j][EAST].write = false ; |
|---|
| 346 | dspin_signals_rsp_c1[0][i][j][EAST].read = true ; |
|---|
| 347 | dspin_signals_rsp_c1[1][i][j][EAST].write = false ; |
|---|
| 348 | } |
|---|
| 349 | } |
|---|
| 350 | } |
|---|
| 351 | |
|---|
| 352 | |
|---|
| 353 | |
|---|
| 354 | //////////////////////////////////////////////// |
|---|
| 355 | // Simulation Loop // |
|---|
| 356 | //////////////////////////////////////////////// |
|---|
| 357 | //int ncycles; |
|---|
| 358 | |
|---|
| 359 | sc_start(sc_core::sc_time(0, SC_NS)); |
|---|
| 360 | signal_resetn = false; |
|---|
| 361 | |
|---|
| 362 | sc_start(sc_core::sc_time(1, SC_NS)); |
|---|
| 363 | signal_resetn = true; |
|---|
| 364 | |
|---|
| 365 | while(1) { |
|---|
| 366 | sc_start(sc_time(1, SC_NS)); |
|---|
| 367 | std::cout << "Synthetic initiators signals ------------------------------" << std::endl; |
|---|
| 368 | for(int i = 0 ; i < N_CLUSTERS ; i++){ |
|---|
| 369 | initiator_c0[i].print_trace(); |
|---|
| 370 | std::cout << std::hex; |
|---|
| 371 | std::cout << "synt_cmdval = " << signal_vci_ini_synth_c0[0][i].cmdval.read() << std::endl; |
|---|
| 372 | std::cout << "synt_address = " << signal_vci_ini_synth_c0[0][i].address.read() << std::endl; |
|---|
| 373 | std::cout << "synt_cmd = " << signal_vci_ini_synth_c0[0][i].cmd.read() << std::endl; |
|---|
| 374 | std::cout << "synt_srcid = " << signal_vci_ini_synth_c0[0][i].srcid.read() << std::endl; |
|---|
| 375 | std::cout << "synt_plen = " << signal_vci_ini_synth_c0[0][i].plen.read() << std::endl; |
|---|
| 376 | std::cout << "synt_eop = " << signal_vci_ini_synth_c0[0][i].eop.read() << std::endl; |
|---|
| 377 | std::cout << "synt_rspval = " << signal_vci_ini_synth_c0[0][i].rspval.read() << std::endl; |
|---|
| 378 | std::cout << "synt_rerror = " << signal_vci_ini_synth_c0[0][i].rerror.read() << std::endl; |
|---|
| 379 | std::cout << "synt_reop = " << signal_vci_ini_synth_c0[0][i].reop.read() << std::endl; |
|---|
| 380 | } |
|---|
| 381 | std::cout << "RAM signals -----------------------------------------------" << std::endl; |
|---|
| 382 | for(int i = 0 ; i < N_CLUSTERS ; i++){ |
|---|
| 383 | ram_c0[i].print_trace(); |
|---|
| 384 | std::cout << std::hex; |
|---|
| 385 | std::cout << "ram_cmdval = " << signal_vci_ini_synth_c0[1][i].cmdval.read() << std::endl; |
|---|
| 386 | std::cout << "ram_address = " << signal_vci_ini_synth_c0[1][i].address.read() << std::endl; |
|---|
| 387 | std::cout << "ram_cmd = " << signal_vci_ini_synth_c0[1][i].cmd.read() << std::endl; |
|---|
| 388 | std::cout << "ram_srcid = " << signal_vci_ini_synth_c0[1][i].srcid.read() << std::endl; |
|---|
| 389 | std::cout << "ram_plen = " << signal_vci_ini_synth_c0[1][i].plen.read() << std::endl; |
|---|
| 390 | std::cout << "ram_eop = " << signal_vci_ini_synth_c0[1][i].eop.read() << std::endl; |
|---|
| 391 | std::cout << "ram_rspval = " << signal_vci_ini_synth_c0[1][i].rspval.read() << std::endl; |
|---|
| 392 | std::cout << "ram_rsrcid = " << signal_vci_ini_synth_c0[1][i].rsrcid.read() << std::endl; |
|---|
| 393 | std::cout << "ram_rerror = " << signal_vci_ini_synth_c0[1][i].rerror.read() << std::endl; |
|---|
| 394 | std::cout << "ram_reop = " << signal_vci_ini_synth_c0[1][i].reop.read() << std::endl; |
|---|
| 395 | } |
|---|
| 396 | std::cout << "Local_ring ------------------------------------------------" << std::endl; |
|---|
| 397 | for(int i = 0 ; i < N_CLUSTERS ; i++){ |
|---|
| 398 | local_ring_c0[i].print_trace(); |
|---|
| 399 | } |
|---|
| 400 | std::cout << "Routers CMD -----------------------------------------------" << std::endl; |
|---|
| 401 | for(int i = 0 ; i < Y_MAX ; i++){ |
|---|
| 402 | for(int j = 0 ; j < X_MAX ; j++){ |
|---|
| 403 | routers_cmd[i][j].printTrace(0); |
|---|
| 404 | } |
|---|
| 405 | } |
|---|
| 406 | std::cout << "Routers RSP -----------------------------------------------" << std::endl; |
|---|
| 407 | for(int i = 0 ; i < Y_MAX ; i++){ |
|---|
| 408 | for(int j = 0 ; j < X_MAX ; j++){ |
|---|
| 409 | routers_rsp[i][j].printTrace(0); |
|---|
| 410 | } |
|---|
| 411 | } |
|---|
| 412 | |
|---|
| 413 | //for(int i = 0; i< N_CLUSTERS; i++){ |
|---|
| 414 | // initiator_c1[i].print_trace(); |
|---|
| 415 | // std::cout << std::hex; |
|---|
| 416 | // std::cout << "synt_cmdval = " << signal_vci_ini_synth_c1[0][i].cmdval.read() << std::endl; |
|---|
| 417 | // std::cout << "synt_address = " << signal_vci_ini_synth_c1[0][i].address.read() << std::endl; |
|---|
| 418 | // std::cout << "synt_cmd = " << signal_vci_ini_synth_c1[0][i].cmd.read() << std::endl; |
|---|
| 419 | // std::cout << "synt_srcid = " << signal_vci_ini_synth_c1[0][i].srcid.read() << std::endl; |
|---|
| 420 | // std::cout << "synt_plen = " << signal_vci_ini_synth_c1[0][i].plen.read() << std::endl; |
|---|
| 421 | // std::cout << "synt_eop = " << signal_vci_ini_synth_c1[0][i].eop.read() << std::endl; |
|---|
| 422 | // std::cout << "synt_rspval = " << signal_vci_ini_synth_c1[0][i].rspval.read() << std::endl; |
|---|
| 423 | // std::cout << "synt_rerror = " << signal_vci_ini_synth_c1[0][i].rerror.read() << std::endl; |
|---|
| 424 | // std::cout << "synt_reop = " << signal_vci_ini_synth_c1[0][i].reop.read() << std::endl; |
|---|
| 425 | //} |
|---|
| 426 | //for(int i = 0 ; i < N_CLUSTERS ; i++){ |
|---|
| 427 | // ram_c1[i].print_trace(); |
|---|
| 428 | // std::cout << std::hex; |
|---|
| 429 | // std::cout << "ram_cmdval = " << signal_vci_ini_synth_c0[1][i].cmdval.read() << std::endl; |
|---|
| 430 | // std::cout << "ram_address = " << signal_vci_ini_synth_c0[1][i].address.read() << std::endl; |
|---|
| 431 | // std::cout << "ram_cmd = " << signal_vci_ini_synth_c0[1][i].cmd.read() << std::endl; |
|---|
| 432 | // std::cout << "ram_srcid = " << signal_vci_ini_synth_c0[1][i].srcid.read() << std::endl; |
|---|
| 433 | // std::cout << "ram_plen = " << signal_vci_ini_synth_c0[1][i].plen.read() << std::endl; |
|---|
| 434 | // std::cout << "ram_eop = " << signal_vci_ini_synth_c0[1][i].eop.read() << std::endl; |
|---|
| 435 | // std::cout << "ram_rspval = " << signal_vci_ini_synth_c0[1][i].rspval.read() << std::endl; |
|---|
| 436 | // std::cout << "ram_rerror = " << signal_vci_ini_synth_c0[1][i].rerror.read() << std::endl; |
|---|
| 437 | // std::cout << "ram_reop = " << signal_vci_ini_synth_c0[1][i].reop.read() << std::endl; |
|---|
| 438 | //} |
|---|
| 439 | |
|---|
| 440 | } |
|---|
| 441 | |
|---|
| 442 | return EXIT_SUCCESS; |
|---|
| 443 | } |
|---|
| 444 | |
|---|
| 445 | int sc_main (int argc, char *argv[]) |
|---|
| 446 | { |
|---|
| 447 | try { |
|---|
| 448 | return _main(argc, argv); |
|---|
| 449 | } catch (std::exception &e) { |
|---|
| 450 | std::cout << e.what() << std::endl; |
|---|
| 451 | } catch (...) { |
|---|
| 452 | std::cout << "Unknown exception occured" << std::endl; |
|---|
| 453 | throw; |
|---|
| 454 | } |
|---|
| 455 | return 1; |
|---|
| 456 | } |
|---|
