1 | |
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2 | #include <stdint.h> |
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3 | #include <systemc> |
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4 | #include <sys/time.h> |
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5 | #include <iostream> |
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6 | #include <cstdlib> |
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7 | #include <cstdarg> |
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8 | |
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9 | #include "arithmetics.h" |
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10 | #include "mapping_table.h" |
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11 | #include "alloc_elems.h" |
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12 | #include "vci_simple_ram.h" |
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13 | #include "vci_local_ring_fast.h" |
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14 | #include "virtual_dspin_router.h" |
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15 | #include "vci_synthetic_initiator.h" |
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16 | |
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17 | // MESH SIZE |
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18 | #define X_MAX 8 |
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19 | #define Y_MAX 8 |
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20 | #define N_CLUSTERS X_MAX*Y_MAX |
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21 | // FLIT_WIDTH |
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22 | #define WIDTH_CMD 40 |
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23 | #define WIDTH_RSP 33 |
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24 | // Face of each DSPIN Router |
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25 | #define NORTH 0 |
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26 | #define SOUTH 1 |
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27 | #define EAST 2 |
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28 | #define WEST 3 |
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29 | #define LOCAL 4 |
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30 | // VCI parameters |
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31 | #define cell_width 4 |
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32 | #define plen_width 8 |
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33 | #define address_width 32 |
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34 | #define error_width 1 |
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35 | #define clen_width 1 |
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36 | #define rflag_width 1 |
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37 | #define srcid_width 11 |
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38 | #define pktid_width 4 |
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39 | #define trdid_width 4 |
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40 | #define wrplen_width 1 |
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41 | // Adress of targets |
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42 | #define TARGET_ADDR 0x00000000 |
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43 | #define TARGET_SIZE 0x400 |
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44 | // FIFO depth in the gateways |
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45 | #define DEPTH 4 |
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46 | // LENGTH of packets |
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47 | #define PACKET_LENGTH 2 |
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48 | // FIFO depth in the routers |
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49 | #define DSPIN_FIFO 4 |
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50 | // DEBUG MODE : 0 OFF, 1 only the initiators and the targets, 2 only network |
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51 | #define DEBUG 0 |
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52 | |
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53 | |
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54 | int _main(int argc, char *argv[]) |
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55 | { |
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56 | using namespace sc_core; |
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57 | // Avoid repeating these everywhere |
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58 | using soclib::common::IntTab; |
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59 | using soclib::common::Segment; |
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60 | |
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61 | using soclib::common::uint32_log2; |
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62 | |
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63 | // Define VCI parameters |
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64 | typedef soclib::caba::VciParams<cell_width, |
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65 | plen_width, |
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66 | address_width, |
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67 | error_width, |
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68 | clen_width, |
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69 | rflag_width, |
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70 | srcid_width, |
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71 | pktid_width, |
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72 | trdid_width, |
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73 | wrplen_width> vci_param; |
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74 | |
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75 | // Mapping table primary network |
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76 | soclib::common::MappingTable maptab0(address_width, IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), |
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77 | IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), 0xFFC0000); |
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78 | soclib::common::MappingTable maptab1(address_width, IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), |
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79 | IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), 0xFFC0000); |
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80 | for(int i = 0 ; i < Y_MAX ; i++){ |
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81 | for(int j = 0 ; j < X_MAX ; j++){ |
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82 | std::ostringstream str0; |
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83 | std::ostringstream str1; |
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84 | str0 << "Target_c0_" << (i*Y_MAX+j) ; |
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85 | str1 << "Target_c1_" << (i*Y_MAX+j) ; |
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86 | maptab0.add(Segment(str0.str(), TARGET_ADDR + ((i*Y_MAX+j) << (address_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX))), TARGET_SIZE, IntTab((i*X_MAX+j),0), false)); |
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87 | maptab1.add(Segment(str1.str(), TARGET_ADDR + ((i*Y_MAX+j) << (address_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX))), TARGET_SIZE, IntTab((i*X_MAX+j),0), false)); |
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88 | } |
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89 | } |
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90 | |
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91 | |
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92 | // std::cout << maptab0 << std::endl; |
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93 | |
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94 | sc_clock signal_clk("clk"); |
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95 | sc_signal<bool> signal_resetn("resetn"); |
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96 | |
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97 | soclib::caba::VciSignals<vci_param> ** signal_vci_ini_synth_c0 = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("signal_vci_ini_synth_c0", 2, N_CLUSTERS); |
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98 | soclib::caba::VciSignals<vci_param> ** signal_vci_ini_synth_c1 = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("signal_vci_ini_synth_c1", 2, N_CLUSTERS); |
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99 | /////////////////////////////////////////////////////////////// |
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100 | // VDSPIN Signals : one level for in and out, one level for X length in the mesh, |
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101 | // one level for Y length in the mesh, last level for each port of the router |
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102 | /////////////////////////////////////////////////////////////// |
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103 | soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_0", 2, X_MAX, Y_MAX, 5 ); |
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104 | soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_1", 2, X_MAX, Y_MAX, 5 ); |
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105 | soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_0", 2, X_MAX, Y_MAX, 5 ); |
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106 | soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_2", 2, X_MAX, Y_MAX, 5 ); |
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107 | |
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108 | |
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109 | // N_CLUSTERS ring. |
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110 | soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> * local_ring_c0 = (soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> *) malloc(sizeof(soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> ) * N_CLUSTERS) ; |
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111 | soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> * local_ring_c1 = (soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> *) malloc(sizeof(soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> ) * N_CLUSTERS) ; |
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112 | for(int i = 0 ; i < N_CLUSTERS ; i++){ // ringid, fifo, fifo, nb_init, nb_tgt |
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113 | std::ostringstream str0; |
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114 | std::ostringstream str1; |
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115 | str0 << "cluster_c0_" << i ; |
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116 | str1 << "cluster_c1_" << i ; |
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117 | new(&local_ring_c0[i]) soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> (str0.str().c_str(), |
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118 | maptab0, |
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119 | IntTab(i), |
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120 | 2, |
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121 | DEPTH, |
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122 | 1, |
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123 | 1); |
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124 | new(&local_ring_c1[i]) soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> (str1.str().c_str(), |
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125 | maptab1, |
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126 | IntTab(i), |
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127 | 2, |
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128 | DEPTH, |
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129 | 1, |
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130 | 1); |
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131 | } |
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132 | |
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133 | // Virtual dspin routers |
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134 | soclib::caba::VirtualDspinRouter<WIDTH_CMD> ** routers_cmd = (soclib::caba::VirtualDspinRouter<WIDTH_CMD> **) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_CMD> *) * X_MAX); |
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135 | soclib::caba::VirtualDspinRouter<WIDTH_RSP> ** routers_rsp = (soclib::caba::VirtualDspinRouter<WIDTH_RSP> **) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_RSP> *) * X_MAX); |
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136 | |
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137 | for(int i = 0; i < X_MAX; i++ ){ |
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138 | routers_cmd[i] = (soclib::caba::VirtualDspinRouter<WIDTH_CMD> * ) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_CMD>) * Y_MAX); |
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139 | routers_rsp[i] = (soclib::caba::VirtualDspinRouter<WIDTH_RSP> * ) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_RSP>) * Y_MAX); |
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140 | for(int j = 0; j < Y_MAX; j++){ |
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141 | std::ostringstream str0; |
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142 | std::ostringstream str1; |
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143 | str0 << "VDspinRouterCMD" << i << j; |
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144 | str1 << "VDspinRouterRSP" << i << j; |
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145 | new(&routers_cmd[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_CMD> (str0.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), DSPIN_FIFO, DSPIN_FIFO); |
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146 | new(&routers_rsp[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_RSP> (str1.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), DSPIN_FIFO, DSPIN_FIFO); |
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147 | } |
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148 | } |
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149 | |
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150 | |
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151 | /////////////////////////////////////////////////////////////// |
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152 | // Components |
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153 | /////////////////////////////////////////////////////////////// |
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154 | |
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155 | // N_CLUSTERS VCI Synthetic Initiator (1 initiator per cluster/network) |
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156 | soclib::caba::VciSyntheticInitiator<vci_param> * initiator_c0 = (soclib::caba::VciSyntheticInitiator<vci_param> *) malloc(sizeof(soclib::caba::VciSyntheticInitiator<vci_param> )* N_CLUSTERS); |
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157 | soclib::caba::VciSyntheticInitiator<vci_param> * initiator_c1 = (soclib::caba::VciSyntheticInitiator<vci_param> *) malloc(sizeof(soclib::caba::VciSyntheticInitiator<vci_param> )* N_CLUSTERS); |
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158 | for(int i = 0 ; i < X_MAX; i++) |
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159 | for(int j = 0 ; j < Y_MAX ; j++){ |
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160 | std::ostringstream str0; |
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161 | std::ostringstream str1; |
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162 | str0 << "Initiator_c0_" << (i*Y_MAX+j) ; |
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163 | str1 << "Initiator_c1_" << (i*Y_MAX+j) ; |
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164 | new(&initiator_c0[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str0.str().c_str() , maptab0, IntTab((i*Y_MAX+j) ,0), PACKET_LENGTH, 0, 16, X_MAX, Y_MAX); |
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165 | if( (i == X_MAX-1) && (j == Y_MAX-1)){ |
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166 | new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j) ,0), PACKET_LENGTH, 0, 16, X_MAX, Y_MAX, 2000, 0, X_MAX, 0, Y_MAX); |
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167 | } else { |
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168 | new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j),0), PACKET_LENGTH, 0, 16, X_MAX, Y_MAX); |
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169 | } |
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170 | } |
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171 | |
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172 | soclib::caba::VciSimpleRam<vci_param> * ram_c0 = (soclib::caba::VciSimpleRam<vci_param> *) malloc(sizeof(soclib::caba::VciSimpleRam<vci_param>) * N_CLUSTERS); |
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173 | soclib::caba::VciSimpleRam<vci_param> * ram_c1 = (soclib::caba::VciSimpleRam<vci_param> *) malloc(sizeof(soclib::caba::VciSimpleRam<vci_param>) * N_CLUSTERS); |
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174 | for(int i = 0 ; i < X_MAX ; i++) |
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175 | for(int j = 0 ; j < Y_MAX ; j++){ |
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176 | std::ostringstream str0; |
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177 | std::ostringstream str1; |
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178 | str0 << "Ram_c0_" << (i*Y_MAX+j) ; |
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179 | str1 << "Ram_c1_" << (i*Y_MAX+j) ; |
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180 | new(&ram_c0[Y_MAX*i+j]) soclib::caba::VciSimpleRam<vci_param> (str0.str().c_str() , IntTab(i*Y_MAX+j,0), maptab0, soclib::common::Loader(), 0); |
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181 | new(&ram_c1[Y_MAX*i+j]) soclib::caba::VciSimpleRam<vci_param> (str1.str().c_str() , IntTab(i*Y_MAX+j,0), maptab1, soclib::common::Loader(), 0); |
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182 | } |
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183 | |
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184 | /////////////////////////////////////////////////////////////// |
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185 | // Connection of Synthetic Initiator to each local ring per cluster |
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186 | /////////////////////////////////////////////////////////////// |
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187 | for(int i = 0 ; i < N_CLUSTERS ; i++){ |
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188 | local_ring_c0[i].p_clk(signal_clk); |
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189 | local_ring_c0[i].p_resetn(signal_resetn); |
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190 | local_ring_c0[i].p_to_initiator[0](signal_vci_ini_synth_c0[0][i]); |
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191 | local_ring_c0[i].p_to_target[0](signal_vci_ini_synth_c0[1][i]); |
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192 | initiator_c0[i].p_clk(signal_clk); |
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193 | initiator_c0[i].p_resetn(signal_resetn); |
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194 | initiator_c0[i].p_vci(signal_vci_ini_synth_c0[0][i]); |
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195 | ram_c0[i].p_clk(signal_clk); |
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196 | ram_c0[i].p_resetn(signal_resetn); |
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197 | ram_c0[i].p_vci(signal_vci_ini_synth_c0[1][i]); |
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198 | local_ring_c1[i].p_clk(signal_clk); |
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199 | local_ring_c1[i].p_resetn(signal_resetn); |
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200 | local_ring_c1[i].p_to_initiator[0](signal_vci_ini_synth_c1[0][i]); |
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201 | local_ring_c1[i].p_to_target[0](signal_vci_ini_synth_c1[1][i]); |
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202 | initiator_c1[i].p_clk(signal_clk); |
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203 | initiator_c1[i].p_resetn(signal_resetn); |
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204 | initiator_c1[i].p_vci(signal_vci_ini_synth_c1[0][i]); |
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205 | ram_c1[i].p_clk(signal_clk); |
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206 | ram_c1[i].p_resetn(signal_resetn); |
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207 | ram_c1[i].p_vci(signal_vci_ini_synth_c1[1][i]); |
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208 | } |
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209 | |
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210 | /////////////////////////////////////////////////////////////// |
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211 | // Connection of each VDspin Router to each local ring and |
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212 | // neighbors VDspin Router |
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213 | /////////////////////////////////////////////////////////////// |
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214 | for(int i = 0; i < X_MAX ; i++){ |
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215 | for(int j = 0; j < Y_MAX ; j++){ |
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216 | routers_cmd[i][j].p_clk(signal_clk); |
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217 | routers_cmd[i][j].p_resetn(signal_resetn); |
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218 | routers_rsp[i][j].p_clk(signal_clk); |
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219 | routers_rsp[i][j].p_resetn(signal_resetn); |
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220 | local_ring_c0[i*Y_MAX+j].p_gate_cmd_in( dspin_signals_cmd_c0[0][i][j][LOCAL]); |
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221 | local_ring_c1[i*Y_MAX+j].p_gate_cmd_in( dspin_signals_cmd_c1[0][i][j][LOCAL]); |
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222 | local_ring_c0[i*Y_MAX+j].p_gate_cmd_out(dspin_signals_cmd_c0[1][i][j][LOCAL]); |
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223 | local_ring_c1[i*Y_MAX+j].p_gate_cmd_out(dspin_signals_cmd_c1[1][i][j][LOCAL]); |
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224 | local_ring_c0[i*Y_MAX+j].p_gate_rsp_in( dspin_signals_rsp_c0[0][i][j][LOCAL]); |
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225 | local_ring_c1[i*Y_MAX+j].p_gate_rsp_in( dspin_signals_rsp_c1[0][i][j][LOCAL]); |
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226 | local_ring_c0[i*Y_MAX+j].p_gate_rsp_out(dspin_signals_rsp_c0[1][i][j][LOCAL]); |
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227 | local_ring_c1[i*Y_MAX+j].p_gate_rsp_out(dspin_signals_rsp_c1[1][i][j][LOCAL]); |
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228 | for(int k = 0; k < 5; k++){ |
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229 | if(j == 0){ |
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230 | if(i == 0){ |
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231 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
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232 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
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233 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
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234 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
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235 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
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236 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
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237 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
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238 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
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239 | } else { |
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240 | if(k == WEST){ |
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241 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i-1][j][EAST]); |
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242 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i-1][j][EAST]); |
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243 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i-1][j][EAST]); |
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244 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i-1][j][EAST]); |
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245 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i-1][j][EAST]); |
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246 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i-1][j][EAST]); |
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247 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i-1][j][EAST]); |
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248 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i-1][j][EAST]); |
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249 | } else { |
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250 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
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251 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
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252 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
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253 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
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254 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
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255 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
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256 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
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257 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
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258 | } |
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259 | } |
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260 | } else { |
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261 | if(k == SOUTH){ |
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262 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i][j-1][NORTH]); |
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263 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i][j-1][NORTH]); |
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264 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i][j-1][NORTH]); |
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265 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i][j-1][NORTH]); |
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266 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i][j-1][NORTH]); |
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267 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i][j-1][NORTH]); |
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268 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i][j-1][NORTH]); |
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269 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i][j-1][NORTH]); |
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270 | } else if(k == WEST){ |
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271 | if(i == 0){ |
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272 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
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273 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
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274 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
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275 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
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276 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
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277 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
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278 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
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279 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
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280 | } else { |
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281 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i-1][j][EAST]); |
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282 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i-1][j][EAST]); |
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283 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i-1][j][EAST]); |
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284 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i-1][j][EAST]); |
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285 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i-1][j][EAST]); |
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286 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i-1][j][EAST]); |
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287 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i-1][j][EAST]); |
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288 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i-1][j][EAST]); |
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289 | } |
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290 | } else { |
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291 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
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292 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
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293 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
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294 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
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295 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
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296 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
---|
297 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
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298 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
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299 | } |
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300 | } |
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301 | } |
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302 | } |
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303 | } |
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304 | |
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305 | //////////////////////////////////////////////// |
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306 | // Simulation Loop // |
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307 | //////////////////////////////////////////////// |
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308 | int ncycles; |
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309 | |
---|
310 | |
---|
311 | if(argc == 2){ |
---|
312 | ncycles = std::atoi(argv[1]); |
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313 | } else { |
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314 | exit(1); |
---|
315 | } |
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316 | sc_start(sc_core::sc_time(0, SC_NS)); |
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317 | signal_resetn = false; |
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318 | |
---|
319 | for(int i = 0; i < X_MAX ; i++){ |
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320 | for(int j = 0; j < Y_MAX ; j++){ |
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321 | if(j == 0){ |
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322 | dspin_signals_cmd_c0[0][i][j][SOUTH].read = true ; |
---|
323 | dspin_signals_cmd_c0[1][i][j][SOUTH].write = false ; |
---|
324 | dspin_signals_cmd_c1[0][i][j][SOUTH].read = true ; |
---|
325 | dspin_signals_cmd_c1[1][i][j][SOUTH].write = false ; |
---|
326 | dspin_signals_rsp_c0[0][i][j][SOUTH].read = true ; |
---|
327 | dspin_signals_rsp_c0[1][i][j][SOUTH].write = false ; |
---|
328 | dspin_signals_rsp_c1[0][i][j][SOUTH].read = true ; |
---|
329 | dspin_signals_rsp_c1[1][i][j][SOUTH].write = false ; |
---|
330 | } |
---|
331 | if(j == Y_MAX-1){ |
---|
332 | dspin_signals_cmd_c0[0][i][j][NORTH].read = true ; |
---|
333 | dspin_signals_cmd_c0[1][i][j][NORTH].write = false ; |
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334 | dspin_signals_cmd_c1[0][i][j][NORTH].read = true ; |
---|
335 | dspin_signals_cmd_c1[1][i][j][NORTH].write = false ; |
---|
336 | dspin_signals_rsp_c0[0][i][j][NORTH].read = true ; |
---|
337 | dspin_signals_rsp_c0[1][i][j][NORTH].write = false ; |
---|
338 | dspin_signals_rsp_c1[0][i][j][NORTH].read = true ; |
---|
339 | dspin_signals_rsp_c1[1][i][j][NORTH].write = false ; |
---|
340 | } |
---|
341 | if(i == 0){ |
---|
342 | dspin_signals_cmd_c0[0][i][j][WEST].read = true ; |
---|
343 | dspin_signals_cmd_c0[1][i][j][WEST].write = false ; |
---|
344 | dspin_signals_cmd_c1[0][i][j][WEST].read = true ; |
---|
345 | dspin_signals_cmd_c1[1][i][j][WEST].write = false ; |
---|
346 | dspin_signals_rsp_c0[0][i][j][WEST].read = true ; |
---|
347 | dspin_signals_rsp_c0[1][i][j][WEST].write = false ; |
---|
348 | dspin_signals_rsp_c1[0][i][j][WEST].read = true ; |
---|
349 | dspin_signals_rsp_c1[1][i][j][WEST].write = false ; |
---|
350 | } |
---|
351 | if(i == X_MAX-1){ |
---|
352 | dspin_signals_cmd_c0[0][i][j][EAST].read = true ; |
---|
353 | dspin_signals_cmd_c0[1][i][j][EAST].write = false ; |
---|
354 | dspin_signals_cmd_c1[0][i][j][EAST].read = true ; |
---|
355 | dspin_signals_cmd_c1[1][i][j][EAST].write = false ; |
---|
356 | dspin_signals_rsp_c0[0][i][j][EAST].read = true ; |
---|
357 | dspin_signals_rsp_c0[1][i][j][EAST].write = false ; |
---|
358 | dspin_signals_rsp_c1[0][i][j][EAST].read = true ; |
---|
359 | dspin_signals_rsp_c1[1][i][j][EAST].write = false ; |
---|
360 | } |
---|
361 | } |
---|
362 | } |
---|
363 | |
---|
364 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
365 | signal_resetn = true; |
---|
366 | |
---|
367 | for(int t = 0; t < ncycles; t++){ |
---|
368 | sc_start(sc_time(1, SC_NS)); |
---|
369 | #if defined(DEBUG) |
---|
370 | for(int i = 0 ; i < Y_MAX ; i++){ |
---|
371 | for(int j = 0 ; j < X_MAX ; j++){ |
---|
372 | #endif |
---|
373 | #if DEBUG==1 |
---|
374 | initiator_c0[i*Y_MAX+j].print_trace(); |
---|
375 | std::cout << std::hex; |
---|
376 | std::cout << "synt_cmdval = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmdval.read() << std::endl; |
---|
377 | std::cout << "synt_cmdack = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmdack.read() << std::endl; |
---|
378 | std::cout << "synt_address = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].address.read() << std::endl; |
---|
379 | std::cout << "synt_cmd = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmd.read() << std::endl; |
---|
380 | std::cout << "synt_srcid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].srcid.read() << std::endl; |
---|
381 | std::cout << "synt_trdid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].trdid.read() << std::endl; |
---|
382 | std::cout << "synt_plen = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].plen.read() << std::endl; |
---|
383 | std::cout << "synt_eop = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].eop.read() << std::endl; |
---|
384 | std::cout << "synt_rspval = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rspval.read() << std::endl; |
---|
385 | std::cout << "synt_rspack = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rspack.read() << std::endl; |
---|
386 | std::cout << "synt_rsrcid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rsrcid.read() << std::endl; |
---|
387 | std::cout << "synt_rtrdid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rtrdid.read() << std::endl; |
---|
388 | std::cout << "synt_rpktid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rpktid.read() << std::endl; |
---|
389 | std::cout << "synt_rerror = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rerror.read() << std::endl; |
---|
390 | std::cout << "synt_reop = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].reop.read() << std::endl; |
---|
391 | ram_c0[i*Y_MAX+j].print_trace(); |
---|
392 | std::cout << std::hex; |
---|
393 | std::cout << "ram_cmdval = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].cmdval.read() << std::endl; |
---|
394 | std::cout << "ram_address = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].address.read() << std::endl; |
---|
395 | std::cout << "ram_cmd = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].cmd.read() << std::endl; |
---|
396 | std::cout << "ram_srcid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].srcid.read() << std::endl; |
---|
397 | std::cout << "ram_trdid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].trdid.read() << std::endl; |
---|
398 | std::cout << "ram_plen = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].plen.read() << std::endl; |
---|
399 | std::cout << "ram_eop = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].eop.read() << std::endl; |
---|
400 | std::cout << "ram_rspval = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rspval.read() << std::endl; |
---|
401 | std::cout << "ram_rspack = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rspack.read() << std::endl; |
---|
402 | std::cout << "ram_rsrcid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rsrcid.read() << std::endl; |
---|
403 | std::cout << "ram_rtrdid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rtrdid.read() << std::endl; |
---|
404 | std::cout << "ram_rerror = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rerror.read() << std::endl; |
---|
405 | std::cout << "ram_reop = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].reop.read() << std::endl; |
---|
406 | initiator_c1[i*Y_MAX+j].print_trace(); |
---|
407 | std::cout << std::hex; |
---|
408 | std::cout << "synt_cmdval = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].cmdval.read() << std::endl; |
---|
409 | std::cout << "synt_cmdack = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].cmdack.read() << std::endl; |
---|
410 | std::cout << "synt_address = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].address.read() << std::endl; |
---|
411 | std::cout << "synt_cmd = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].cmd.read() << std::endl; |
---|
412 | std::cout << "synt_srcid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].srcid.read() << std::endl; |
---|
413 | std::cout << "synt_trdid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].trdid.read() << std::endl; |
---|
414 | std::cout << "synt_pktid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].pktid.read() << std::endl; |
---|
415 | std::cout << "synt_plen = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].plen.read() << std::endl; |
---|
416 | std::cout << "synt_eop = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].eop.read() << std::endl; |
---|
417 | std::cout << "synt_rspval = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rspval.read() << std::endl; |
---|
418 | std::cout << "synt_rspack = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rspack.read() << std::endl; |
---|
419 | std::cout << "synt_rsrcid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rsrcid.read() << std::endl; |
---|
420 | std::cout << "synt_rtrdid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rtrdid.read() << std::endl; |
---|
421 | std::cout << "synt_rpktid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rpktid.read() << std::endl; |
---|
422 | std::cout << "synt_rerror = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rerror.read() << std::endl; |
---|
423 | std::cout << "synt_reop = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].reop.read() << std::endl; |
---|
424 | ram_c1[i*Y_MAX+j].print_trace(); |
---|
425 | std::cout << std::hex; |
---|
426 | std::cout << "ram_cmdval = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].cmdval.read() << std::endl; |
---|
427 | std::cout << "ram_address = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].address.read() << std::endl; |
---|
428 | std::cout << "ram_cmd = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].cmd.read() << std::endl; |
---|
429 | std::cout << "ram_srcid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].srcid.read() << std::endl; |
---|
430 | std::cout << "ram_trdid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].trdid.read() << std::endl; |
---|
431 | std::cout << "ram_pktid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].pktid.read() << std::endl; |
---|
432 | std::cout << "ram_plen = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].plen.read() << std::endl; |
---|
433 | std::cout << "ram_eop = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].eop.read() << std::endl; |
---|
434 | std::cout << "ram_rspval = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rspval.read() << std::endl; |
---|
435 | std::cout << "ram_rspack = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rspack.read() << std::endl; |
---|
436 | std::cout << "ram_rsrcid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rsrcid.read() << std::endl; |
---|
437 | std::cout << "ram_rtrdid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rtrdid.read() << std::endl; |
---|
438 | std::cout << "ram_rpktid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rpktid.read() << std::endl; |
---|
439 | std::cout << "ram_rerror = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rerror.read() << std::endl; |
---|
440 | std::cout << "ram_reop = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].reop.read() << std::endl; |
---|
441 | #endif |
---|
442 | #if DEBUG==2 |
---|
443 | local_ring_c0[i*Y_MAX+j].print_trace(); |
---|
444 | routers_cmd[i][j].print_trace(0); |
---|
445 | std::cout << std::dec << t << " ns" << std::endl; |
---|
446 | routers_rsp[i][j].print_trace(0); |
---|
447 | #endif |
---|
448 | #ifdef DEBUG |
---|
449 | } |
---|
450 | } |
---|
451 | #endif |
---|
452 | |
---|
453 | } |
---|
454 | |
---|
455 | std::cout << "Results : " << std::endl; |
---|
456 | for(int i = 0 ; i < Y_MAX ; i++){ |
---|
457 | for(int j = 0 ; j < X_MAX ; j++){ |
---|
458 | initiator_c1[i*Y_MAX+j].printStats(); |
---|
459 | } |
---|
460 | } |
---|
461 | |
---|
462 | |
---|
463 | std::cout << "Simulation Ends" << std::endl; |
---|
464 | |
---|
465 | |
---|
466 | return EXIT_SUCCESS; |
---|
467 | } |
---|
468 | |
---|
469 | int sc_main (int argc, char *argv[]) |
---|
470 | { |
---|
471 | try { |
---|
472 | return _main(argc, argv); |
---|
473 | } catch (std::exception &e) { |
---|
474 | std::cout << e.what() << std::endl; |
---|
475 | } catch (...) { |
---|
476 | std::cout << "Unknown exception occured" << std::endl; |
---|
477 | throw; |
---|
478 | } |
---|
479 | return 1; |
---|
480 | } |
---|
481 | |
---|