| 1 | |
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| 2 | #include <stdint.h> |
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| 3 | #include <systemc> |
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| 4 | #include <sys/time.h> |
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| 5 | #include <iostream> |
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| 6 | #include <cstdlib> |
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| 7 | #include <cstdarg> |
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| 8 | |
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| 9 | #include "arithmetics.h" |
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| 10 | #include "mapping_table.h" |
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| 11 | #include "alloc_elems.h" |
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| 12 | #include "vci_simple_ram.h" |
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| 13 | #include "vci_local_ring_fast.h" |
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| 14 | #include "virtual_dspin_router.h" |
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| 15 | #include "vci_synthetic_initiator.h" |
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| 16 | |
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| 17 | // MESH SIZE |
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| 18 | #define X_MAX 2 |
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| 19 | #define Y_MAX 2 |
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| 20 | #define N_CLUSTERS X_MAX*Y_MAX |
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| 21 | // FLIT_WIDTH |
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| 22 | #define WIDTH_CMD 40 |
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| 23 | #define WIDTH_RSP 33 |
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| 24 | // Face of each DSPIN Router |
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| 25 | #define NORTH 0 |
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| 26 | #define SOUTH 1 |
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| 27 | #define EAST 2 |
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| 28 | #define WEST 3 |
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| 29 | #define LOCAL 4 |
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| 30 | // VCI parameters |
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| 31 | #define cell_width 4 |
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| 32 | #define plen_width 8 |
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| 33 | #define address_width 32 |
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| 34 | #define error_width 1 |
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| 35 | #define clen_width 1 |
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| 36 | #define rflag_width 1 |
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| 37 | #define srcid_width 11 |
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| 38 | #define pktid_width 4 |
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| 39 | #define trdid_width 4 |
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| 40 | #define wrplen_width 1 |
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| 41 | // Adress of targets |
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| 42 | #define TARGET_ADDR 0x00000000 |
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| 43 | #define TARGET_SIZE 0x400 |
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| 44 | // FIFO depth in the gateways |
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| 45 | #define DEPTH 4 |
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| 46 | // LENGTH of packets |
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| 47 | #define PACKET_LENGTH 2 |
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| 48 | // FIFO depth in the routers |
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| 49 | #define DSPIN_FIFO 4 |
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| 50 | // DEBUG MODE : 0 OFF, 1 only the initiators and the targets, 2 only network |
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| 51 | #define DEBUG 0 |
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| 52 | // LOAD wanted |
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| 53 | #define LOAD 450 |
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| 54 | |
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| 55 | |
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| 56 | int _main(int argc, char *argv[]) |
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| 57 | { |
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| 58 | using namespace sc_core; |
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| 59 | // Avoid repeating these everywhere |
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| 60 | using soclib::common::IntTab; |
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| 61 | using soclib::common::Segment; |
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| 62 | |
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| 63 | using soclib::common::uint32_log2; |
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| 64 | |
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| 65 | int ncycles; |
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| 66 | uint32_t rho_a; |
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| 67 | uint32_t rho_b; |
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| 68 | |
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| 69 | if(argc == 4){ |
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| 70 | ncycles = std::atoi(argv[1]); |
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| 71 | rho_a = std::atoi(argv[2]); |
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| 72 | rho_b = std::atoi(argv[3]); |
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| 73 | } else { |
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| 74 | std::cout << "Usage : simulation_cycles packet_rate broadcast_period" << std::endl; |
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| 75 | exit(1); |
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| 76 | } |
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| 77 | // Define VCI parameters |
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| 78 | typedef soclib::caba::VciParams<cell_width, |
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| 79 | plen_width, |
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| 80 | address_width, |
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| 81 | error_width, |
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| 82 | clen_width, |
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| 83 | rflag_width, |
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| 84 | srcid_width, |
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| 85 | pktid_width, |
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| 86 | trdid_width, |
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| 87 | wrplen_width> vci_param; |
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| 88 | |
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| 89 | // Mapping table primary network |
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| 90 | soclib::common::MappingTable maptab0(address_width, IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), |
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| 91 | IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), 0xFFC0000); |
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| 92 | soclib::common::MappingTable maptab1(address_width, IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), |
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| 93 | IntTab(soclib::common::uint32_log2(X_MAX)+soclib::common::uint32_log2(Y_MAX) ,srcid_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX)), 0xFFC0000); |
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| 94 | for(int i = 0 ; i < Y_MAX ; i++){ |
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| 95 | for(int j = 0 ; j < X_MAX ; j++){ |
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| 96 | std::ostringstream str0; |
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| 97 | std::ostringstream str1; |
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| 98 | str0 << "Target_c0_" << (i*Y_MAX+j) ; |
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| 99 | str1 << "Target_c1_" << (i*Y_MAX+j) ; |
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| 100 | maptab0.add(Segment(str0.str(), TARGET_ADDR + ((i*Y_MAX+j) << (address_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX))), TARGET_SIZE, IntTab((i*X_MAX+j),0), false)); |
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| 101 | maptab1.add(Segment(str1.str(), TARGET_ADDR + ((i*Y_MAX+j) << (address_width-soclib::common::uint32_log2(X_MAX)-soclib::common::uint32_log2(Y_MAX))), TARGET_SIZE, IntTab((i*X_MAX+j),0), false)); |
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| 102 | } |
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| 103 | } |
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| 104 | |
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| 105 | |
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| 106 | sc_clock signal_clk("clk"); |
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| 107 | sc_signal<bool> signal_resetn("resetn"); |
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| 108 | |
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| 109 | soclib::caba::VciSignals<vci_param> ** signal_vci_ini_synth_c0 = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("signal_vci_ini_synth_c0", 2, N_CLUSTERS); |
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| 110 | soclib::caba::VciSignals<vci_param> ** signal_vci_ini_synth_c1 = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("signal_vci_ini_synth_c1", 2, N_CLUSTERS); |
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| 111 | /////////////////////////////////////////////////////////////// |
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| 112 | // VDSPIN Signals : one level for in and out, one level for X length in the mesh, |
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| 113 | // one level for Y length in the mesh, last level for each port of the router |
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| 114 | /////////////////////////////////////////////////////////////// |
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| 115 | soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_0", 2, X_MAX, Y_MAX, 5 ); |
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| 116 | soclib::caba::DspinSignals<WIDTH_CMD> **** dspin_signals_cmd_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_CMD> >("Dspin_cmd_signals_channel_1", 2, X_MAX, Y_MAX, 5 ); |
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| 117 | soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c0 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_0", 2, X_MAX, Y_MAX, 5 ); |
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| 118 | soclib::caba::DspinSignals<WIDTH_RSP> **** dspin_signals_rsp_c1 = soclib::common::alloc_elems<soclib::caba::DspinSignals<WIDTH_RSP> >("Dspin_rsp_signals_channel_2", 2, X_MAX, Y_MAX, 5 ); |
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| 119 | |
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| 120 | |
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| 121 | // N_CLUSTERS ring. |
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| 122 | soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> * local_ring_c0 = (soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> *) malloc(sizeof(soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> ) * N_CLUSTERS) ; |
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| 123 | soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> * local_ring_c1 = (soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> *) malloc(sizeof(soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> ) * N_CLUSTERS) ; |
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| 124 | for(int i = 0 ; i < N_CLUSTERS ; i++){ // ringid, fifo, fifo, nb_init, nb_tgt |
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| 125 | std::ostringstream str0; |
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| 126 | std::ostringstream str1; |
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| 127 | str0 << "cluster_c0_" << i ; |
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| 128 | str1 << "cluster_c1_" << i ; |
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| 129 | new(&local_ring_c0[i]) soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> (str0.str().c_str(), |
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| 130 | maptab0, |
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| 131 | IntTab(i), |
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| 132 | 2, |
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| 133 | DEPTH, |
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| 134 | 1, |
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| 135 | 1); |
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| 136 | new(&local_ring_c1[i]) soclib::caba::VciLocalRingFast<vci_param, WIDTH_CMD, WIDTH_RSP> (str1.str().c_str(), |
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| 137 | maptab1, |
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| 138 | IntTab(i), |
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| 139 | 2, |
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| 140 | DEPTH, |
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| 141 | 1, |
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| 142 | 1); |
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| 143 | } |
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| 144 | |
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| 145 | // Virtual dspin routers |
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| 146 | soclib::caba::VirtualDspinRouter<WIDTH_CMD> ** routers_cmd = (soclib::caba::VirtualDspinRouter<WIDTH_CMD> **) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_CMD> *) * X_MAX); |
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| 147 | soclib::caba::VirtualDspinRouter<WIDTH_RSP> ** routers_rsp = (soclib::caba::VirtualDspinRouter<WIDTH_RSP> **) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_RSP> *) * X_MAX); |
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| 148 | |
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| 149 | for(int i = 0; i < X_MAX; i++ ){ |
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| 150 | routers_cmd[i] = (soclib::caba::VirtualDspinRouter<WIDTH_CMD> * ) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_CMD>) * Y_MAX); |
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| 151 | routers_rsp[i] = (soclib::caba::VirtualDspinRouter<WIDTH_RSP> * ) malloc(sizeof(soclib::caba::VirtualDspinRouter<WIDTH_RSP>) * Y_MAX); |
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| 152 | for(int j = 0; j < Y_MAX; j++){ |
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| 153 | std::ostringstream str0; |
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| 154 | std::ostringstream str1; |
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| 155 | str0 << "VDspinRouterCMD" << i << j; |
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| 156 | str1 << "VDspinRouterRSP" << i << j; |
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| 157 | new(&routers_cmd[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_CMD> (str0.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), DSPIN_FIFO, DSPIN_FIFO); |
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| 158 | new(&routers_rsp[i][j]) soclib::caba::VirtualDspinRouter<WIDTH_RSP> (str1.str().c_str(), i, j, soclib::common::uint32_log2(X_MAX), soclib::common::uint32_log2(Y_MAX), DSPIN_FIFO, DSPIN_FIFO); |
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| 159 | } |
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| 160 | } |
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| 161 | |
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| 162 | |
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| 163 | /////////////////////////////////////////////////////////////// |
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| 164 | // Components |
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| 165 | /////////////////////////////////////////////////////////////// |
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| 166 | |
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| 167 | // N_CLUSTERS VCI Synthetic Initiator (1 initiator per cluster/network) |
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| 168 | soclib::caba::VciSyntheticInitiator<vci_param> * initiator_c0 = (soclib::caba::VciSyntheticInitiator<vci_param> *) malloc(sizeof(soclib::caba::VciSyntheticInitiator<vci_param> )* N_CLUSTERS); |
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| 169 | soclib::caba::VciSyntheticInitiator<vci_param> * initiator_c1 = (soclib::caba::VciSyntheticInitiator<vci_param> *) malloc(sizeof(soclib::caba::VciSyntheticInitiator<vci_param> )* N_CLUSTERS); |
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| 170 | for(int i = 0 ; i < X_MAX; i++) |
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| 171 | for(int j = 0 ; j < Y_MAX ; j++){ |
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| 172 | std::ostringstream str0; |
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| 173 | std::ostringstream str1; |
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| 174 | str0 << "Initiator_c0_" << i << "_" << j ; |
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| 175 | str1 << "Initiator_c1_" << i << "_" << j ; |
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| 176 | new(&initiator_c0[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str0.str().c_str() , maptab0, IntTab((i*Y_MAX+j) ,0), PACKET_LENGTH, 0, 100, X_MAX, Y_MAX); |
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| 177 | new(&initiator_c1[Y_MAX*i+j]) soclib::caba::VciSyntheticInitiator<vci_param> (str1.str().c_str() , maptab1, IntTab((i*Y_MAX+j) ,0), PACKET_LENGTH, rho_b, 100, X_MAX, Y_MAX, rho_a, 0, X_MAX, 0, Y_MAX); |
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| 178 | } |
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| 179 | |
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| 180 | soclib::caba::VciSimpleRam<vci_param> * ram_c0 = (soclib::caba::VciSimpleRam<vci_param> *) malloc(sizeof(soclib::caba::VciSimpleRam<vci_param>) * N_CLUSTERS); |
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| 181 | soclib::caba::VciSimpleRam<vci_param> * ram_c1 = (soclib::caba::VciSimpleRam<vci_param> *) malloc(sizeof(soclib::caba::VciSimpleRam<vci_param>) * N_CLUSTERS); |
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| 182 | for(int i = 0 ; i < X_MAX ; i++) |
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| 183 | for(int j = 0 ; j < Y_MAX ; j++){ |
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| 184 | std::ostringstream str0; |
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| 185 | std::ostringstream str1; |
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| 186 | str0 << "Ram_c0_" << (i*Y_MAX+j) ; |
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| 187 | str1 << "Ram_c1_" << (i*Y_MAX+j) ; |
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| 188 | new(&ram_c0[Y_MAX*i+j]) soclib::caba::VciSimpleRam<vci_param> (str0.str().c_str() , IntTab(i*Y_MAX+j,0), maptab0, soclib::common::Loader(), 0); |
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| 189 | new(&ram_c1[Y_MAX*i+j]) soclib::caba::VciSimpleRam<vci_param> (str1.str().c_str() , IntTab(i*Y_MAX+j,0), maptab1, soclib::common::Loader(), 0); |
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| 190 | } |
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| 191 | |
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| 192 | /////////////////////////////////////////////////////////////// |
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| 193 | // Connection of Synthetic Initiator to each local ring per cluster |
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| 194 | /////////////////////////////////////////////////////////////// |
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| 195 | for(int i = 0 ; i < N_CLUSTERS ; i++){ |
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| 196 | local_ring_c0[i].p_clk(signal_clk); |
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| 197 | local_ring_c0[i].p_resetn(signal_resetn); |
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| 198 | local_ring_c0[i].p_to_initiator[0](signal_vci_ini_synth_c0[0][i]); |
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| 199 | local_ring_c0[i].p_to_target[0](signal_vci_ini_synth_c0[1][i]); |
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| 200 | initiator_c0[i].p_clk(signal_clk); |
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| 201 | initiator_c0[i].p_resetn(signal_resetn); |
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| 202 | initiator_c0[i].p_vci(signal_vci_ini_synth_c0[0][i]); |
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| 203 | ram_c0[i].p_clk(signal_clk); |
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| 204 | ram_c0[i].p_resetn(signal_resetn); |
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| 205 | ram_c0[i].p_vci(signal_vci_ini_synth_c0[1][i]); |
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| 206 | local_ring_c1[i].p_clk(signal_clk); |
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| 207 | local_ring_c1[i].p_resetn(signal_resetn); |
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| 208 | local_ring_c1[i].p_to_initiator[0](signal_vci_ini_synth_c1[0][i]); |
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| 209 | local_ring_c1[i].p_to_target[0](signal_vci_ini_synth_c1[1][i]); |
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| 210 | initiator_c1[i].p_clk(signal_clk); |
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| 211 | initiator_c1[i].p_resetn(signal_resetn); |
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| 212 | initiator_c1[i].p_vci(signal_vci_ini_synth_c1[0][i]); |
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| 213 | ram_c1[i].p_clk(signal_clk); |
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| 214 | ram_c1[i].p_resetn(signal_resetn); |
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| 215 | ram_c1[i].p_vci(signal_vci_ini_synth_c1[1][i]); |
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| 216 | } |
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| 217 | |
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| 218 | /////////////////////////////////////////////////////////////// |
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| 219 | // Connection of each VDspin Router to each local ring and |
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| 220 | // neighbors VDspin Router |
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| 221 | /////////////////////////////////////////////////////////////// |
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| 222 | for(int i = 0; i < X_MAX ; i++){ |
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| 223 | for(int j = 0; j < Y_MAX ; j++){ |
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| 224 | routers_cmd[i][j].p_clk(signal_clk); |
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| 225 | routers_cmd[i][j].p_resetn(signal_resetn); |
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| 226 | routers_rsp[i][j].p_clk(signal_clk); |
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| 227 | routers_rsp[i][j].p_resetn(signal_resetn); |
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| 228 | local_ring_c0[i*Y_MAX+j].p_gate_cmd_in( dspin_signals_cmd_c0[0][i][j][LOCAL]); |
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| 229 | local_ring_c1[i*Y_MAX+j].p_gate_cmd_in( dspin_signals_cmd_c1[0][i][j][LOCAL]); |
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| 230 | local_ring_c0[i*Y_MAX+j].p_gate_cmd_out(dspin_signals_cmd_c0[1][i][j][LOCAL]); |
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| 231 | local_ring_c1[i*Y_MAX+j].p_gate_cmd_out(dspin_signals_cmd_c1[1][i][j][LOCAL]); |
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| 232 | local_ring_c0[i*Y_MAX+j].p_gate_rsp_in( dspin_signals_rsp_c0[0][i][j][LOCAL]); |
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| 233 | local_ring_c1[i*Y_MAX+j].p_gate_rsp_in( dspin_signals_rsp_c1[0][i][j][LOCAL]); |
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| 234 | local_ring_c0[i*Y_MAX+j].p_gate_rsp_out(dspin_signals_rsp_c0[1][i][j][LOCAL]); |
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| 235 | local_ring_c1[i*Y_MAX+j].p_gate_rsp_out(dspin_signals_rsp_c1[1][i][j][LOCAL]); |
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| 236 | for(int k = 0; k < 5; k++){ |
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| 237 | if(j == 0){ |
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| 238 | if(i == 0){ |
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| 239 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
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| 240 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
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| 241 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
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| 242 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
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| 243 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
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| 244 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
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| 245 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
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| 246 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
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| 247 | } else { |
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| 248 | if(k == WEST){ |
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| 249 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i-1][j][EAST]); |
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| 250 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i-1][j][EAST]); |
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| 251 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i-1][j][EAST]); |
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| 252 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i-1][j][EAST]); |
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| 253 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i-1][j][EAST]); |
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| 254 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i-1][j][EAST]); |
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| 255 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i-1][j][EAST]); |
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| 256 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i-1][j][EAST]); |
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| 257 | } else { |
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| 258 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
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| 259 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
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| 260 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
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| 261 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
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| 262 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
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| 263 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
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| 264 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
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| 265 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
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| 266 | } |
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| 267 | } |
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| 268 | } else { |
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| 269 | if(k == SOUTH){ |
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| 270 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i][j-1][NORTH]); |
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| 271 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i][j-1][NORTH]); |
|---|
| 272 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i][j-1][NORTH]); |
|---|
| 273 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i][j-1][NORTH]); |
|---|
| 274 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i][j-1][NORTH]); |
|---|
| 275 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i][j-1][NORTH]); |
|---|
| 276 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i][j-1][NORTH]); |
|---|
| 277 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i][j-1][NORTH]); |
|---|
| 278 | } else if(k == WEST){ |
|---|
| 279 | if(i == 0){ |
|---|
| 280 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
|---|
| 281 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
|---|
| 282 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
|---|
| 283 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
|---|
| 284 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
|---|
| 285 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
|---|
| 286 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
|---|
| 287 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
|---|
| 288 | } else { |
|---|
| 289 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[1][i-1][j][EAST]); |
|---|
| 290 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[1][i-1][j][EAST]); |
|---|
| 291 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[0][i-1][j][EAST]); |
|---|
| 292 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[0][i-1][j][EAST]); |
|---|
| 293 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[1][i-1][j][EAST]); |
|---|
| 294 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[1][i-1][j][EAST]); |
|---|
| 295 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[0][i-1][j][EAST]); |
|---|
| 296 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[0][i-1][j][EAST]); |
|---|
| 297 | } |
|---|
| 298 | } else { |
|---|
| 299 | routers_cmd[i][j].p_out[0][k](dspin_signals_cmd_c0[0][i][j][k]); |
|---|
| 300 | routers_cmd[i][j].p_out[1][k](dspin_signals_cmd_c1[0][i][j][k]); |
|---|
| 301 | routers_cmd[i][j].p_in[0][k](dspin_signals_cmd_c0[1][i][j][k]); |
|---|
| 302 | routers_cmd[i][j].p_in[1][k](dspin_signals_cmd_c1[1][i][j][k]); |
|---|
| 303 | routers_rsp[i][j].p_out[0][k](dspin_signals_rsp_c0[0][i][j][k]); |
|---|
| 304 | routers_rsp[i][j].p_out[1][k](dspin_signals_rsp_c1[0][i][j][k]); |
|---|
| 305 | routers_rsp[i][j].p_in[0][k](dspin_signals_rsp_c0[1][i][j][k]); |
|---|
| 306 | routers_rsp[i][j].p_in[1][k](dspin_signals_rsp_c1[1][i][j][k]); |
|---|
| 307 | } |
|---|
| 308 | } |
|---|
| 309 | } |
|---|
| 310 | } |
|---|
| 311 | } |
|---|
| 312 | |
|---|
| 313 | //////////////////////////////////////////////// |
|---|
| 314 | // Simulation Loop // |
|---|
| 315 | //////////////////////////////////////////////// |
|---|
| 316 | |
|---|
| 317 | |
|---|
| 318 | sc_start(sc_core::sc_time(0, SC_NS)); |
|---|
| 319 | signal_resetn = false; |
|---|
| 320 | |
|---|
| 321 | for(int i = 0; i < X_MAX ; i++){ |
|---|
| 322 | for(int j = 0; j < Y_MAX ; j++){ |
|---|
| 323 | if(j == 0){ |
|---|
| 324 | dspin_signals_cmd_c0[0][i][j][SOUTH].read = true ; |
|---|
| 325 | dspin_signals_cmd_c0[1][i][j][SOUTH].write = false ; |
|---|
| 326 | dspin_signals_cmd_c1[0][i][j][SOUTH].read = true ; |
|---|
| 327 | dspin_signals_cmd_c1[1][i][j][SOUTH].write = false ; |
|---|
| 328 | dspin_signals_rsp_c0[0][i][j][SOUTH].read = true ; |
|---|
| 329 | dspin_signals_rsp_c0[1][i][j][SOUTH].write = false ; |
|---|
| 330 | dspin_signals_rsp_c1[0][i][j][SOUTH].read = true ; |
|---|
| 331 | dspin_signals_rsp_c1[1][i][j][SOUTH].write = false ; |
|---|
| 332 | } |
|---|
| 333 | if(j == Y_MAX-1){ |
|---|
| 334 | dspin_signals_cmd_c0[0][i][j][NORTH].read = true ; |
|---|
| 335 | dspin_signals_cmd_c0[1][i][j][NORTH].write = false ; |
|---|
| 336 | dspin_signals_cmd_c1[0][i][j][NORTH].read = true ; |
|---|
| 337 | dspin_signals_cmd_c1[1][i][j][NORTH].write = false ; |
|---|
| 338 | dspin_signals_rsp_c0[0][i][j][NORTH].read = true ; |
|---|
| 339 | dspin_signals_rsp_c0[1][i][j][NORTH].write = false ; |
|---|
| 340 | dspin_signals_rsp_c1[0][i][j][NORTH].read = true ; |
|---|
| 341 | dspin_signals_rsp_c1[1][i][j][NORTH].write = false ; |
|---|
| 342 | } |
|---|
| 343 | if(i == 0){ |
|---|
| 344 | dspin_signals_cmd_c0[0][i][j][WEST].read = true ; |
|---|
| 345 | dspin_signals_cmd_c0[1][i][j][WEST].write = false ; |
|---|
| 346 | dspin_signals_cmd_c1[0][i][j][WEST].read = true ; |
|---|
| 347 | dspin_signals_cmd_c1[1][i][j][WEST].write = false ; |
|---|
| 348 | dspin_signals_rsp_c0[0][i][j][WEST].read = true ; |
|---|
| 349 | dspin_signals_rsp_c0[1][i][j][WEST].write = false ; |
|---|
| 350 | dspin_signals_rsp_c1[0][i][j][WEST].read = true ; |
|---|
| 351 | dspin_signals_rsp_c1[1][i][j][WEST].write = false ; |
|---|
| 352 | } |
|---|
| 353 | if(i == X_MAX-1){ |
|---|
| 354 | dspin_signals_cmd_c0[0][i][j][EAST].read = true ; |
|---|
| 355 | dspin_signals_cmd_c0[1][i][j][EAST].write = false ; |
|---|
| 356 | dspin_signals_cmd_c1[0][i][j][EAST].read = true ; |
|---|
| 357 | dspin_signals_cmd_c1[1][i][j][EAST].write = false ; |
|---|
| 358 | dspin_signals_rsp_c0[0][i][j][EAST].read = true ; |
|---|
| 359 | dspin_signals_rsp_c0[1][i][j][EAST].write = false ; |
|---|
| 360 | dspin_signals_rsp_c1[0][i][j][EAST].read = true ; |
|---|
| 361 | dspin_signals_rsp_c1[1][i][j][EAST].write = false ; |
|---|
| 362 | } |
|---|
| 363 | } |
|---|
| 364 | } |
|---|
| 365 | |
|---|
| 366 | sc_start(sc_core::sc_time(1, SC_NS)); |
|---|
| 367 | signal_resetn = true; |
|---|
| 368 | |
|---|
| 369 | for(int t = 0; t < ncycles; t++){ |
|---|
| 370 | sc_start(sc_time(1, SC_NS)); |
|---|
| 371 | //initiator_c1[4].print_trace(); |
|---|
| 372 | //local_ring_c1[4].print_trace(); |
|---|
| 373 | //ram_c1[4].print_trace(); |
|---|
| 374 | #if defined(DEBUG) |
|---|
| 375 | for(int i = 0 ; i < Y_MAX ; i++){ |
|---|
| 376 | for(int j = 0 ; j < X_MAX ; j++){ |
|---|
| 377 | #endif |
|---|
| 378 | #if DEBUG==1 |
|---|
| 379 | //initiator_c0[i*Y_MAX+j].print_trace(); |
|---|
| 380 | //std::cout << std::hex; |
|---|
| 381 | //std::cout << "synt_cmdval = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmdval.read() << std::endl; |
|---|
| 382 | //std::cout << "synt_cmdack = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmdack.read() << std::endl; |
|---|
| 383 | //std::cout << "synt_address = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].address.read() << std::endl; |
|---|
| 384 | //std::cout << "synt_cmd = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].cmd.read() << std::endl; |
|---|
| 385 | //std::cout << "synt_srcid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].srcid.read() << std::endl; |
|---|
| 386 | //std::cout << "synt_trdid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].trdid.read() << std::endl; |
|---|
| 387 | //std::cout << "synt_plen = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].plen.read() << std::endl; |
|---|
| 388 | //std::cout << "synt_eop = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].eop.read() << std::endl; |
|---|
| 389 | //std::cout << "synt_rspval = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rspval.read() << std::endl; |
|---|
| 390 | //std::cout << "synt_rspack = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rspack.read() << std::endl; |
|---|
| 391 | //std::cout << "synt_rsrcid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rsrcid.read() << std::endl; |
|---|
| 392 | //std::cout << "synt_rtrdid = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rtrdid.read() << std::endl; |
|---|
| 393 | //std::cout << "synt_rpktid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rpktid.read() << std::endl; |
|---|
| 394 | //std::cout << "synt_rerror = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].rerror.read() << std::endl; |
|---|
| 395 | //std::cout << "synt_reop = " << signal_vci_ini_synth_c0[0][i*Y_MAX+j].reop.read() << std::endl; |
|---|
| 396 | //ram_c0[i*Y_MAX+j].print_trace(); |
|---|
| 397 | //std::cout << std::hex; |
|---|
| 398 | //std::cout << "ram_cmdval = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].cmdval.read() << std::endl; |
|---|
| 399 | //std::cout << "ram_address = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].address.read() << std::endl; |
|---|
| 400 | //std::cout << "ram_cmd = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].cmd.read() << std::endl; |
|---|
| 401 | //std::cout << "ram_srcid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].srcid.read() << std::endl; |
|---|
| 402 | //std::cout << "ram_trdid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].trdid.read() << std::endl; |
|---|
| 403 | //std::cout << "ram_plen = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].plen.read() << std::endl; |
|---|
| 404 | //std::cout << "ram_eop = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].eop.read() << std::endl; |
|---|
| 405 | //std::cout << "ram_rspval = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rspval.read() << std::endl; |
|---|
| 406 | //std::cout << "ram_rspack = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rspack.read() << std::endl; |
|---|
| 407 | //std::cout << "ram_rsrcid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rsrcid.read() << std::endl; |
|---|
| 408 | //std::cout << "ram_rtrdid = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rtrdid.read() << std::endl; |
|---|
| 409 | //std::cout << "ram_rerror = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].rerror.read() << std::endl; |
|---|
| 410 | //std::cout << "ram_reop = " << signal_vci_ini_synth_c0[1][i*Y_MAX+j].reop.read() << std::endl; |
|---|
| 411 | //initiator_c1[i*Y_MAX+j].print_trace(); |
|---|
| 412 | //std::cout << std::hex; |
|---|
| 413 | //std::cout << "synt_cmdval = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].cmdval.read() << std::endl; |
|---|
| 414 | //std::cout << "synt_cmdack = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].cmdack.read() << std::endl; |
|---|
| 415 | //std::cout << "synt_address = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].address.read() << std::endl; |
|---|
| 416 | //std::cout << "synt_cmd = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].cmd.read() << std::endl; |
|---|
| 417 | //std::cout << "synt_srcid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].srcid.read() << std::endl; |
|---|
| 418 | //std::cout << "synt_trdid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].trdid.read() << std::endl; |
|---|
| 419 | //std::cout << "synt_pktid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].pktid.read() << std::endl; |
|---|
| 420 | //std::cout << "synt_plen = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].plen.read() << std::endl; |
|---|
| 421 | //std::cout << "synt_eop = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].eop.read() << std::endl; |
|---|
| 422 | //std::cout << "synt_rspval = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rspval.read() << std::endl; |
|---|
| 423 | //std::cout << "synt_rspack = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rspack.read() << std::endl; |
|---|
| 424 | //std::cout << "synt_rsrcid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rsrcid.read() << std::endl; |
|---|
| 425 | //std::cout << "synt_rtrdid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rtrdid.read() << std::endl; |
|---|
| 426 | //std::cout << "synt_rpktid = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rpktid.read() << std::endl; |
|---|
| 427 | //std::cout << "synt_rerror = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].rerror.read() << std::endl; |
|---|
| 428 | //std::cout << "synt_reop = " << signal_vci_ini_synth_c1[0][i*Y_MAX+j].reop.read() << std::endl; |
|---|
| 429 | ram_c1[i*Y_MAX+j].print_trace(); |
|---|
| 430 | std::cout << std::hex; |
|---|
| 431 | std::cout << "ram_cmdval = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].cmdval.read() << std::endl; |
|---|
| 432 | std::cout << "ram_address = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].address.read() << std::endl; |
|---|
| 433 | std::cout << "ram_cmd = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].cmd.read() << std::endl; |
|---|
| 434 | std::cout << "ram_srcid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].srcid.read() << std::endl; |
|---|
| 435 | std::cout << "ram_trdid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].trdid.read() << std::endl; |
|---|
| 436 | std::cout << "ram_pktid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].pktid.read() << std::endl; |
|---|
| 437 | std::cout << "ram_plen = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].plen.read() << std::endl; |
|---|
| 438 | std::cout << "ram_eop = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].eop.read() << std::endl; |
|---|
| 439 | std::cout << "ram_rspval = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rspval.read() << std::endl; |
|---|
| 440 | std::cout << "ram_rspack = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rspack.read() << std::endl; |
|---|
| 441 | std::cout << "ram_rsrcid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rsrcid.read() << std::endl; |
|---|
| 442 | std::cout << "ram_rtrdid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rtrdid.read() << std::endl; |
|---|
| 443 | std::cout << "ram_rpktid = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rpktid.read() << std::endl; |
|---|
| 444 | std::cout << "ram_rerror = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].rerror.read() << std::endl; |
|---|
| 445 | std::cout << "ram_reop = " << signal_vci_ini_synth_c1[1][i*Y_MAX+j].reop.read() << std::endl; |
|---|
| 446 | #endif |
|---|
| 447 | #if DEBUG==2 |
|---|
| 448 | local_ring_c0[i*Y_MAX+j].print_trace(); |
|---|
| 449 | routers_cmd[i][j].print_trace(0); |
|---|
| 450 | std::cout << std::dec << t << " ns" << std::endl; |
|---|
| 451 | routers_rsp[i][j].print_trace(0); |
|---|
| 452 | #endif |
|---|
| 453 | #ifdef DEBUG |
|---|
| 454 | } |
|---|
| 455 | } |
|---|
| 456 | #endif |
|---|
| 457 | //initiator_c1[4].print_trace(); |
|---|
| 458 | //std::cout << std::hex; |
|---|
| 459 | //std::cout << "synt_cmdval = " << signal_vci_ini_synth_c1[0][255].cmdval.read() << std::endl; |
|---|
| 460 | //std::cout << "synt_cmdack = " << signal_vci_ini_synth_c1[0][255].cmdack.read() << std::endl; |
|---|
| 461 | //std::cout << "synt_address = " << signal_vci_ini_synth_c1[0][255].address.read() << std::endl; |
|---|
| 462 | //std::cout << "synt_cmd = " << signal_vci_ini_synth_c1[0][255].cmd.read() << std::endl; |
|---|
| 463 | //std::cout << "synt_srcid = " << signal_vci_ini_synth_c1[0][255].srcid.read() << std::endl; |
|---|
| 464 | //std::cout << "synt_trdid = " << signal_vci_ini_synth_c1[0][255].trdid.read() << std::endl; |
|---|
| 465 | //std::cout << "synt_pktid = " << signal_vci_ini_synth_c1[0][255].pktid.read() << std::endl; |
|---|
| 466 | //std::cout << "synt_plen = " << signal_vci_ini_synth_c1[0][255].plen.read() << std::endl; |
|---|
| 467 | //std::cout << "synt_eop = " << signal_vci_ini_synth_c1[0][255].eop.read() << std::endl; |
|---|
| 468 | //std::cout << "synt_rspval = " << signal_vci_ini_synth_c1[0][255].rspval.read() << std::endl; |
|---|
| 469 | //std::cout << "synt_rspack = " << signal_vci_ini_synth_c1[0][255].rspack.read() << std::endl; |
|---|
| 470 | //std::cout << "synt_rsrcid = " << signal_vci_ini_synth_c1[0][255].rsrcid.read() << std::endl; |
|---|
| 471 | //std::cout << "synt_rtrdid = " << signal_vci_ini_synth_c1[0][255].rtrdid.read() << std::endl; |
|---|
| 472 | //std::cout << "synt_rpktid = " << signal_vci_ini_synth_c1[0][255].rpktid.read() << std::endl; |
|---|
| 473 | //std::cout << "synt_rerror = " << signal_vci_ini_synth_c1[0][255].rerror.read() << std::endl; |
|---|
| 474 | //std::cout << "synt_reop = " << signal_vci_ini_synth_c1[0][255].reop.read() << std::endl; |
|---|
| 475 | //ram_c1[4].print_trace(); |
|---|
| 476 | //std::cout << std::hex; |
|---|
| 477 | //std::cout << "ram_cmdval = " << signal_vci_ini_synth_c1[1][4].cmdval.read() << std::endl; |
|---|
| 478 | //std::cout << "ram_address = " << signal_vci_ini_synth_c1[1][4].address.read() << std::endl; |
|---|
| 479 | //std::cout << "ram_cmd = " << signal_vci_ini_synth_c1[1][4].cmd.read() << std::endl; |
|---|
| 480 | //std::cout << "ram_srcid = " << signal_vci_ini_synth_c1[1][4].srcid.read() << std::endl; |
|---|
| 481 | //std::cout << "ram_trdid = " << signal_vci_ini_synth_c1[1][4].trdid.read() << std::endl; |
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| 482 | //std::cout << "ram_pktid = " << signal_vci_ini_synth_c1[1][4].pktid.read() << std::endl; |
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| 483 | //std::cout << "ram_plen = " << signal_vci_ini_synth_c1[1][4].plen.read() << std::endl; |
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| 484 | //std::cout << "ram_eop = " << signal_vci_ini_synth_c1[1][4].eop.read() << std::endl; |
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| 485 | //std::cout << "ram_rspval = " << signal_vci_ini_synth_c1[1][4].rspval.read() << std::endl; |
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| 486 | //std::cout << "ram_rspack = " << signal_vci_ini_synth_c1[1][4].rspack.read() << std::endl; |
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| 487 | //std::cout << "ram_rsrcid = " << signal_vci_ini_synth_c1[1][4].rsrcid.read() << std::endl; |
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| 488 | //std::cout << "ram_rtrdid = " << signal_vci_ini_synth_c1[1][4].rtrdid.read() << std::endl; |
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| 489 | //std::cout << "ram_rpktid = " << signal_vci_ini_synth_c1[1][4].rpktid.read() << std::endl; |
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| 490 | //std::cout << "ram_rerror = " << signal_vci_ini_synth_c1[1][4].rerror.read() << std::endl; |
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| 491 | //std::cout << "ram_reop = " << signal_vci_ini_synth_c1[1][4].reop.read() << std::endl; |
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| 492 | |
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| 493 | //for(int i = 0 ; i < Y_MAX ; i++){ |
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| 494 | // for(int j = 0 ; j < X_MAX ; j++){ |
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| 495 | // std::cout << std::dec << t << " cycles " << std::endl; |
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| 496 | // local_ring_c1[i*Y_MAX+j].print_trace(); |
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| 497 | // //initiator_c1[i*Y_MAX+j].print_trace(); |
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| 498 | // } |
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| 499 | //} |
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| 500 | //initiator_c1[4].print_trace(); |
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| 501 | //std::cout << std::hex; |
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| 502 | //std::cout << "synt_cmdval = " << signal_vci_ini_synth_c1[0][4].cmdval.read() << std::endl; |
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| 503 | //std::cout << "synt_cmdack = " << signal_vci_ini_synth_c1[0][4].cmdack.read() << std::endl; |
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| 504 | //std::cout << "synt_address = " << signal_vci_ini_synth_c1[0][4].address.read() << std::endl; |
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| 505 | //std::cout << "synt_cmd = " << signal_vci_ini_synth_c1[0][4].cmd.read() << std::endl; |
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| 506 | //std::cout << "synt_srcid = " << signal_vci_ini_synth_c1[0][4].srcid.read() << std::endl; |
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| 507 | //std::cout << "synt_trdid = " << signal_vci_ini_synth_c1[0][4].trdid.read() << std::endl; |
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| 508 | //std::cout << "synt_pktid = " << signal_vci_ini_synth_c1[0][4].pktid.read() << std::endl; |
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| 509 | //std::cout << "synt_plen = " << signal_vci_ini_synth_c1[0][4].plen.read() << std::endl; |
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| 510 | //std::cout << "synt_eop = " << signal_vci_ini_synth_c1[0][4].eop.read() << std::endl; |
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| 511 | //std::cout << "synt_rspval = " << signal_vci_ini_synth_c1[0][4].rspval.read() << std::endl; |
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| 512 | //std::cout << "synt_rspack = " << signal_vci_ini_synth_c1[0][4].rspack.read() << std::endl; |
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| 513 | //std::cout << "synt_rsrcid = " << signal_vci_ini_synth_c1[0][4].rsrcid.read() << std::endl; |
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| 514 | //std::cout << "synt_rtrdid = " << signal_vci_ini_synth_c1[0][4].rtrdid.read() << std::endl; |
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| 515 | //std::cout << "synt_rpktid = " << signal_vci_ini_synth_c1[0][4].rpktid.read() << std::endl; |
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| 516 | //std::cout << "synt_rerror = " << signal_vci_ini_synth_c1[0][4].rerror.read() << std::endl; |
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| 517 | //std::cout << "synt_reop = " << signal_vci_ini_synth_c1[0][4].reop.read() << std::endl; |
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| 518 | //local_ring_c1[4].print_trace(); |
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| 519 | //initiator_c1[27].print_fifo_state(); |
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| 520 | //if (!(t%1000000)) |
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| 521 | // std::cout <<std::dec << t << " 1000000 cycles passed" << std::endl; |
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| 522 | |
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| 523 | |
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| 524 | } |
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| 525 | |
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| 526 | //double latency_c0 = 0; |
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| 527 | double latency_c1 = 0; |
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| 528 | double latency_bc = 0; |
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| 529 | std::cout << "Results : " << std::endl; |
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| 530 | for(int i = 0 ; i < Y_MAX ; i++){ |
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| 531 | for(int j = 0 ; j < X_MAX ; j++){ |
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| 532 | //initiator_c0[i*Y_MAX+j].printStats(); |
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| 533 | //latency_c0 += initiator_c0[i*Y_MAX+j].getLatencySingle() ; |
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| 534 | initiator_c1[i*Y_MAX+j].printStats(); |
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| 535 | latency_c1 += initiator_c1[i*Y_MAX+j].getLatencySingle() ; |
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| 536 | latency_bc += initiator_c1[i*Y_MAX+j].getLatencyBC(); |
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| 537 | std::cout << "bc latency " << latency_bc << std::endl; |
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| 538 | } |
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| 539 | } |
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| 540 | |
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| 541 | |
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| 542 | //std::cout << "Latency_c0 : " << latency_c0 << std::endl; |
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| 543 | std::cout << "Latency_c1 : " << latency_c1 << std::endl; |
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| 544 | std::cout << "BC latency : " << latency_bc << std::endl; |
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| 545 | |
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| 546 | std::cout << "Simulation Ends" << std::endl; |
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| 547 | |
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| 548 | |
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| 549 | return EXIT_SUCCESS; |
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| 550 | } |
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| 551 | |
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| 552 | int sc_main (int argc, char *argv[]) |
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| 553 | { |
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| 554 | try { |
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| 555 | return _main(argc, argv); |
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| 556 | } catch (std::exception &e) { |
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| 557 | std::cout << e.what() << std::endl; |
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| 558 | } catch (...) { |
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| 559 | std::cout << "Unknown exception occured" << std::endl; |
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| 560 | throw; |
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| 561 | } |
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| 562 | return 1; |
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| 563 | } |
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| 564 | |
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