source: trunk/platforms/fpga_3_tsar_v1/segmentation.h @ 264

Last change on this file since 264 was 42, checked in by guthmull, 14 years ago

Add a pf similar to the fpga one

File size: 2.3 KB
Line 
1
2/////////////////////////////////////////////////////////////////
3//      ADDRESS SPACE SEGMENTATION
4//
5//      This file must be included in the system.cpp file,
6//      for harware configuration : It is used to build
7//      the SOCLIB_SEGMENT_TABLE.
8//
9//      This file can also be used by the ldscript generator,
10//      for embedded software generation.
11//     
12//      It gives the system integrator the garanty
13//      that hardware and software have the same
14//      description of the address space segmentation.
15/////////////////////////////////////////////////////////////////
16
17/////////////////////////////////////////////////////////////////
18//      reset, and exception segments
19//      base address required by MIPS processor
20/////////////////////////////////////////////////////////////////
21#define MMU
22
23#define RESET_BASE      0xBFC00000
24#define RESET_SIZE      0x00010000
25
26#define EXCEP_BASE      0x80000080
27#define EXCEP_SIZE      0x00000080
28
29#define TEXT_BASE       0x00400000
30#define TEXT_SIZE       0x00001F80
31
32#define DATA_BASE       0xBE000000
33#define DATA_SIZE       0x00001F80
34/////////////////////////////////////////////////////////////////
35//      global data segment (initialised)
36/////////////////////////////////////////////////////////////////
37
38#define MC_M_BASE       0xC0000000
39#define MC_M_SIZE       0x3FFFFFFC
40
41/////////////////////////////////////////////////////////////////
42//      page table (initialised)
43/////////////////////////////////////////////////////////////////
44#define PTD_ADDR        0x40400000
45#define PTE_ADDR        0x40402000
46#define IPTE_ADDR       0x40403000
47#define TAB_SIZE        0x00010000
48
49#define V_TTY_BASE      0x00800000
50#define V_TIMER_BASE    0x00C00000      // timer virtual address
51//////////////////////////////////////////////////////////
52//      System devices
53///////////////////////////////////////////////////////////
54
55#define TTY_BASE        0x10200000
56#define TTY_SIZE        0x00000040
57
58#define TIMER_BASE      0xD0200000
59#define TIMER_SIZE      0x00000100
60
61#define LOCKS_BASE      0xE0200000
62#define LOCKS_SIZE      0x00000100
63
64#define C_PROC0_BASE    0x01200000
65#define C_PROC0_SIZE    0x00000010
66
67#define C_PROC1_BASE    0x02200000
68#define C_PROC1_SIZE    0x00000010
69
70#define C_PROC2_BASE    0x03200000
71#define C_PROC2_SIZE    0x00000010
72
73#define C_PROC3_BASE    0x04200000
74#define C_PROC3_SIZE    0x00000010
75
76#define C_MC_M_BASE     0x00200000
77#define C_MC_M_SIZE     0x00000008
78
79#define XRAM_BASE       0xB0200000
80#define XRAM_SIZE       0x00000008
81
82#define MC_R_BASE       0x20200000
83#define MC_R_SIZE       0x00000008
84
85#define CLEANUP_OFFSET  0x20200000
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