source: trunk/platforms/platform_fpga_de2-115/platform_desc @ 275

Last change on this file since 275 was 275, checked in by bouyer, 12 years ago

This VHDL implementation uses rings, use rings here too.

File size: 715 bytes
Line 
1
2# -*- python -*-
3
4
5todo = Platform('caba', 'top.cpp',
6                uses = [
7        Uses('caba:vci_cc_vcache_wrapper_v4', iss_t = 'common:mips32el'),
8        Uses('caba:vci_simple_ram'),
9        Uses('caba:vci_multi_tty'),
10        Uses('caba:vci_xicu'),
11        Uses('caba:vci_block_device_tsar_v4'),
12        Uses('caba:vci_simhelper'),
13        Uses('caba:vci_framebuffer'),
14        Uses('caba:vci_simple_ring_fast',
15              ring_cmd_data_size=40,
16              ring_rsp_data_size=33
17        ),
18        Uses('caba:vci_logger'),
19        Uses('caba:vci_mem_cache_v4'),
20        Uses('common:elf_file_loader'),
21        ],
22        cell_size = 4,
23        plen_size = 8,
24        addr_size = 32,
25        rerror_size = 2,
26        clen_size = 1,
27        rflag_size = 1,
28        srcid_size = 5,
29        pktid_size = 4,
30        trdid_size = 4,
31        wrplen_size = 1
32)
33
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