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source: trunk/platforms/tsar_generic_iob/arch.py @ 971

Last change on this file since 971 was 966, checked in by alain, 10 years ago
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Rev	Line
[938]	1	#!/usr/bin/env python
[707]	2
[802]	3	from math import log, ceil
[707]	4	from mapping import *
	5
[938]	6	##################################################################################
[714]	7	# file : arch.py (for the tsar_generic_iob architecture)
[707]	8	# date : may 2014
	9	# author : Alain Greiner
[938]	10	##################################################################################
[802]	11	# This file contains a mapping generator for the "tsar_generic_iob" platform.
[707]	12	# This includes both the hardware architecture (clusters, processors, peripherals,
[938]	13	# physical space segmentation) and the mapping of all boot and kernel objects
	14	# (global vsegs).
[714]	15	#
[966]	16	# This platform includes 7 external peripherals, accessible through an IOB
[938]	17	# components located in cluster [0,0] or in cluster [x_size-1, y_size-1].
[966]	18	# Available peripherals are: TTY, IOC, FBF, ROM, NIC, CMA, PIC.
[938]	19	#
	20	# All clusters contain (nb_procs) processors, one L2 cache, one XCU, and
	21	# one DMA controller.
	22	#
[966]	23	# The "constructor" parameters (defined in Makefile) are:
[714]	24	# - x_size : number of clusters in a row
	25	# - y_size : number of clusters in a column
	26	# - nb_procs : number of processors per cluster
[874]	27	# - nb_ttys : number of TTY channels
[817]	28	# - fbf_width : frame_buffer width = frame_buffer heigth
[966]	29	# - ioc_type : can be 'BDV','HBA','SDC', but not 'RDK'
[714]	30	#
[966]	31	# The other hardware parameters (defined below) are:
[714]	32	# - nb_nics : number of NIC channels
[938]	33	# - nb_cmas : number of CMA channels
[714]	34	# - x_io : cluster_io x coordinate
	35	# - y_io : cluster_io y coordinate
	36	# - x_width : number of bits for x coordinate
	37	# - y_width : number of bits for y coordinate
	38	# - paddr_width : number of bits for physical address
	39	# - irq_per_proc : number of input IRQs per processor
	40	# - use_ramdisk : use a ramdisk when True
[966]	41	# - vseg_increment : address increment for replicated vsegs
[817]	42	#
[938]	43	# Regarding the boot and kernel vsegs mapping :
	44	# - We use one big physical page (2 Mbytes) for the preloader and the four
	45	# boot vsegs, all allocated in cluster[0,0].
	46	# - We use one big page per cluster for the replicated kernel code vsegs.
	47	# - We use one big page in cluster[0][0] for the kernel data vseg.
	48	# - We use one big page per cluster for the distributed kernel heap vsegs.
	49	# - We use one big page per cluster for the distributed ptab vsegs.
	50	# - We use small physical pages (4 Kbytes) per cluster for the schedulers.
	51	# - We use one big page for each external peripheral in IO cluster,
	52	# - We use one small page per cluster for each internal peripheral.
	53	##################################################################################
[707]	54
[714]	55	########################
	56	def arch( x_size = 2,
	57	y_size = 2,
[817]	58	nb_procs = 2,
[874]	59	nb_ttys = 1,
[965]	60	fbf_width = 128,
	61	ioc_type = 'BDV' ):
[714]	62
	63	### define architecture constants
	64
[913]	65	nb_nics = 1
	66	nb_cmas = 2
[817]	67	x_io = 0
	68	y_io = 0
	69	x_width = 4
	70	y_width = 4
	71	p_width = 4
	72	paddr_width = 40
[966]	73	irq_per_proc = 4 # NetBSD constraint
	74	peri_increment = 0x10000
[802]	75
[707]	76	### parameters checking
[714]	77
[802]	78	assert( nb_procs <= (1 << p_width) )
[707]	79
[802]	80	assert( (x_size == 1) or (x_size == 2) or (x_size == 4)
[764]	81	or (x_size == 8) or (x_size == 16) )
[707]	82
[802]	83	assert( (y_size == 1) or (y_size == 2) or (y_size == 4)
[707]	84	or (y_size == 8) or (y_size == 16) )
	85
[943]	86	assert( (nb_ttys >= 1) and (nb_ttys <= 8) )
[707]	87
	88	assert( ((x_io == 0) and (y_io == 0)) or
	89	((x_io == x_size-1) and (y_io == y_size-1)) )
	90
[966]	91	assert( ioc_type in [ 'BDV' , 'HBA' , 'SDC' ] )
[965]	92
	93	### define platform name
[802]	94
[965]	95	platform_name = 'tsar_iob_%d_%d_%d' % ( x_size, y_size , nb_procs )
	96	platform_name += '_%d_%d_%s' % ( fbf_width , nb_ttys , ioc_type )
[707]	97
[938]	98	### define physical segments replicated in all clusters
	99
[707]	100	ram_base = 0x0000000000
[913]	101	ram_size = 0x1000000 # 16 Mbytes
[707]	102
[802]	103	xcu_base = 0x00B0000000
	104	xcu_size = 0x1000 # 4 Kbytes
[707]	105
	106	dma_base = 0x00B1000000
[817]	107	dma_size = 0x1000 # 4 Kbytes
[707]	108
[802]	109	mmc_base = 0x00B2000000
[714]	110	mmc_size = 0x1000 # 4 Kbytes
[707]	111
[817]	112	### define physical segments for external peripherals
	113	## These segments are only defined in cluster_io
	114
[965]	115	ioc_base = 0x00B3000000
	116	ioc_size = 0x1000 # 4 Kbytes
[707]	117
[945]	118	tty_base = 0x00B4000000
[714]	119	tty_size = 0x4000 # 16 Kbytes
[707]	120
[945]	121	nic_base = 0x00B5000000
[714]	122	nic_size = 0x80000 # 512 kbytes
[707]	123
[945]	124	cma_base = 0x00B6000000
[714]	125	cma_size = 0x1000 * 2 * nb_nics # 4 kbytes * 2 * nb_nics
[707]	126
[945]	127	fbf_base = 0x00B7000000
[874]	128	fbf_size = fbf_width * fbf_width # fbf_width * fbf_width bytes
[707]	129
[945]	130	pic_base = 0x00B8000000
[714]	131	pic_size = 0x1000 # 4 Kbytes
[707]	132
[945]	133	iob_base = 0x00BE000000
[817]	134	iob_size = 0x1000 # 4 bytes
[707]	135
[945]	136	rom_base = 0x00BFC00000
[714]	137	rom_size = 0x4000 # 16 Kbytes
[707]	138
[754]	139	### define bootloader vsegs base addresses and sizes
[817]	140	### We want to pack these 4 vsegs in the same big page
[913]	141	### => boot cost is one BIG page in cluster[0][0]
[707]	142
[913]	143	boot_mapping_vbase = 0x00000000 # ident
	144	boot_mapping_size = 0x00080000 # 512 Kbytes
[707]	145
[913]	146	boot_code_vbase = 0x00080000 # ident
	147	boot_code_size = 0x00040000 # 256 Kbytes
[802]	148
[913]	149	boot_data_vbase = 0x000C0000 # ident
	150	boot_data_size = 0x000C0000 # 768 Kbytes
[707]	151
[913]	152	boot_stack_vbase = 0x00180000 # ident
	153	boot_stack_size = 0x00080000 # 512 Kbytes
[707]	154
[754]	155	### define kernel vsegs base addresses and sizes
[913]	156	### code, init, ptab, heap & sched vsegs are replicated in all clusters.
[817]	157	### data & uncdata vsegs are only mapped in cluster[0][0].
[707]	158
[802]	159	kernel_code_vbase = 0x80000000
[913]	160	kernel_code_size = 0x00100000 # 1 Mbytes per cluster
[707]	161
[913]	162	kernel_init_vbase = 0x80100000
	163	kernel_init_size = 0x00100000 # 1 Mbytes per cluster
[707]	164
[913]	165	kernel_data_vbase = 0x90000000
	166	kernel_data_size = 0x00200000 # 2 Mbytes in cluster[0,0]
[707]	167
[817]	168	kernel_ptab_vbase = 0xE0000000
[913]	169	kernel_ptab_size = 0x00200000 # 2 Mbytes per cluster
[707]	170
[913]	171	kernel_heap_vbase = 0xD0000000
	172	kernel_heap_size = 0x00200000 # 2 Mbytes per cluster
[707]	173
[817]	174	kernel_sched_vbase = 0xA0000000
	175	kernel_sched_size = 0x00002000*nb_procs # 8 Kbytes per proc per cluster
	176
[938]	177	#########################
[707]	178	### create mapping
[938]	179	#########################
[707]	180
[817]	181	mapping = Mapping( name = platform_name,
	182	x_size = x_size,
	183	y_size = y_size,
	184	nprocs = nb_procs,
	185	x_width = x_width,
	186	y_width = y_width,
[802]	187	p_width = p_width,
[817]	188	paddr_width = paddr_width,
	189	coherence = True,
	190	irq_per_proc = irq_per_proc,
[965]	191	use_ramdisk = (ioc_type == 'RDK'),
[817]	192	x_io = x_io,
[714]	193	y_io = y_io,
[802]	194	peri_increment = peri_increment,
	195	ram_base = ram_base,
	196	ram_size = ram_size )
[707]	197
	198
[938]	199	#############################
	200	### Hardware Components
	201	#############################
[707]	202
[938]	203	for x in xrange( x_size ):
	204	for y in xrange( y_size ):
	205	cluster_xy = (x << y_width) + y;
	206	offset = cluster_xy << (paddr_width - x_width - y_width)
[707]	207
[938]	208	### components replicated in all clusters
	209	ram = mapping.addRam( 'RAM', base = ram_base + offset,
	210	size = ram_size )
[707]	211
[938]	212	mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset,
	213	size = mmc_size, ptype = 'MMC' )
[707]	214
[938]	215	dma = mapping.addPeriph( 'DMA', base = dma_base + offset,
	216	size = dma_size, ptype = 'DMA',
	217	channels = nb_procs )
[707]	218
[938]	219	xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset,
	220	size = xcu_size, ptype = 'XCU',
[955]	221	channels = nb_procs * irq_per_proc,
[959]	222	arg0 = 32, arg1 = 32, arg2 = 32 )
[707]	223
[938]	224	mapping.addIrq( xcu, index = 0, isrtype = 'ISR_MMC' )
[707]	225
[938]	226	for i in xrange ( dma.channels ):
	227	mapping.addIrq( xcu, index = 1+i, isrtype = 'ISR_DMA',
	228	channel = i )
[707]	229
[938]	230	for p in xrange ( nb_procs ):
	231	mapping.addProc( x, y, p )
[707]	232
[938]	233	### external peripherals in cluster_io
	234	if ( (x==x_io) and (y==y_io) ):
[707]	235
[945]	236	iob = mapping.addPeriph( 'IOB', base = iob_base + offset, size = iob_size,
[938]	237	ptype = 'IOB' )
[707]	238
[965]	239	ioc = mapping.addPeriph( 'IOC', base = ioc_base + offset, size = ioc_size,
	240	ptype = 'IOC', subtype = ioc_type )
[707]	241
[945]	242	tty = mapping.addPeriph( 'TTY', base = tty_base + offset, size = tty_size,
[938]	243	ptype = 'TTY', channels = nb_ttys )
[710]	244
[945]	245	nic = mapping.addPeriph( 'NIC', base = nic_base + offset, size = nic_size,
[938]	246	ptype = 'NIC', channels = nb_nics )
[707]	247
[945]	248	cma = mapping.addPeriph( 'CMA', base = cma_base + offset, size = cma_size,
[938]	249	ptype = 'CMA', channels = nb_cmas )
[707]	250
[945]	251	fbf = mapping.addPeriph( 'FBF', base = fbf_base + offset, size = fbf_size,
[955]	252	ptype = 'FBF', arg0 = fbf_width, arg1 = fbf_width )
[707]	253
[945]	254	rom = mapping.addPeriph( 'ROM', base = rom_base + offset, size = rom_size,
[938]	255	ptype = 'ROM' )
[707]	256
[945]	257	pic = mapping.addPeriph( 'PIC', base = pic_base + offset, size = pic_size,
[938]	258	ptype = 'PIC', channels = 32 )
[707]	259
[938]	260	mapping.addIrq( pic, index = 0, isrtype = 'ISR_NIC_RX', channel = 0 )
	261	mapping.addIrq( pic, index = 1, isrtype = 'ISR_NIC_RX', channel = 1 )
[707]	262
[938]	263	mapping.addIrq( pic, index = 2, isrtype = 'ISR_NIC_TX', channel = 0 )
	264	mapping.addIrq( pic, index = 3, isrtype = 'ISR_NIC_TX', channel = 1 )
[710]	265
[938]	266	mapping.addIrq( pic, index = 4, isrtype = 'ISR_CMA' , channel = 0 )
	267	mapping.addIrq( pic, index = 5, isrtype = 'ISR_CMA' , channel = 1 )
	268	mapping.addIrq( pic, index = 6, isrtype = 'ISR_CMA' , channel = 2 )
	269	mapping.addIrq( pic, index = 7, isrtype = 'ISR_CMA' , channel = 3 )
[770]	270
[965]	271	if ( ioc_type == 'BDV' ): isr_ioc = 'ISR_BDV'
	272	if ( ioc_type == 'HBA' ): isr_ioc = 'ISR_HBA'
	273	if ( ioc_type == 'SDC' ): isr_ioc = 'ISR_SDC'
[707]	274
[965]	275	mapping.addIrq( pic, index = 8, isrtype = isr_ioc , channel = 0 )
	276
[938]	277	mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 )
	278	mapping.addIrq( pic, index = 17, isrtype = 'ISR_TTY_RX', channel = 1 )
	279	mapping.addIrq( pic, index = 18, isrtype = 'ISR_TTY_RX', channel = 2 )
	280	mapping.addIrq( pic, index = 19, isrtype = 'ISR_TTY_RX', channel = 3 )
	281	mapping.addIrq( pic, index = 20, isrtype = 'ISR_TTY_RX', channel = 4 )
	282	mapping.addIrq( pic, index = 21, isrtype = 'ISR_TTY_RX', channel = 5 )
	283	mapping.addIrq( pic, index = 22, isrtype = 'ISR_TTY_RX', channel = 6 )
	284	mapping.addIrq( pic, index = 23, isrtype = 'ISR_TTY_RX', channel = 7 )
	285
	286
	287	####################################
	288	### Boot & Kernel vsegs mapping
	289	####################################
	290
[817]	291	### global vsegs for boot_loader
	292	### we want to pack those 4 vsegs in the same big page
	293	### => same flags CXW_ / identity mapping / non local / big page
[707]	294
[730]	295	mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size,
[817]	296	'CXW_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM',
	297	identity = True , local = False, big = True )
[707]	298
[730]	299	mapping.addGlobal( 'seg_boot_code', boot_code_vbase, boot_code_size,
	300	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
[817]	301	identity = True , local = False, big = True )
[707]	302
[730]	303	mapping.addGlobal( 'seg_boot_data', boot_data_vbase, boot_data_size,
[817]	304	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	305	identity = True , local = False, big = True )
[707]	306
[730]	307	mapping.addGlobal( 'seg_boot_stack', boot_stack_vbase, boot_stack_size,
[817]	308	'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
	309	identity = True , local = False, big = True )
[707]	310
[943]	311	### global vseg kernel_data : big / non local
	312	### Only mapped in cluster[0][0]
	313	mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size,
	314	'CXW_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM',
	315	binpath = 'build/kernel/kernel.elf',
	316	local = False, big = True )
	317
[913]	318	### global vsegs kernel_code, kernel_init : big / local
[965]	319	### replicated in all clusters with indexed name & same vbase
[874]	320	for x in xrange( x_size ):
	321	for y in xrange( y_size ):
[965]	322	mapping.addGlobal( 'seg_kernel_code_%d_%d' %(x,y),
	323	kernel_code_vbase, kernel_code_size,
[817]	324	'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
	325	binpath = 'build/kernel/kernel.elf',
	326	local = True, big = True )
[707]	327
[965]	328	mapping.addGlobal( 'seg_kernel_init_%d_%d' %(x,y),
	329	kernel_init_vbase, kernel_init_size,
[817]	330	'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
	331	binpath = 'build/kernel/kernel.elf',
	332	local = True, big = True )
[707]	333
[938]	334	### Global vsegs kernel_ptab_x_y : big / non local
	335	### one vseg per cluster: name indexed by (x,y)
	336	for x in xrange( x_size ):
	337	for y in xrange( y_size ):
	338	offset = ((x << y_width) + y) * kernel_ptab_size
	339	base = kernel_ptab_vbase + offset
	340	mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), base, kernel_ptab_size,
	341	'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM',
	342	local = False , big = True )
	343
[913]	344	### global vsegs kernel_sched_x_y : small / non local
[874]	345	### one vseg per cluster with name indexed by (x,y)
[817]	346	for x in xrange( x_size ):
	347	for y in xrange( y_size ):
[913]	348	offset = ((x << y_width) + y) * kernel_sched_size
[938]	349	mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y),
	350	kernel_sched_vbase + offset , kernel_sched_size,
[817]	351	'C_W_', vtype = 'SCHED', x = x , y = y , pseg = 'RAM',
	352	local = False, big = False )
[707]	353
[913]	354	### global vsegs kernel_heap_x_y : big / non local
	355	### one vseg per cluster with name indexed by (x,y)
	356	for x in xrange( x_size ):
	357	for y in xrange( y_size ):
	358	offset = ((x << y_width) + y) * kernel_heap_size
[938]	359	mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y),
	360	kernel_heap_vbase + offset , kernel_heap_size,
[913]	361	'C_W_', vtype = 'HEAP', x = x , y = y , pseg = 'RAM',
	362	local = False, big = True )
	363
[817]	364	### global vsegs for external peripherals : non local / big page
[802]	365	mapping.addGlobal( 'seg_iob', iob_base, iob_size, '__W_',
	366	vtype = 'PERI', x = 0, y = 0, pseg = 'IOB',
[817]	367	local = False, big = True )
[707]	368
[965]	369	mapping.addGlobal( 'seg_ioc', ioc_base, ioc_size, '__W_',
	370	vtype = 'PERI', x = 0, y = 0, pseg = 'IOC',
[817]	371	local = False, big = True )
[707]	372
[802]	373	mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_',
[730]	374	vtype = 'PERI', x = 0, y = 0, pseg = 'TTY',
[817]	375	local = False, big = True )
[707]	376
[802]	377	mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_',
[730]	378	vtype = 'PERI', x = 0, y = 0, pseg = 'NIC',
[817]	379	local = False, big = True )
[707]	380
[802]	381	mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_',
[730]	382	vtype = 'PERI', x = 0, y = 0, pseg = 'CMA',
[817]	383	local = False, big = True )
[707]	384
[802]	385	mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_',
[730]	386	vtype = 'PERI', x = 0, y = 0, pseg = 'FBF',
[817]	387	local = False, big = True )
[707]	388
[802]	389	mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_',
[730]	390	vtype = 'PERI', x = 0, y = 0, pseg = 'PIC',
[817]	391	local = False, big = True )
[707]	392
[802]	393	mapping.addGlobal( 'seg_rom', rom_base, rom_size, 'CXW_',
[730]	394	vtype = 'PERI', x = 0, y = 0, pseg = 'ROM',
[817]	395	local = False, big = True )
[707]	396
[817]	397	### global vsegs for internal peripherals : non local / small pages
	398	### allocated in all clusters with name indexed by (x,y)
	399	### as vbase address is incremented by (cluster_xy * vseg_increment)
[714]	400	for x in xrange( x_size ):
	401	for y in xrange( y_size ):
[817]	402	offset = ((x << y_width) + y) * peri_increment
[707]	403
[714]	404	mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), xcu_base + offset, xcu_size,
[817]	405	'__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU',
	406	local = False, big = False )
[707]	407
[714]	408	mapping.addGlobal( 'seg_dma_%d_%d' %(x,y), dma_base + offset, dma_size,
[817]	409	'__W_', vtype = 'PERI' , x = x , y = y , pseg = 'DMA',
	410	local = False, big = False )
[707]	411
[714]	412	mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y), mmc_base + offset, mmc_size,
[817]	413	'__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC',
	414	local = False, big = False )
[707]	415
	416	return mapping
	417
[938]	418	################################# platform test ####################################
[707]	419
	420	if __name__ == '__main__':
	421
[730]	422	mapping = arch( x_size = 2,
	423	y_size = 2,
	424	nb_procs = 2 )
[707]	425
	426	# print mapping.netbsd_dts()
	427
	428	print mapping.xml()
	429
	430	# print mapping.giet_vsegs()
	431
[802]	432
[707]	433	# Local Variables:
	434	# tab-width: 4;
	435	# c-basic-offset: 4;
	436	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	437	# indent-tabs-mode: nil;
	438	# End:
	439	#
	440	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	441

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POT-Creation-Date: 2018-07-07 16:55+0000
PO-Revision-Date: 2010-07-19 23:05+0200
Last-Translator: Jeroen Ruigrok van der Werven <asmodai@in-nomine.org>
Language: en_US
Language-Team: en_US <trac-dev@googlegroups.com>
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