1 | #!/usr/bin/env python |
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2 | |
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3 | from math import log, ceil |
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4 | from mapping import * |
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5 | |
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6 | ############################################################################### |
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7 | # file : arch.py (for the tsar_generic_leti architecture) |
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8 | # date : may 2014 |
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9 | # author : Alain Greiner |
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10 | ############################################################################### |
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11 | # This file contains a mapping generator for the "tsar_generic_leti" platform. |
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12 | # This includes both the hardware architecture (clusters, processors, |
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13 | # peripherals, physical space segmentation) and the mapping of all boot |
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14 | # and kernel objects (global vsegs). |
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15 | # |
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16 | # This platform includes 6 external peripherals controllers located |
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17 | # in cluster[x_size-1][y_size-1]: TTY, IOC, FBF, NIC, CMA, PIC. |
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18 | # It does not use the IOB component. |
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19 | # It does not use an external ROM, as the preloader code is (pre)loaded |
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20 | # at address 0x0, in the physical memory of cluster[0][0]. |
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21 | # It can use an - optional - RAMDISK located in cluster[0][0]. |
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22 | # The upper row (y = y_size-1) does not contain processors or memory. |
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23 | # |
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24 | # The "constructor" parameters (defined in Makefile) are: |
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25 | # - x_size : number of clusters in a row |
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26 | # - y_size : number of clusters in a column |
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27 | # - nb_procs : number of processors per cluster |
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28 | # - nb_ttys : number of TTY channels |
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29 | # - fbf_width : frame_buffer width = frame_buffer heigth |
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30 | # - ioc_type : can be 'BDV','HBA','SDC','RDK' |
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31 | # |
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32 | # The others hardware parameters (defined below) are: |
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33 | # - nb_nics : number of NIC channels |
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34 | # - nb_cmas : number of CMA channels |
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35 | # - x_io : cluster_io x coordinate |
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36 | # - y_io : cluster_io y coordinate |
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37 | # - x_width : number of bits for x coordinate |
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38 | # - y_width : number of bits for y coordinate |
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39 | # - paddr_width : number of bits for physical address |
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40 | # - irq_per_proc : number of input IRQs per processor |
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41 | # - use_ramdisk : use a RAMDISK when True |
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42 | # - peri_increment : address increment for replicated vsegs |
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43 | # |
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44 | # Regarding the boot and kernel vsegs mapping : |
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45 | # - We use one big physical page (2 Mbytes) for the preloader and the four |
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46 | # boot vsegs, all allocated in cluster[0,0]. |
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47 | # - We use the 16 next big pages in cluster[0][0] to implement the RAMDISK. |
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48 | # - We use one big page per cluster for the replicated kernel code vsegs. |
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49 | # - We use one big page in cluster[0][0] for the kernel data vseg. |
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50 | # - We use one big page per cluster for the distributed kernel heap vsegs. |
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51 | # - We use one big page per cluster for the distributed ptab vsegs. |
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52 | # - We use small physical pages (4 Kbytes) per cluster for the schedulers. |
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53 | # - We use one big page for each external peripheral in IO cluster, |
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54 | # - We use one small page per cluster for each internal peripheral. |
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55 | ############################################################################### |
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56 | |
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57 | ######################## |
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58 | def arch( x_size = 2, |
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59 | y_size = 2, |
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60 | nb_procs = 4, |
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61 | nb_ttys = 1, |
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62 | fbf_width = 128, |
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63 | ioc_type = 'HBA' ): |
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64 | |
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65 | ### define architecture constants |
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66 | |
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67 | nb_nics = 1 |
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68 | nb_cmas = 2 |
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69 | x_io = x_size - 1 # LETI constraint |
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70 | y_io = y_size - 1 # LETI constraint |
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71 | x_width = 4 |
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72 | y_width = 4 |
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73 | p_width = 2 # LETI constraint |
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74 | paddr_width = 40 |
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75 | irq_per_proc = 4 # NetBSD constraint |
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76 | peri_increment = 0x10000 |
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77 | reset_address = 0x00000000 # LETI constraint |
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78 | |
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79 | ### parameters checking |
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80 | |
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81 | assert( nb_procs <= 4 ) |
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82 | |
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83 | assert( x_size <= (1 << x_width) ) |
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84 | |
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85 | assert( (y_size > 1) and (y_size <= (1 << y_width)) ) |
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86 | |
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87 | assert( ioc_type in [ 'BDV' , 'HBA' , 'SDC' , 'RDK' ] ) |
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88 | |
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89 | ### define type and name |
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90 | |
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91 | platform_name = 'tsar_leti_%d_%d_%d' % ( x_size, y_size, nb_procs ) |
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92 | platform_name += '_%d_%d_%s' % ( fbf_width , nb_ttys , ioc_type ) |
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93 | |
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94 | ### define physical segments replicated in all clusters |
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95 | ### the base address is extended by the cluster_xy (8 bits) |
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96 | |
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97 | ram_base = 0x00000000 |
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98 | ram_size = 0x4000000 # 64 Mbytes |
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99 | |
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100 | xcu_base = 0xF0000000 |
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101 | xcu_size = 0x1000 # 4 Kbytes |
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102 | |
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103 | mmc_base = 0xF1000000 |
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104 | mmc_size = 0x1000 # 4 Kbytes |
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105 | |
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106 | ### define physical segments for external peripherals |
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107 | ## These segments are only defined in cluster_io |
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108 | |
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109 | ioc_base = 0xF2000000 |
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110 | ioc_size = 0x1000 # 4kbytes |
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111 | |
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112 | tty_base = 0xF4000000 |
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113 | tty_size = 0x4000 # 16 Kbytes |
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114 | |
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115 | nic_base = 0xF7000000 |
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116 | nic_size = 0x80000 # 512 kbytes |
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117 | |
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118 | cma_base = 0xF8000000 |
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119 | cma_size = 0x1000 * 2 * nb_nics # 4 kbytes * 2 * nb_nics |
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120 | |
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121 | pic_base = 0xF9000000 |
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122 | pic_size = 0x1000 # 4 Kbytes |
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123 | |
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124 | fbf_base = 0xF3000000 |
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125 | fbf_size = fbf_width * fbf_width # fbf_width * fbf_width bytes |
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126 | |
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127 | |
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128 | ### define preloader & bootloader vsegs base addresses and sizes |
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129 | ### We want to pack these 5 vsegs in the same big page |
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130 | ### => boot cost is one BPP in cluster[0][0] |
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131 | |
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132 | preloader_vbase = reset_address # ident |
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133 | preloader_size = 0x00010000 # 64 Kbytes |
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134 | |
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135 | boot_mapping_vbase = 0x00010000 # ident |
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136 | boot_mapping_size = 0x00080000 # 512 Kbytes |
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137 | |
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138 | boot_code_vbase = 0x00090000 # ident |
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139 | boot_code_size = 0x00040000 # 256 Kbytes |
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140 | |
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141 | boot_data_vbase = 0x000D0000 # ident |
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142 | boot_data_size = 0x000B0000 # 704 Kbytes |
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143 | |
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144 | boot_stack_vbase = 0x00180000 # ident |
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145 | boot_stack_size = 0x00080000 # 512 Kbytes |
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146 | |
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147 | ### define ramdisk vseg / must be identity mapping in cluster[0][0] |
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148 | ### occupies 15 BPP after the boot |
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149 | ramdisk_vbase = 0x00200000 |
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150 | ramdisk_size = 0x02000000 # 32 Mbytes |
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151 | |
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152 | ### define kernel vsegs base addresses and sizes |
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153 | ### code, init, ptab, heap & sched vsegs are replicated in all clusters. |
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154 | ### data & uncdata vsegs are only mapped in cluster[0][0]. |
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155 | |
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156 | kernel_code_vbase = 0x80000000 |
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157 | kernel_code_size = 0x00100000 # 1 Mbytes per cluster |
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158 | |
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159 | kernel_init_vbase = 0x80100000 |
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160 | kernel_init_size = 0x00100000 # 1 Mbytes per cluster |
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161 | |
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162 | kernel_data_vbase = 0x90000000 |
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163 | kernel_data_size = 0x00200000 # 2 Mbytes in cluster[0][0] |
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164 | |
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165 | kernel_ptab_vbase = 0xE0000000 |
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166 | kernel_ptab_size = 0x00200000 # 2 Mbytes per cluster |
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167 | |
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168 | kernel_heap_vbase = 0xD0000000 |
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169 | kernel_heap_size = 0x00200000 # 2 Mbytes per cluster |
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170 | |
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171 | kernel_sched_vbase = 0xA0000000 |
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172 | kernel_sched_size = 0x00002000 * nb_procs # 8 kbytes per proc per cluster |
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173 | |
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174 | ##################### |
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175 | ### create mapping |
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176 | ##################### |
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177 | |
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178 | mapping = Mapping( name = platform_name, |
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179 | x_size = x_size, |
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180 | y_size = y_size, |
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181 | nprocs = nb_procs, |
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182 | x_width = x_width, |
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183 | y_width = y_width, |
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184 | p_width = p_width, |
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185 | paddr_width = paddr_width, |
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186 | coherence = True, |
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187 | irq_per_proc = irq_per_proc, |
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188 | use_ramdisk = (ioc_type == 'RDK'), |
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189 | x_io = x_io, |
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190 | y_io = y_io, |
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191 | peri_increment = peri_increment, |
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192 | reset_address = reset_address, |
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193 | ram_base = ram_base, |
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194 | ram_size = ram_size ) |
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195 | |
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196 | ########################### |
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197 | ### Hardware Description |
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198 | ########################### |
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199 | |
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200 | for x in xrange( x_size ): |
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201 | for y in xrange( y_size ): |
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202 | cluster_xy = (x << y_width) + y; |
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203 | offset = cluster_xy << (paddr_width - x_width - y_width) |
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204 | |
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205 | ### components replicated in all clusters but the upper row |
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206 | if ( y < (y_size - 1) ): |
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207 | |
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208 | ram = mapping.addRam( 'RAM', base = ram_base + offset, |
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209 | size = ram_size ) |
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210 | |
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211 | mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, |
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212 | size = mmc_size, ptype = 'MMC' ) |
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213 | |
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214 | xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, |
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215 | size = xcu_size, ptype = 'XCU', |
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216 | channels = nb_procs * irq_per_proc, |
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217 | arg0 = 16, arg1 = 16, arg2 = 16 ) |
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218 | |
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219 | mapping.addIrq( xcu, index = 8, src = mmc, isrtype = 'ISR_MMC' ) |
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220 | |
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221 | for p in xrange ( nb_procs ): |
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222 | mapping.addProc( x, y, p ) |
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223 | |
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224 | ### external peripherals in cluster_io |
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225 | if ( (x==x_io) and (y==y_io) ): |
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226 | |
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227 | if ( ioc_type != 'RDK' ): |
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228 | ioc = mapping.addPeriph( 'IOC', base = ioc_base + offset, size = ioc_size, |
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229 | ptype = 'IOC', subtype = ioc_type ) |
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230 | |
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231 | tty = mapping.addPeriph( 'TTY', base = tty_base + offset, size = tty_size, |
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232 | ptype = 'TTY', channels = nb_ttys ) |
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233 | |
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234 | nic = mapping.addPeriph( 'NIC', base = nic_base + offset, size = nic_size, |
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235 | ptype = 'NIC', channels = nb_nics ) |
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236 | |
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237 | cma = mapping.addPeriph( 'CMA', base = cma_base + offset, size = cma_size, |
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238 | ptype = 'CMA', channels = nb_cmas ) |
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239 | |
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240 | fbf = mapping.addPeriph( 'FBF', base = fbf_base + offset, size = fbf_size, |
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241 | ptype = 'FBF', arg0 = fbf_width, arg1 = fbf_width ) |
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242 | |
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243 | pic = mapping.addPeriph( 'PIC', base = pic_base + offset, size = pic_size, |
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244 | ptype = 'PIC', channels = 32 ) |
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245 | |
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246 | mapping.addIrq( pic, index = 0, src = nic, |
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247 | isrtype = 'ISR_NIC_RX', channel = 0 ) |
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248 | mapping.addIrq( pic, index = 1, src = nic, |
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249 | isrtype = 'ISR_NIC_RX', channel = 1 ) |
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250 | mapping.addIrq( pic, index = 2, src = nic, |
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251 | isrtype = 'ISR_NIC_TX', channel = 0 ) |
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252 | mapping.addIrq( pic, index = 3, src = nic, |
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253 | isrtype = 'ISR_NIC_TX', channel = 1 ) |
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254 | mapping.addIrq( pic, index = 4, src = cma, |
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255 | isrtype = 'ISR_CMA', channel = 0 ) |
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256 | mapping.addIrq( pic, index = 5, src = cma, |
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257 | isrtype = 'ISR_CMA', channel = 1 ) |
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258 | mapping.addIrq( pic, index = 6, src = cma, |
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259 | isrtype = 'ISR_CMA', channel = 2 ) |
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260 | mapping.addIrq( pic, index = 7, src = cma, |
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261 | isrtype = 'ISR_CMA', channel = 3 ) |
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262 | |
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263 | if ( ioc_type == 'BDV' ): isr_type = 'ISR_BDV' |
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264 | elif ( ioc_type == 'HBA' ): isr_type = 'ISR_HBA' |
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265 | elif ( ioc_type == 'SDC' ): isr_type = 'ISR_SDC' |
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266 | |
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267 | if ( ioc_type != 'RDK' ): |
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268 | mapping.addIrq( pic, index = 8, src = ioc, |
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269 | isrtype = isr_type, channel = 0 ) |
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270 | |
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271 | mapping.addIrq( pic, index = 16, src = tty, |
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272 | isrtype = 'ISR_TTY_RX', channel = 0 ) |
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273 | mapping.addIrq( pic, index = 17, src = tty, |
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274 | isrtype = 'ISR_TTY_RX', channel = 1 ) |
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275 | mapping.addIrq( pic, index = 18, src = tty, |
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276 | isrtype = 'ISR_TTY_RX', channel = 2 ) |
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277 | mapping.addIrq( pic, index = 19, src = tty, |
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278 | isrtype = 'ISR_TTY_RX', channel = 3 ) |
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279 | mapping.addIrq( pic, index = 20, src = tty, |
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280 | isrtype = 'ISR_TTY_RX', channel = 4 ) |
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281 | mapping.addIrq( pic, index = 21, src = tty, |
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282 | isrtype = 'ISR_TTY_RX', channel = 5 ) |
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283 | mapping.addIrq( pic, index = 22, src = tty, |
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284 | isrtype = 'ISR_TTY_RX', channel = 6 ) |
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285 | mapping.addIrq( pic, index = 23, src = tty, |
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286 | isrtype = 'ISR_TTY_RX', channel = 7 ) |
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287 | |
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288 | ################################### |
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289 | ### boot & kernel vsegs mapping |
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290 | ################################### |
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291 | |
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292 | ### global vsegs for preloader & boot_loader are mapped in cluster[0][0] |
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293 | ### => same flags CXW_ / identity mapping / non local / big page |
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294 | |
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295 | mapping.addGlobal( 'seg_preloader', preloader_vbase, preloader_size, |
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296 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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297 | identity = True, local = False, big = True ) |
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298 | |
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299 | mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size, |
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300 | 'CXW_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM', |
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301 | identity = True, local = False, big = True ) |
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302 | |
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303 | mapping.addGlobal( 'seg_boot_code', boot_code_vbase, boot_code_size, |
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304 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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305 | identity = True, local = False, big = True ) |
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306 | |
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307 | mapping.addGlobal( 'seg_boot_data', boot_data_vbase, boot_data_size, |
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308 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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309 | identity = True, local = False, big = True ) |
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310 | |
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311 | mapping.addGlobal( 'seg_boot_stack', boot_stack_vbase, boot_stack_size, |
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312 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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313 | identity = True, local = False, big = True ) |
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314 | |
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315 | ### global vseg for RAM-DISK in cluster[0][0] |
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316 | ### identity mapping / non local / big pages |
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317 | if (ioc_type == 'RDK'): |
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318 | |
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319 | mapping.addGlobal( 'seg_ramdisk', ramdisk_vbase, ramdisk_size, |
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320 | 'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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321 | identity = True, local = True, big = True ) |
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322 | |
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323 | ### global vsegs kernel_code, kernel_init : local / big page |
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324 | ### replicated in all clusters containing processors |
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325 | ### same content => same name / same vbase |
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326 | for x in xrange( x_size ): |
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327 | for y in xrange( y_size - 1 ): |
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328 | |
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329 | mapping.addGlobal( 'seg_kernel_code', |
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330 | kernel_code_vbase, kernel_code_size, |
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331 | 'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM', |
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332 | binpath = 'build/kernel/kernel.elf', |
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333 | local = True, big = True ) |
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334 | |
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335 | mapping.addGlobal( 'seg_kernel_init', |
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336 | kernel_init_vbase, kernel_init_size, |
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337 | 'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM', |
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338 | binpath = 'build/kernel/kernel.elf', |
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339 | local = True, big = True ) |
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340 | |
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341 | ### global vseg kernel_data: non local / big page |
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342 | ### Only mapped in cluster[0][0] |
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343 | mapping.addGlobal( 'seg_kernel_data', |
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344 | kernel_data_vbase, kernel_data_size, |
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345 | 'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', |
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346 | binpath = 'build/kernel/kernel.elf', |
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347 | local = False, big = True ) |
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348 | |
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349 | ### Global vsegs kernel_ptab_x_y: non local / big page |
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350 | ### replicated in all clusters containing processors |
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351 | ### different content => name & vbase indexed by (x,y) |
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352 | for x in xrange( x_size ): |
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353 | for y in xrange( y_size - 1 ): |
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354 | offset = ((x << y_width) + y) * kernel_ptab_size |
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355 | |
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356 | mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), |
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357 | kernel_ptab_vbase + offset, kernel_ptab_size, |
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358 | 'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM', |
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359 | local = False, big = True ) |
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360 | |
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361 | ### global vsegs kernel_heap_x_y : non local / big pages |
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362 | ### distributed in all clusters containing processors |
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363 | ### different content => name & vbase indexed by (x,y) |
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364 | for x in xrange( x_size ): |
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365 | for y in xrange( y_size - 1 ): |
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366 | offset = ((x << y_width) + y) * kernel_heap_size |
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367 | |
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368 | mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y), |
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369 | kernel_heap_vbase + offset , kernel_heap_size, |
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370 | 'C_W_', vtype = 'HEAP', x = x , y = y , pseg = 'RAM', |
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371 | local = False, big = True ) |
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372 | |
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373 | ### global vsegs for external peripherals: non local / big page |
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374 | ### only mapped in cluster_io |
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375 | mapping.addGlobal( 'seg_ioc', ioc_base, ioc_size, |
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376 | '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'IOC', |
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377 | local = False, big = True ) |
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378 | |
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379 | mapping.addGlobal( 'seg_tty', tty_base, tty_size, |
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380 | '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'TTY', |
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381 | local = False, big = True ) |
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382 | |
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383 | mapping.addGlobal( 'seg_nic', nic_base, nic_size, |
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384 | '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'NIC', |
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385 | local = False, big = True ) |
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386 | |
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387 | mapping.addGlobal( 'seg_cma', cma_base, cma_size, |
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388 | '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'CMA', |
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389 | local = False, big = True ) |
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390 | |
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391 | mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, |
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392 | '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'FBF', |
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393 | local = False, big = True ) |
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394 | |
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395 | mapping.addGlobal( 'seg_pic', pic_base, pic_size, |
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396 | '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'PIC', |
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397 | local = False, big = True ) |
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398 | |
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399 | ### global vsegs for internal peripherals : non local / small pages |
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400 | ### allocated in all clusters containing processors |
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401 | ### name and vbase indexed by (x,y) |
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402 | for x in xrange( x_size ): |
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403 | for y in xrange( y_size - 1 ): |
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404 | offset = ((x << y_width) + y) * peri_increment |
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405 | |
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406 | mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), |
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407 | xcu_base + offset, xcu_size, |
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408 | '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU', |
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409 | local = False, big = False ) |
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410 | |
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411 | mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y), |
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412 | mmc_base + offset, mmc_size, |
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413 | '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC', |
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414 | local = False, big = False ) |
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415 | |
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416 | ### global vsegs kernel_sched : non local / small pages |
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417 | ### allocated in all clusters containing processors |
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418 | ### different content => name & vbase indexed by (x,y) |
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419 | for x in xrange( x_size ): |
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420 | for y in xrange( y_size - 1 ): |
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421 | offset = ((x << y_width) + y) * kernel_ptab_size |
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422 | |
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423 | mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), |
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424 | kernel_sched_vbase + offset , kernel_sched_size, |
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425 | 'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM', |
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426 | local = False, big = False ) |
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427 | |
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428 | return mapping |
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429 | |
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430 | ########################## platform test ############################################# |
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431 | |
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432 | if __name__ == '__main__': |
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433 | |
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434 | mapping = arch( x_size = 2, |
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435 | y_size = 2, |
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436 | nb_procs = 2 ) |
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437 | |
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438 | # print mapping.netbsd_dts() |
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439 | |
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440 | print mapping.xml() |
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441 | |
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442 | # print mapping.giet_vsegs() |
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443 | |
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444 | |
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445 | # Local Variables: |
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446 | # tab-width: 4; |
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447 | # c-basic-offset: 4; |
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448 | # c-file-offsets:((innamespace . 0)(inline-open . 0)); |
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449 | # indent-tabs-mode: nil; |
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450 | # End: |
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451 | # |
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452 | # vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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453 | |
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