1 | #!/usr/bin/env python |
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2 | |
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3 | from math import log, ceil |
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4 | from mapping import * |
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5 | |
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6 | ############################################################################### |
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7 | # file : arch.py (for the tsar_generic_leti architecture) |
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8 | # date : may 2014 |
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9 | # author : Alain Greiner |
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10 | ############################################################################### |
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11 | # This file contains a mapping generator for the "tsar_generic_leti" platform. |
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12 | # This includes both the hardware architecture (clusters, processors, |
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13 | # peripherals, physical space segmentation) and the mapping of all kernel |
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14 | # objects (global vsegs). |
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15 | # |
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16 | # The "constructor" parameters are: |
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17 | # - x_size : number of clusters in a row |
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18 | # - y_size : number of clusters in a column |
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19 | # - nb_procs : number of processors per cluster |
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20 | # - fbf_width : frame_buffer width = frame_buffer heigth |
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21 | # |
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22 | # The "hidden" parameters (defined below) are: |
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23 | # - nb_ttys : number of TTY channels |
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24 | # - nb_nics : number of NIC channels |
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25 | # - x_io : cluster_io x coordinate |
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26 | # - y_io : cluster_io y coordinate |
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27 | # - x_width : number of bits for x coordinate |
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28 | # - y_width : number of bits for y coordinate |
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29 | # - paddr_width : number of bits for physical address |
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30 | # - irq_per_proc : number of input IRQs per processor |
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31 | # - use_ramdisk : use a ramdisk when True |
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32 | # - peri_increment : address increment for replicated peripherals |
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33 | # |
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34 | # Regarding physical memory allocation, there is one allocator per cluster: |
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35 | # - We use only one big physical page (2 Mbytes) for the five boot vsegs, |
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36 | # allocated in cluster[0,0], identity mapping. |
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37 | # - We use one big page per cluster for the kernel vsegs. |
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38 | # The kernel_code, kernel_init and kernel_ptab can be replicated in all clusters. |
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39 | # The kernel_data and kernel_uncdata shared vsegs are only mapped in cluster[0,0]. |
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40 | # - We use 8 small physical pages (4 Kbytes) per cluster for the schedulers. |
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41 | # - We use one big page for each external peripheral in IO cluster, |
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42 | # - We use one small page per cluster for each internal peripheral. |
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43 | ################################################################################### |
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44 | |
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45 | ######################## |
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46 | def arch( x_size = 2, |
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47 | y_size = 2, |
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48 | nb_procs = 2, |
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49 | fbf_width = 128 ): |
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50 | |
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51 | ### define architecture constants |
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52 | |
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53 | nb_ttys = 1 |
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54 | nb_nics = 2 |
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55 | x_io = 0 |
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56 | y_io = 0 |
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57 | x_width = 4 |
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58 | y_width = 4 |
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59 | p_width = 2 |
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60 | paddr_width = 40 |
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61 | irq_per_proc = 4 |
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62 | use_ramdisk = True |
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63 | peri_increment = 0x10000 # distributed peripherals vbase address increment |
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64 | sched_increment = 0x10000 # distributed schedulers vbase address increment |
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65 | ptab_increment = 0x200000 # distributed page tables vbase address increment |
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66 | reset_address = 0x00000000 |
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67 | |
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68 | ### parameters checking |
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69 | |
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70 | assert( nb_procs <= (1 << p_width) ) |
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71 | |
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72 | assert( (x_size >= 1) and (x_size <= 16) ) |
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73 | |
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74 | assert( (y_size >= 1) and (y_size <= 16) ) |
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75 | |
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76 | assert( nb_ttys == 1 ) |
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77 | |
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78 | assert( ((x_io == 0) and (y_io == 0)) or |
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79 | ((x_io == x_size-1) and (y_io == y_size-1)) ) |
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80 | |
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81 | platform_name = 'tsar_leti_%d_%d_%d' % ( x_size, y_size, nb_procs ) |
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82 | |
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83 | ### define physical segments |
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84 | ### These segments are replicated in all clusters |
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85 | |
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86 | ram_base = 0x0000000000 |
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87 | ram_size = 0x4000000 # 64 Mbytes |
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88 | |
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89 | xcu_base = 0x00F0000000 |
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90 | xcu_size = 0x1000 # 4 Kbytes |
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91 | |
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92 | mmc_base = 0x00E0000000 |
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93 | mmc_size = 0x1000 # 4 Kbytes |
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94 | |
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95 | ### define physical segments for external peripherals |
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96 | ## These segments are only defined in cluster_io |
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97 | |
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98 | offset_io = ((x_io << y_width) + y_io) << (paddr_width - x_width - y_width) |
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99 | |
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100 | bdv_base = 0x00F2000000 + offset_io |
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101 | bdv_size = 0x1000 # 4kbytes |
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102 | |
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103 | tty_base = 0x00F4000000 + offset_io |
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104 | tty_size = 0x4000 # 16 Kbytes |
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105 | |
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106 | nic_base = 0x00F7000000 + offset_io |
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107 | nic_size = 0x80000 # 512 kbytes |
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108 | |
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109 | cma_base = 0x00F8000000 + offset_io |
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110 | cma_size = 0x1000 * 2 * nb_nics # 4 kbytes * 2 * nb_nics |
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111 | |
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112 | fbf_base = 0x00F3000000 + offset_io |
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113 | fbf_size = fbf_width * fbf_width # fbf_width * fbf_width bytes |
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114 | |
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115 | pic_base = 0x00F9000000 + offset_io |
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116 | pic_size = 0x1000 # 4 Kbytes |
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117 | |
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118 | rdk_base = 0x02000000 |
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119 | rdk_size = 0x02000000 # 32 Mbytes |
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120 | |
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121 | ### define preloader & bootloader vsegs base addresses and sizes |
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122 | ### We want to pack these 5 vsegs in the same big page |
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123 | ### => boot cost is one BPP in cluster[0][0] |
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124 | |
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125 | preloader_vbase = 0x00000000 # ident |
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126 | preloader_size = 0x00010000 # 64 Kbytes |
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127 | |
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128 | boot_mapping_vbase = 0x00010000 # ident |
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129 | boot_mapping_size = 0x00080000 # 512 Kbytes |
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130 | |
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131 | boot_code_vbase = 0x00090000 # ident |
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132 | boot_code_size = 0x00040000 # 256 Kbytes |
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133 | |
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134 | boot_data_vbase = 0x000D0000 # ident |
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135 | boot_data_size = 0x00080000 # 512 Kbytes |
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136 | |
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137 | boot_stack_vbase = 0x00150000 # ident |
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138 | boot_stack_size = 0x00050000 # 320 Kbytes |
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139 | |
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140 | ### define kernel vsegs base addresses and sizes |
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141 | ### code, init, ptab & sched vsegs are replicated in all clusters. |
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142 | ### data & uncdata vsegs are only mapped in cluster[0][0]. |
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143 | ### - We pack code, init, data vsegs in the same BIG page. |
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144 | ### - We use another BIG page for the ptab vseg. |
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145 | ### - We use 2*nb_procs SMALL pages for the sched vseg. |
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146 | ### - we use one SMALL page for uncdata |
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147 | ### => kernel cost is 2 BPPs and (2*n + 1) SPPs per cluster. |
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148 | |
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149 | kernel_code_vbase = 0x80000000 |
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150 | kernel_code_size = 0x00080000 # 512 Kbytes per cluster |
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151 | |
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152 | kernel_init_vbase = 0x80080000 |
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153 | kernel_init_size = 0x00080000 # 512 Kbytes per cluster |
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154 | |
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155 | kernel_data_vbase = 0x80100000 |
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156 | kernel_data_size = 0x00100000 # 1 Mbytes in cluster[0][0] |
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157 | |
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158 | kernel_uncdata_vbase = 0x80200000 |
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159 | kernel_uncdata_size = 0x00001000 # 4 Kbytes |
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160 | |
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161 | kernel_sched_vbase = 0x80400000 # distributed in all clusters |
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162 | kernel_sched_size = 0x00002000 * nb_procs # 8 kbytes per processor |
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163 | |
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164 | kernel_ptab_vbase = 0xC0000000 |
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165 | kernel_ptab_size = 0x00200000 # 2 Mbytes per cluster |
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166 | |
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167 | ### create mapping |
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168 | |
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169 | mapping = Mapping( name = platform_name, |
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170 | x_size = x_size, |
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171 | y_size = y_size, |
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172 | nprocs = nb_procs, |
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173 | x_width = x_width, |
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174 | y_width = y_width, |
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175 | p_width = p_width, |
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176 | paddr_width = paddr_width, |
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177 | coherence = True, |
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178 | irq_per_proc = irq_per_proc, |
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179 | use_ramdisk = use_ramdisk, |
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180 | x_io = x_io, |
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181 | y_io = y_io, |
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182 | peri_increment = peri_increment, |
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183 | reset_address = reset_address, |
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184 | ram_base = ram_base, |
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185 | ram_size = ram_size ) |
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186 | |
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187 | ### external peripherals (accessible in cluster[0,0] only for this mapping) |
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188 | |
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189 | bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, ptype = 'IOC', subtype = 'BDV' ) |
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190 | |
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191 | tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys ) |
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192 | |
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193 | if x_io != 0 or y_io != 0: |
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194 | nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) |
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195 | cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics ) |
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196 | fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width ) |
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197 | pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 ) |
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198 | |
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199 | mapping.addIrq( pic, index = 0 , isrtype = 'ISR_NIC_RX', channel = 0 ) |
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200 | mapping.addIrq( pic, index = 1 , isrtype = 'ISR_NIC_RX', channel = 1 ) |
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201 | mapping.addIrq( pic, index = 2 , isrtype = 'ISR_NIC_TX', channel = 0 ) |
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202 | mapping.addIrq( pic, index = 3 , isrtype = 'ISR_NIC_TX', channel = 1 ) |
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203 | mapping.addIrq( pic, index = 4 , isrtype = 'ISR_CMA' , channel = 0 ) |
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204 | mapping.addIrq( pic, index = 5 , isrtype = 'ISR_CMA' , channel = 1 ) |
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205 | mapping.addIrq( pic, index = 6 , isrtype = 'ISR_CMA' , channel = 2 ) |
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206 | mapping.addIrq( pic, index = 7 , isrtype = 'ISR_CMA' , channel = 3 ) |
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207 | mapping.addIrq( pic, index = 8 , isrtype = 'ISR_BDV' , channel = 0 ) |
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208 | mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 ) |
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209 | |
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210 | mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', |
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211 | vtype = 'PERI', x = 0, y = 0, pseg = 'NIC', |
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212 | local = False, big = True ) |
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213 | |
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214 | mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', |
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215 | vtype = 'PERI', x = 0, y = 0, pseg = 'CMA', |
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216 | local = False, big = True ) |
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217 | |
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218 | mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', |
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219 | vtype = 'PERI', x = 0, y = 0, pseg = 'FBF', |
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220 | local = False, big = True ) |
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221 | |
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222 | mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', |
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223 | vtype = 'PERI', x = 0, y = 0, pseg = 'PIC', |
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224 | local = False, big = True ) |
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225 | |
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226 | ### hardware components replicated in all clusters |
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227 | |
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228 | for x in xrange( x_size ): |
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229 | for y in xrange( y_size ): |
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230 | cluster_xy = (x << y_width) + y; |
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231 | offset = cluster_xy << (paddr_width - x_width - y_width) |
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232 | |
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233 | ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size ) |
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234 | |
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235 | mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, |
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236 | ptype = 'MMC' ) |
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237 | |
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238 | xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, |
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239 | ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 ) |
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240 | |
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241 | # IRQs replicated in all clusters |
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242 | mapping.addIrq( xcu, index = 8, isrtype = 'ISR_MMC' ) |
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243 | |
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244 | # IRQ in IO cluster (0,0) |
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245 | if x == 0 and y == 0: |
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246 | mapping.addIrq( xcu, index = 9 , isrtype = 'ISR_BDV' ) |
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247 | mapping.addIrq( xcu, index = 10, isrtype = 'ISR_TTY_RX' ) |
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248 | |
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249 | # processors |
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250 | for p in xrange ( nb_procs ): |
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251 | mapping.addProc( x, y, p ) |
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252 | |
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253 | ### global vsegs for preloader & boot_loader |
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254 | ### we want to pack those 5 vsegs in the same big page |
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255 | ### => same flags CXW_ / identity mapping / non local / big page |
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256 | |
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257 | mapping.addGlobal( 'seg_preloader', preloader_vbase, preloader_size, |
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258 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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259 | identity = True, local = False, big = True ) |
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260 | |
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261 | mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size, |
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262 | 'CXW_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM', |
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263 | identity = True, local = False, big = True ) |
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264 | |
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265 | mapping.addGlobal( 'seg_boot_code', boot_code_vbase, boot_code_size, |
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266 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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267 | identity = True, local = False, big = True ) |
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268 | |
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269 | mapping.addGlobal( 'seg_boot_data', boot_data_vbase, boot_data_size, |
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270 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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271 | identity = True, local = False, big = True ) |
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272 | |
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273 | mapping.addGlobal( 'seg_boot_stack', boot_stack_vbase, boot_stack_size, |
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274 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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275 | identity = True, local = False, big = True ) |
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276 | |
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277 | ### global vsegs kernel_code, kernel_init : local / big page |
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278 | ### replicated in all clusters with the same name (same vbase) |
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279 | for x in xrange( x_size ): |
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280 | for y in xrange( y_size ): |
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281 | mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size, |
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282 | 'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM', |
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283 | binpath = 'build/kernel/kernel.elf', |
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284 | local = True, big = True ) |
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285 | |
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286 | mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size, |
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287 | 'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM', |
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288 | binpath = 'build/kernel/kernel.elf', |
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289 | local = True, big = True ) |
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290 | |
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291 | ### global vseg kernel_data: non local / big page |
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292 | ### Only mapped in cluster[0][0] |
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293 | mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size, |
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294 | 'CXW_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', |
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295 | binpath = 'build/kernel/kernel.elf', |
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296 | local = False, big = True ) |
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297 | |
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298 | ### global vseg kernel_uncdata: non local / small page |
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299 | ### Only mapped in cluster[0][0] |
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300 | mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, |
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301 | '__W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', |
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302 | binpath = 'build/kernel/kernel.elf', |
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303 | local = False, big = False ) |
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304 | |
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305 | for x in xrange( x_size ): |
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306 | for y in xrange( y_size ): |
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307 | cluster_xy = (x << y_width) + y; |
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308 | |
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309 | ### Global vsegs kernel_ptab_x_y: non local / big pages |
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310 | ### replicated in all clusters with name indexed by (x,y) |
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311 | ### as vbase address is incremented by (cluster_xy * vseg_increment) |
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312 | offset = cluster_xy * ptab_increment |
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313 | mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), kernel_ptab_vbase + offset, kernel_ptab_size, |
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314 | 'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM', |
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315 | local = False, big = True ) |
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316 | |
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317 | ### global vsegs kernel_sched : non local / small pages |
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318 | ### allocated in all clusters with name indexed by (x,y) |
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319 | ### as vbase address is incremented by (cluster_xy * vseg_increment) |
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320 | offset = cluster_xy * sched_increment |
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321 | mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), kernel_sched_vbase + offset, kernel_sched_size, |
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322 | 'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM', |
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323 | local = False, big = False ) |
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324 | |
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325 | ### global vseg for ram disk |
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326 | if use_ramdisk: |
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327 | mapping.addGlobal( 'seg_rdk', rdk_base, rdk_size, '__W_', |
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328 | vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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329 | identity = True, local = False, big = True ) |
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330 | |
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331 | ### global vsegs for external peripherals: non local / big page |
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332 | mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', |
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333 | vtype = 'PERI', x = 0, y = 0, pseg = 'BDV', |
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334 | local = False, big = True ) |
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335 | |
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336 | mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', |
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337 | vtype = 'PERI', x = 0, y = 0, pseg = 'TTY', |
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338 | local = False, big = True ) |
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339 | |
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340 | ### global vsegs for internal peripherals : non local / small pages |
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341 | ### allocated in all clusters with name indexed by (x,y) |
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342 | ### as vbase address is incremented by (cluster_xy * vseg_increment) |
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343 | for x in xrange( x_size ): |
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344 | for y in xrange( y_size ): |
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345 | offset = ((x << y_width) + y) * peri_increment |
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346 | |
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347 | mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), xcu_base + offset, xcu_size, |
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348 | '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU', |
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349 | local = False, big = False ) |
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350 | |
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351 | mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y), mmc_base + offset, mmc_size, |
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352 | '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC', |
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353 | local = False, big = False ) |
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354 | |
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355 | ### return mapping ### |
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356 | |
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357 | return mapping |
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358 | |
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359 | ################################# platform test ####################################################### |
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360 | |
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361 | if __name__ == '__main__': |
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362 | |
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363 | mapping = arch( x_size = 2, |
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364 | y_size = 2, |
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365 | nb_procs = 2 ) |
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366 | |
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367 | # print mapping.netbsd_dts() |
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368 | |
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369 | print mapping.xml() |
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370 | |
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371 | # print mapping.giet_vsegs() |
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372 | |
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373 | |
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374 | # Local Variables: |
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375 | # tab-width: 4; |
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376 | # c-basic-offset: 4; |
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377 | # c-file-offsets:((innamespace . 0)(inline-open . 0)); |
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378 | # indent-tabs-mode: nil; |
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379 | # End: |
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380 | # |
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381 | # vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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382 | |
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