[621] | 1 | ////////////////////////////////////////////////////////////////////////////// |
---|
| 2 | // File: tsar_leti_cluster.cpp |
---|
| 3 | // Author: Alain Greiner |
---|
| 4 | // Copyright: UPMC/LIP6 |
---|
[628] | 5 | // Date : february 2014 |
---|
[621] | 6 | // This program is released under the GNU public license |
---|
| 7 | ////////////////////////////////////////////////////////////////////////////// |
---|
| 8 | |
---|
| 9 | #include "../include/tsar_leti_cluster.h" |
---|
| 10 | |
---|
| 11 | namespace soclib { |
---|
| 12 | namespace caba { |
---|
| 13 | |
---|
| 14 | //////////////////////////////////////////////////////////////////////////////////// |
---|
| 15 | template<size_t dspin_cmd_width, |
---|
| 16 | size_t dspin_rsp_width, |
---|
| 17 | typename vci_param_int, |
---|
| 18 | typename vci_param_ext> TsarLetiCluster<dspin_cmd_width, |
---|
| 19 | dspin_rsp_width, |
---|
| 20 | vci_param_int, |
---|
| 21 | vci_param_ext>::TsarLetiCluster( |
---|
| 22 | //////////////////////////////////////////////////////////////////////////////////// |
---|
| 23 | sc_module_name insname, |
---|
| 24 | size_t nb_procs, |
---|
| 25 | size_t x_id, |
---|
| 26 | size_t y_id, |
---|
| 27 | size_t cluster_xy, |
---|
| 28 | const soclib::common::MappingTable &mtd, |
---|
| 29 | const soclib::common::MappingTable &mtx, |
---|
| 30 | uint32_t reset_address, |
---|
| 31 | size_t x_width, |
---|
| 32 | size_t y_width, |
---|
| 33 | size_t l_width, |
---|
[803] | 34 | size_t p_width, |
---|
[621] | 35 | size_t tgtid_memc, |
---|
| 36 | size_t tgtid_xicu, |
---|
| 37 | size_t tgtid_mtty, |
---|
| 38 | size_t tgtid_bdev, |
---|
[628] | 39 | const char* disk_pathname, |
---|
[621] | 40 | size_t memc_ways, |
---|
| 41 | size_t memc_sets, |
---|
| 42 | size_t l1_i_ways, |
---|
| 43 | size_t l1_i_sets, |
---|
| 44 | size_t l1_d_ways, |
---|
| 45 | size_t l1_d_sets, |
---|
| 46 | size_t xram_latency, |
---|
| 47 | const Loader &loader, |
---|
| 48 | uint32_t frozen_cycles, |
---|
| 49 | uint32_t trace_start_cycle, |
---|
| 50 | bool trace_proc_ok, |
---|
| 51 | uint32_t trace_proc_id, |
---|
| 52 | bool trace_memc_ok, |
---|
| 53 | uint32_t trace_memc_id ) |
---|
| 54 | : soclib::caba::BaseModule(insname), |
---|
[692] | 55 | m_nprocs(nb_procs), |
---|
[621] | 56 | p_clk("clk"), |
---|
| 57 | p_resetn("resetn") |
---|
| 58 | |
---|
| 59 | { |
---|
[628] | 60 | ///////////////////////////////////////////////////////////////////////////// |
---|
| 61 | // Vectors of ports definition and allocation |
---|
| 62 | ///////////////////////////////////////////////////////////////////////////// |
---|
[621] | 63 | |
---|
[628] | 64 | p_cmd_in = alloc_elems<DspinInput<dspin_cmd_width> > ("p_cmd_in", 4); |
---|
| 65 | p_cmd_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cmd_out", 4); |
---|
[621] | 66 | |
---|
[628] | 67 | p_rsp_in = alloc_elems<DspinInput<dspin_rsp_width> > ("p_rsp_in", 4); |
---|
| 68 | p_rsp_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_rsp_out", 4); |
---|
[621] | 69 | |
---|
[628] | 70 | p_m2p_in = alloc_elems<DspinInput<dspin_cmd_width> > ("p_m2p_in", 4); |
---|
| 71 | p_m2p_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_m2p_out", 4); |
---|
| 72 | |
---|
| 73 | p_p2m_in = alloc_elems<DspinInput<dspin_rsp_width> > ("p_p2m_in", 4); |
---|
| 74 | p_p2m_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_p2m_out", 4); |
---|
| 75 | |
---|
| 76 | p_cla_in = alloc_elems<DspinInput<dspin_cmd_width> > ("p_cla_in", 4); |
---|
| 77 | p_cla_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cla_out", 4); |
---|
| 78 | |
---|
[621] | 79 | ///////////////////////////////////////////////////////////////////////////// |
---|
[628] | 80 | // Components definition and allocation |
---|
[621] | 81 | ///////////////////////////////////////////////////////////////////////////// |
---|
| 82 | |
---|
| 83 | // The processor is a MIPS32 wrapped in the GDB server |
---|
| 84 | // the reset address is defined by the reset_address argument |
---|
| 85 | typedef GdbServer<Mips32ElIss> mips_iss; |
---|
| 86 | mips_iss::setResetAddress( reset_address ); |
---|
| 87 | |
---|
| 88 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 89 | { |
---|
[803] | 90 | uint32_t global_proc_id = (cluster_xy << p_width) + p; |
---|
[621] | 91 | uint32_t global_cc_id = (cluster_xy << l_width) + p; |
---|
| 92 | bool trace_ok = trace_proc_ok and (trace_proc_id == global_proc_id); |
---|
| 93 | |
---|
| 94 | std::ostringstream sproc; |
---|
| 95 | sproc << "proc_" << x_id << "_" << y_id << "_" << p; |
---|
| 96 | proc[p] = new VciCcVCacheWrapper<vci_param_int, |
---|
| 97 | dspin_cmd_width, |
---|
| 98 | dspin_rsp_width, |
---|
| 99 | mips_iss >( |
---|
| 100 | sproc.str().c_str(), |
---|
| 101 | global_proc_id, // GLOBAL PROC_ID |
---|
| 102 | mtd, // Mapping Table |
---|
| 103 | IntTab(cluster_xy,p), // SRCID |
---|
| 104 | global_cc_id, // GLOBAL_CC_ID |
---|
| 105 | 8, // ITLB ways |
---|
| 106 | 8, // ITLB sets |
---|
| 107 | 8, // DTLB ways |
---|
| 108 | 8, // DTLB sets |
---|
| 109 | l1_i_ways,l1_i_sets, 16, // ICACHE size |
---|
| 110 | l1_d_ways,l1_d_sets, 16, // DCACHE size |
---|
| 111 | 4, // WBUF nlines |
---|
| 112 | 4, // WBUF nwords |
---|
| 113 | x_width, |
---|
| 114 | y_width, |
---|
| 115 | frozen_cycles, // max frozen cycles |
---|
| 116 | trace_start_cycle, |
---|
| 117 | trace_ok ); |
---|
| 118 | } |
---|
| 119 | |
---|
| 120 | ///////////////////////////////////////////////////////////////////////////// |
---|
| 121 | bool trace_ok = trace_memc_ok and (trace_memc_id == cluster_xy); |
---|
| 122 | std::ostringstream smemc; |
---|
| 123 | smemc << "memc_" << x_id << "_" << y_id; |
---|
| 124 | memc = new VciMemCache<vci_param_int, |
---|
| 125 | vci_param_ext, |
---|
| 126 | dspin_rsp_width, |
---|
| 127 | dspin_cmd_width>( |
---|
| 128 | smemc.str().c_str(), |
---|
| 129 | mtd, // Mapping Table direct space |
---|
| 130 | mtx, // Mapping Table external space |
---|
| 131 | IntTab(cluster_xy), // SRCID external space |
---|
| 132 | IntTab(cluster_xy, tgtid_memc), // TGTID direct space |
---|
| 133 | x_width, // Number of x bits in platform |
---|
| 134 | y_width, // Number of y bits in platform |
---|
| 135 | memc_ways, memc_sets, 16, // CACHE SIZE |
---|
| 136 | 3, // MAX NUMBER OF COPIES |
---|
| 137 | 4096, // HEAP SIZE |
---|
| 138 | 8, // TRANSACTION TABLE DEPTH |
---|
| 139 | 8, // UPDATE TABLE DEPTH |
---|
| 140 | 8, // INVALIDATE TABLE DEPTH |
---|
| 141 | trace_start_cycle, |
---|
| 142 | trace_ok ); |
---|
| 143 | |
---|
| 144 | ///////////////////////////////////////////////////////////////////////////// |
---|
| 145 | std::ostringstream sxram; |
---|
| 146 | sxram << "xram_" << x_id << "_" << y_id; |
---|
| 147 | xram = new VciSimpleRam<vci_param_ext>( |
---|
| 148 | sxram.str().c_str(), |
---|
| 149 | IntTab(cluster_xy), |
---|
| 150 | mtx, |
---|
| 151 | loader, |
---|
| 152 | xram_latency); |
---|
| 153 | |
---|
| 154 | ///////////////////////////////////////////////////////////////////////////// |
---|
| 155 | std::ostringstream sxicu; |
---|
| 156 | sxicu << "xicu_" << x_id << "_" << y_id; |
---|
| 157 | xicu = new VciXicu<vci_param_int>( |
---|
| 158 | sxicu.str().c_str(), |
---|
| 159 | mtd, // mapping table |
---|
| 160 | IntTab(cluster_xy, tgtid_xicu), // TGTID_D |
---|
[628] | 161 | 16, // number of timer IRQs |
---|
| 162 | 16, // number of hard IRQs |
---|
| 163 | 16, // number of soft IRQs |
---|
| 164 | 16 ); // number of output IRQs |
---|
[621] | 165 | |
---|
| 166 | ///////////////////////////////////////////////////////////////////////////// |
---|
[628] | 167 | size_t nb_initiators = nb_procs; |
---|
| 168 | size_t nb_targets = 2; |
---|
[621] | 169 | |
---|
[628] | 170 | if ((x_id == 0) and (y_id == 0)) // cluster(0,0) |
---|
[621] | 171 | { |
---|
[628] | 172 | nb_initiators = nb_procs + 1; |
---|
| 173 | nb_targets = 4; |
---|
[621] | 174 | } |
---|
| 175 | |
---|
[628] | 176 | std::ostringstream s_xbar_cmd; |
---|
[692] | 177 | xbar_cmd = new VciLocalCrossbar<vci_param_int>( |
---|
[628] | 178 | s_xbar_cmd.str().c_str(), |
---|
[621] | 179 | mtd, // mapping table |
---|
[692] | 180 | cluster_xy, // cluster id |
---|
| 181 | nb_initiators, // number of local initiators |
---|
| 182 | nb_targets, // number of local targets |
---|
| 183 | 0 ); // default target |
---|
[621] | 184 | |
---|
[692] | 185 | wi_gate = new VciDspinInitiatorWrapper<vci_param_int, |
---|
| 186 | dspin_cmd_width, |
---|
| 187 | dspin_rsp_width>( |
---|
| 188 | "wi_gate", |
---|
| 189 | x_width + y_width + l_width); |
---|
[621] | 190 | |
---|
[692] | 191 | wt_gate = new VciDspinTargetWrapper<vci_param_int, |
---|
| 192 | dspin_cmd_width, |
---|
| 193 | dspin_rsp_width>( |
---|
| 194 | "wt_gate", |
---|
| 195 | x_width + y_width + l_width); |
---|
| 196 | |
---|
[621] | 197 | ///////////////////////////////////////////////////////////////////////////// |
---|
[628] | 198 | std::ostringstream s_xbar_m2p; |
---|
| 199 | s_xbar_m2p << "xbar_m2p_" << x_id << "_" << y_id; |
---|
| 200 | xbar_m2p = new DspinLocalCrossbar<dspin_cmd_width>( |
---|
| 201 | s_xbar_m2p.str().c_str(), |
---|
[621] | 202 | mtd, // mapping table |
---|
| 203 | x_id, y_id, // cluster coordinates |
---|
| 204 | x_width, y_width, l_width, |
---|
| 205 | 1, // number of local sources |
---|
[628] | 206 | nb_procs, // number of local dests |
---|
[621] | 207 | 2, 2, // fifo depths |
---|
| 208 | true, // CMD |
---|
| 209 | false, // don't use local routing table |
---|
| 210 | true ); // broadcast |
---|
| 211 | |
---|
| 212 | ///////////////////////////////////////////////////////////////////////////// |
---|
[628] | 213 | std::ostringstream s_xbar_p2m; |
---|
| 214 | s_xbar_p2m << "xbar_p2m_" << x_id << "_" << y_id; |
---|
| 215 | xbar_p2m = new DspinLocalCrossbar<dspin_rsp_width>( |
---|
| 216 | s_xbar_p2m.str().c_str(), |
---|
[621] | 217 | mtd, // mapping table |
---|
| 218 | x_id, y_id, // cluster coordinates |
---|
| 219 | x_width, y_width, 0, // l_width unused on p2m network |
---|
| 220 | nb_procs, // number of local sources |
---|
| 221 | 1, // number of local dests |
---|
| 222 | 2, 2, // fifo depths |
---|
| 223 | false, // RSP |
---|
| 224 | false, // don't use local routing table |
---|
| 225 | false ); // no broadcast |
---|
| 226 | |
---|
| 227 | ///////////////////////////////////////////////////////////////////////////// |
---|
[628] | 228 | std::ostringstream s_xbar_cla; |
---|
| 229 | s_xbar_cla << "xbar_cla_" << x_id << "_" << y_id; |
---|
| 230 | xbar_cla = new DspinLocalCrossbar<dspin_cmd_width>( |
---|
| 231 | s_xbar_cla.str().c_str(), |
---|
[621] | 232 | mtd, // mapping table |
---|
| 233 | x_id, y_id, // cluster coordinates |
---|
| 234 | x_width, y_width, l_width, |
---|
| 235 | 1, // number of local sources |
---|
[628] | 236 | nb_procs, // number of local dests |
---|
| 237 | 2, 2, // fifo depths |
---|
[621] | 238 | true, // CMD |
---|
| 239 | false, // don't use local routing table |
---|
[628] | 240 | false); // no broadcast |
---|
[621] | 241 | |
---|
| 242 | ///////////////////////////////////////////////////////////////////////////// |
---|
[628] | 243 | std::ostringstream s_router_cmd; |
---|
| 244 | s_router_cmd << "router_cmd_" << x_id << "_" << y_id; |
---|
| 245 | router_cmd = new DspinRouter<dspin_cmd_width>( |
---|
| 246 | s_router_cmd.str().c_str(), |
---|
[621] | 247 | x_id,y_id, // coordinate in the mesh |
---|
| 248 | x_width, y_width, // x & y fields width |
---|
| 249 | 4,4); // input & output fifo depths |
---|
| 250 | |
---|
| 251 | ///////////////////////////////////////////////////////////////////////////// |
---|
[628] | 252 | std::ostringstream s_router_rsp; |
---|
| 253 | s_router_rsp << "router_rsp_" << x_id << "_" << y_id; |
---|
| 254 | router_rsp = new DspinRouter<dspin_rsp_width>( |
---|
| 255 | s_router_rsp.str().c_str(), |
---|
[621] | 256 | x_id,y_id, // coordinates in mesh |
---|
| 257 | x_width, y_width, // x & y fields width |
---|
| 258 | 4,4); // input & output fifo depths |
---|
| 259 | |
---|
[628] | 260 | ///////////////////////////////////////////////////////////////////////////// |
---|
| 261 | std::ostringstream s_router_m2p; |
---|
| 262 | s_router_m2p << "router_m2p_" << x_id << "_" << y_id; |
---|
| 263 | router_m2p = new DspinRouter<dspin_cmd_width>( |
---|
| 264 | s_router_m2p.str().c_str(), |
---|
| 265 | x_id,y_id, // coordinate in the mesh |
---|
| 266 | x_width, y_width, // x & y fields width |
---|
| 267 | 4,4, // input & output fifo depths |
---|
| 268 | true); // broadcast supported |
---|
[621] | 269 | |
---|
[628] | 270 | ///////////////////////////////////////////////////////////////////////////// |
---|
| 271 | std::ostringstream s_router_p2m; |
---|
| 272 | s_router_p2m << "router_p2m_" << x_id << "_" << y_id; |
---|
| 273 | router_p2m = new DspinRouter<dspin_rsp_width>( |
---|
| 274 | s_router_p2m.str().c_str(), |
---|
| 275 | x_id,y_id, // coordinates in mesh |
---|
| 276 | x_width, y_width, // x & y fields width |
---|
| 277 | 4,4); // input & output fifo depths |
---|
[621] | 278 | |
---|
[628] | 279 | ///////////////////////////////////////////////////////////////////////////// |
---|
| 280 | std::ostringstream s_router_cla; |
---|
| 281 | s_router_cla << "router_cla_" << x_id << "_" << y_id; |
---|
| 282 | router_cla = new DspinRouter<dspin_cmd_width>( |
---|
| 283 | s_router_cla.str().c_str(), |
---|
| 284 | x_id,y_id, // coordinate in the mesh |
---|
| 285 | x_width, y_width, // x & y fields width |
---|
| 286 | 4,4); // input & output fifo depths |
---|
| 287 | |
---|
[664] | 288 | // backup BDV and TTY peripherals in cluster(0,0) |
---|
[692] | 289 | bdev = NULL; |
---|
| 290 | mtty = NULL; |
---|
[628] | 291 | if ((x_id == 0) and (y_id == 0)) |
---|
| 292 | { |
---|
[621] | 293 | ///////////////////////////////////////////// |
---|
| 294 | bdev = new VciBlockDeviceTsar<vci_param_int>( |
---|
| 295 | "bdev", |
---|
| 296 | mtd, |
---|
[628] | 297 | IntTab(cluster_xy, nb_procs), |
---|
[621] | 298 | IntTab(cluster_xy, tgtid_bdev), |
---|
[628] | 299 | disk_pathname, |
---|
| 300 | 512, |
---|
| 301 | 64 ); // burst size |
---|
[621] | 302 | |
---|
| 303 | ///////////////////////////////////////////// |
---|
| 304 | mtty = new VciMultiTty<vci_param_int>( |
---|
| 305 | "mtty", |
---|
| 306 | IntTab(cluster_xy, tgtid_mtty), |
---|
| 307 | mtd, |
---|
[692] | 308 | "tty_backup", NULL ); |
---|
[628] | 309 | } |
---|
[621] | 310 | |
---|
[628] | 311 | std::cout << std::endl; |
---|
[621] | 312 | |
---|
| 313 | //////////////////////////////////// |
---|
| 314 | // Connections are defined here |
---|
| 315 | //////////////////////////////////// |
---|
| 316 | |
---|
[628] | 317 | //////////////////////// ROUTERS |
---|
| 318 | router_cmd->p_clk (this->p_clk); |
---|
| 319 | router_cmd->p_resetn (this->p_resetn); |
---|
| 320 | router_rsp->p_clk (this->p_clk); |
---|
| 321 | router_rsp->p_resetn (this->p_resetn); |
---|
| 322 | router_m2p->p_clk (this->p_clk); |
---|
| 323 | router_m2p->p_resetn (this->p_resetn); |
---|
| 324 | router_p2m->p_clk (this->p_clk); |
---|
| 325 | router_p2m->p_resetn (this->p_resetn); |
---|
| 326 | router_cla->p_clk (this->p_clk); |
---|
| 327 | router_cla->p_resetn (this->p_resetn); |
---|
[621] | 328 | |
---|
[628] | 329 | // loop on N/S/E/W ports |
---|
| 330 | for (size_t i = 0; i < 4; i++) |
---|
[621] | 331 | { |
---|
[628] | 332 | router_cmd->p_out[i] (this->p_cmd_out[i]); |
---|
| 333 | router_cmd->p_in[i] (this->p_cmd_in[i]); |
---|
[621] | 334 | |
---|
[628] | 335 | router_rsp->p_out[i] (this->p_rsp_out[i]); |
---|
| 336 | router_rsp->p_in[i] (this->p_rsp_in[i]); |
---|
| 337 | |
---|
| 338 | router_m2p->p_out[i] (this->p_m2p_out[i]); |
---|
| 339 | router_m2p->p_in[i] (this->p_m2p_in[i]); |
---|
| 340 | |
---|
| 341 | router_p2m->p_out[i] (this->p_p2m_out[i]); |
---|
| 342 | router_p2m->p_in[i] (this->p_p2m_in[i]); |
---|
| 343 | |
---|
| 344 | router_cla->p_out[i] (this->p_cla_out[i]); |
---|
| 345 | router_cla->p_in[i] (this->p_cla_in[i]); |
---|
[621] | 346 | } |
---|
| 347 | |
---|
[628] | 348 | router_cmd->p_out[4] (signal_dspin_cmd_g2l_d); |
---|
| 349 | router_cmd->p_in[4] (signal_dspin_cmd_l2g_d); |
---|
[621] | 350 | |
---|
[628] | 351 | router_rsp->p_out[4] (signal_dspin_rsp_g2l_d); |
---|
| 352 | router_rsp->p_in[4] (signal_dspin_rsp_l2g_d); |
---|
[621] | 353 | |
---|
[628] | 354 | router_m2p->p_out[4] (signal_dspin_m2p_g2l_c); |
---|
| 355 | router_m2p->p_in[4] (signal_dspin_m2p_l2g_c); |
---|
[621] | 356 | |
---|
[628] | 357 | router_p2m->p_out[4] (signal_dspin_p2m_g2l_c); |
---|
| 358 | router_p2m->p_in[4] (signal_dspin_p2m_l2g_c); |
---|
[621] | 359 | |
---|
[628] | 360 | router_cla->p_out[4] (signal_dspin_clack_g2l_c); |
---|
| 361 | router_cla->p_in[4] (signal_dspin_clack_l2g_c); |
---|
| 362 | |
---|
| 363 | std::cout << " - routers connected" << std::endl; |
---|
| 364 | |
---|
[621] | 365 | ///////////////////// CMD DSPIN local crossbar direct |
---|
[628] | 366 | xbar_cmd->p_clk (this->p_clk); |
---|
| 367 | xbar_cmd->p_resetn (this->p_resetn); |
---|
[692] | 368 | xbar_cmd->p_initiator_to_up (signal_vci_l2g); |
---|
| 369 | xbar_cmd->p_target_to_up (signal_vci_g2l); |
---|
[621] | 370 | |
---|
[692] | 371 | xbar_cmd->p_to_target[tgtid_memc] (signal_vci_tgt_memc); |
---|
| 372 | xbar_cmd->p_to_target[tgtid_xicu] (signal_vci_tgt_xicu); |
---|
[621] | 373 | |
---|
| 374 | for (size_t p = 0; p < nb_procs; p++) |
---|
[692] | 375 | xbar_cmd->p_to_initiator[p] (signal_vci_ini_proc[p]); |
---|
[621] | 376 | |
---|
[628] | 377 | if ((x_id == 0) and (y_id == 0)) // cluster(0,0) |
---|
[621] | 378 | { |
---|
[692] | 379 | xbar_cmd->p_to_target[tgtid_mtty] (signal_vci_tgt_mtty); |
---|
| 380 | xbar_cmd->p_to_target[tgtid_bdev] (signal_vci_tgt_bdev); |
---|
| 381 | xbar_cmd->p_to_initiator[nb_procs] (signal_vci_ini_bdev); |
---|
[621] | 382 | } |
---|
| 383 | |
---|
[692] | 384 | wi_gate->p_clk (this->p_clk); |
---|
| 385 | wi_gate->p_resetn (this->p_resetn); |
---|
| 386 | wi_gate->p_vci (signal_vci_l2g); |
---|
| 387 | wi_gate->p_dspin_cmd (signal_dspin_cmd_l2g_d); |
---|
| 388 | wi_gate->p_dspin_rsp (signal_dspin_rsp_g2l_d); |
---|
[621] | 389 | |
---|
[692] | 390 | wt_gate->p_clk (this->p_clk); |
---|
| 391 | wt_gate->p_resetn (this->p_resetn); |
---|
| 392 | wt_gate->p_vci (signal_vci_g2l); |
---|
| 393 | wt_gate->p_dspin_cmd (signal_dspin_cmd_g2l_d); |
---|
| 394 | wt_gate->p_dspin_rsp (signal_dspin_rsp_l2g_d); |
---|
[621] | 395 | |
---|
[692] | 396 | std::cout << " - CMD & RSP Direct crossbar connected" << std::endl; |
---|
[621] | 397 | |
---|
| 398 | ////////////////////// M2P DSPIN local crossbar coherence |
---|
[628] | 399 | xbar_m2p->p_clk (this->p_clk); |
---|
| 400 | xbar_m2p->p_resetn (this->p_resetn); |
---|
| 401 | xbar_m2p->p_global_out (signal_dspin_m2p_l2g_c); |
---|
| 402 | xbar_m2p->p_global_in (signal_dspin_m2p_g2l_c); |
---|
| 403 | xbar_m2p->p_local_in[0] (signal_dspin_m2p_memc); |
---|
[621] | 404 | for (size_t p = 0; p < nb_procs; p++) |
---|
[628] | 405 | xbar_m2p->p_local_out[p] (signal_dspin_m2p_proc[p]); |
---|
[621] | 406 | |
---|
| 407 | std::cout << " - M2P Coherence crossbar connected" << std::endl; |
---|
| 408 | |
---|
[628] | 409 | ////////////////////////// P2M DSPIN local crossbar coherence |
---|
| 410 | xbar_p2m->p_clk (this->p_clk); |
---|
| 411 | xbar_p2m->p_resetn (this->p_resetn); |
---|
| 412 | xbar_p2m->p_global_out (signal_dspin_p2m_l2g_c); |
---|
| 413 | xbar_p2m->p_global_in (signal_dspin_p2m_g2l_c); |
---|
| 414 | xbar_p2m->p_local_out[0] (signal_dspin_p2m_memc); |
---|
[621] | 415 | for (size_t p = 0; p < nb_procs; p++) |
---|
[628] | 416 | xbar_p2m->p_local_in[p] (signal_dspin_p2m_proc[p]); |
---|
[621] | 417 | |
---|
[628] | 418 | std::cout << " - P2M Coherence crossbar connected" << std::endl; |
---|
[621] | 419 | |
---|
[628] | 420 | ////////////////////// CLACK DSPIN local crossbar coherence |
---|
| 421 | xbar_cla->p_clk (this->p_clk); |
---|
| 422 | xbar_cla->p_resetn (this->p_resetn); |
---|
| 423 | xbar_cla->p_global_out (signal_dspin_clack_l2g_c); |
---|
| 424 | xbar_cla->p_global_in (signal_dspin_clack_g2l_c); |
---|
| 425 | xbar_cla->p_local_in[0] (signal_dspin_clack_memc); |
---|
[621] | 426 | for (size_t p = 0; p < nb_procs; p++) |
---|
[628] | 427 | xbar_cla->p_local_out[p] (signal_dspin_clack_proc[p]); |
---|
[621] | 428 | |
---|
[628] | 429 | std::cout << " - CLA Coherence crossbar connected" << std::endl; |
---|
[621] | 430 | |
---|
| 431 | //////////////////////////////////// Processors |
---|
| 432 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 433 | { |
---|
| 434 | proc[p]->p_clk (this->p_clk); |
---|
| 435 | proc[p]->p_resetn (this->p_resetn); |
---|
| 436 | proc[p]->p_vci (signal_vci_ini_proc[p]); |
---|
| 437 | proc[p]->p_dspin_m2p (signal_dspin_m2p_proc[p]); |
---|
| 438 | proc[p]->p_dspin_p2m (signal_dspin_p2m_proc[p]); |
---|
| 439 | proc[p]->p_dspin_clack (signal_dspin_clack_proc[p]); |
---|
[628] | 440 | |
---|
| 441 | for ( size_t j = 0 ; j < 6 ; j++) |
---|
[621] | 442 | { |
---|
[628] | 443 | if ( j < 4 ) proc[p]->p_irq[j] (signal_proc_irq[4*p + j]); |
---|
| 444 | else proc[p]->p_irq[j] (signal_false); |
---|
[621] | 445 | } |
---|
| 446 | } |
---|
| 447 | |
---|
| 448 | std::cout << " - Processors connected" << std::endl; |
---|
| 449 | |
---|
| 450 | ///////////////////////////////////// XICU |
---|
| 451 | xicu->p_clk (this->p_clk); |
---|
| 452 | xicu->p_resetn (this->p_resetn); |
---|
| 453 | xicu->p_vci (signal_vci_tgt_xicu); |
---|
[628] | 454 | |
---|
| 455 | for (size_t i = 0 ; i < 16 ; i++) |
---|
[621] | 456 | { |
---|
[628] | 457 | xicu->p_irq[i] (signal_proc_irq[i]); |
---|
[621] | 458 | } |
---|
| 459 | |
---|
[628] | 460 | for (size_t i = 0; i < 16; i++) |
---|
[621] | 461 | { |
---|
[628] | 462 | if ((x_id == 0) and (y_id == 0)) // cluster (0,0) |
---|
[621] | 463 | { |
---|
[628] | 464 | if (i == 8) xicu->p_hwi[i] (signal_irq_memc); |
---|
| 465 | else if (i == 9) xicu->p_hwi[i] (signal_irq_bdev); |
---|
| 466 | else if (i == 10) xicu->p_hwi[i] (signal_irq_mtty); |
---|
| 467 | else xicu->p_hwi[i] (signal_false); |
---|
[621] | 468 | } |
---|
[628] | 469 | else // other clusters |
---|
[621] | 470 | { |
---|
[732] | 471 | if (i == 8) xicu->p_hwi[i] (signal_irq_memc); |
---|
[628] | 472 | else xicu->p_hwi[i] (signal_false); |
---|
[621] | 473 | } |
---|
| 474 | } |
---|
| 475 | |
---|
| 476 | std::cout << " - XICU connected" << std::endl; |
---|
| 477 | |
---|
| 478 | //////////////////////////////////////////////// MEMC |
---|
| 479 | memc->p_clk (this->p_clk); |
---|
| 480 | memc->p_resetn (this->p_resetn); |
---|
| 481 | memc->p_irq (signal_irq_memc); |
---|
| 482 | memc->p_vci_ixr (signal_vci_xram); |
---|
| 483 | memc->p_vci_tgt (signal_vci_tgt_memc); |
---|
| 484 | memc->p_dspin_p2m (signal_dspin_p2m_memc); |
---|
| 485 | memc->p_dspin_m2p (signal_dspin_m2p_memc); |
---|
| 486 | memc->p_dspin_clack (signal_dspin_clack_memc); |
---|
| 487 | |
---|
| 488 | std::cout << " - MEMC connected" << std::endl; |
---|
| 489 | |
---|
| 490 | /////////////////////////////////////////////// XRAM |
---|
| 491 | xram->p_clk (this->p_clk); |
---|
| 492 | xram->p_resetn (this->p_resetn); |
---|
| 493 | xram->p_vci (signal_vci_xram); |
---|
| 494 | |
---|
| 495 | std::cout << " - XRAM connected" << std::endl; |
---|
| 496 | |
---|
[628] | 497 | /////////////////////////////// Extra Components in cluster(0,0) |
---|
[621] | 498 | |
---|
[628] | 499 | if ((x_id == 0) and (y_id == 0)) |
---|
[621] | 500 | { |
---|
| 501 | // BDEV |
---|
| 502 | bdev->p_clk (this->p_clk); |
---|
| 503 | bdev->p_resetn (this->p_resetn); |
---|
| 504 | bdev->p_irq (signal_irq_bdev); |
---|
| 505 | bdev->p_vci_target (signal_vci_tgt_bdev); |
---|
| 506 | bdev->p_vci_initiator (signal_vci_ini_bdev); |
---|
| 507 | |
---|
| 508 | std::cout << " - BDEV connected" << std::endl; |
---|
| 509 | |
---|
[628] | 510 | // MTTY (single channel) |
---|
[621] | 511 | mtty->p_clk (this->p_clk); |
---|
| 512 | mtty->p_resetn (this->p_resetn); |
---|
| 513 | mtty->p_vci (signal_vci_tgt_mtty); |
---|
[628] | 514 | mtty->p_irq[0] (signal_irq_mtty); |
---|
[621] | 515 | |
---|
| 516 | std::cout << " - MTTY connected" << std::endl; |
---|
[628] | 517 | } |
---|
[621] | 518 | } // end constructor |
---|
| 519 | |
---|
| 520 | |
---|
| 521 | |
---|
| 522 | template<size_t dspin_cmd_width, |
---|
| 523 | size_t dspin_rsp_width, |
---|
| 524 | typename vci_param_int, |
---|
| 525 | typename vci_param_ext> TsarLetiCluster<dspin_cmd_width, |
---|
| 526 | dspin_rsp_width, |
---|
| 527 | vci_param_int, |
---|
| 528 | vci_param_ext>::~TsarLetiCluster() { |
---|
| 529 | |
---|
[628] | 530 | dealloc_elems<DspinInput<dspin_cmd_width> > (p_cmd_in, 4); |
---|
| 531 | dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cmd_out, 4); |
---|
[621] | 532 | |
---|
[628] | 533 | dealloc_elems<DspinInput<dspin_rsp_width> > (p_rsp_in, 4); |
---|
| 534 | dealloc_elems<DspinOutput<dspin_rsp_width> >(p_rsp_out, 4); |
---|
| 535 | |
---|
| 536 | dealloc_elems<DspinInput<dspin_cmd_width> > (p_m2p_in, 4); |
---|
| 537 | dealloc_elems<DspinOutput<dspin_cmd_width> >(p_m2p_out, 4); |
---|
| 538 | |
---|
| 539 | dealloc_elems<DspinInput<dspin_rsp_width> > (p_p2m_in, 4); |
---|
| 540 | dealloc_elems<DspinOutput<dspin_rsp_width> >(p_p2m_out, 4); |
---|
| 541 | |
---|
| 542 | dealloc_elems<DspinInput<dspin_cmd_width> > (p_cla_in, 4); |
---|
| 543 | dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cla_out, 4); |
---|
| 544 | |
---|
[692] | 545 | for (size_t p = 0; p < m_nprocs ; p++) |
---|
[621] | 546 | { |
---|
[692] | 547 | if ( proc[p] ) delete proc[p]; |
---|
[621] | 548 | } |
---|
| 549 | |
---|
| 550 | delete memc; |
---|
| 551 | delete xram; |
---|
| 552 | delete xicu; |
---|
[628] | 553 | delete xbar_cmd; |
---|
| 554 | delete xbar_m2p; |
---|
| 555 | delete xbar_p2m; |
---|
| 556 | delete xbar_cla; |
---|
[621] | 557 | delete router_cmd; |
---|
| 558 | delete router_rsp; |
---|
[628] | 559 | delete router_m2p; |
---|
| 560 | delete router_p2m; |
---|
| 561 | delete router_cla; |
---|
[692] | 562 | delete wi_gate; |
---|
| 563 | delete wt_gate; |
---|
[628] | 564 | |
---|
| 565 | if ( bdev ) |
---|
[621] | 566 | { |
---|
| 567 | delete bdev; |
---|
[628] | 568 | } |
---|
| 569 | |
---|
| 570 | if ( mtty ) |
---|
| 571 | { |
---|
[621] | 572 | delete mtty; |
---|
| 573 | } |
---|
| 574 | } |
---|
| 575 | |
---|
| 576 | |
---|
| 577 | }} |
---|
| 578 | |
---|
| 579 | // Local Variables: |
---|
| 580 | // tab-width: 4 |
---|
| 581 | // c-basic-offset: 4 |
---|
| 582 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
| 583 | // indent-tabs-mode: nil |
---|
| 584 | // End: |
---|
| 585 | |
---|
| 586 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|
| 587 | |
---|
| 588 | |
---|
| 589 | |
---|