[344] | 1 | ///////////////////////////////////////////////////////////////////////// |
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| 2 | // File: top.cpp |
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| 3 | // Author: Alain Greiner |
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| 4 | // Copyright: UPMC/LIP6 |
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[396] | 5 | // Date : may 2013 |
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[344] | 6 | // This program is released under the GNU public license |
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| 7 | ///////////////////////////////////////////////////////////////////////// |
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[396] | 8 | // This file define a generic TSAR architecture. |
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| 9 | // The physical address space is 40 bits. |
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| 10 | // |
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[344] | 11 | // The number of clusters cannot be larger than 256. |
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| 12 | // The number of processors per cluster cannot be larger than 8. |
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| 13 | // |
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| 14 | // - It uses four dspin_local_crossbar per cluster as local interconnect |
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| 15 | // - It uses two virtual_dspin routers per cluster as global interconnect |
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| 16 | // - It uses the vci_cc_vcache_wrapper |
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| 17 | // - It uses the vci_mem_cache |
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[396] | 18 | // - It contains one vci_xicu per cluster. |
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| 19 | // - It contains one vci_multi_dma per cluster. |
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| 20 | // - It contains one vci_simple_ram per cluster to model the L3 cache. |
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[344] | 21 | // |
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[396] | 22 | // The communication between the MemCache and the Xram is 64 bits. |
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| 23 | // |
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| 24 | // All clusters are identical, but the cluster 0 (called io_cluster), |
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| 25 | // contains 5 extra components: |
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[344] | 26 | // - the boot rom (BROM) |
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| 27 | // - the disk controller (BDEV) |
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| 28 | // - the multi-channel network controller (MNIC) |
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| 29 | // - the multi-channel tty controller (MTTY) |
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| 30 | // - the frame buffer controller (FBUF) |
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| 31 | // |
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[396] | 32 | // It is build with one single component implementing a cluster, |
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| 33 | // defined in files tsar_xbar_cluster.* (with * = cpp, h, sd) |
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[344] | 34 | // |
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| 35 | // The IRQs are connected to XICUs as follow: |
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| 36 | // - The IRQ_IN[0] to IRQ_IN[7] ports are not used in all clusters. |
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| 37 | // - The DMA IRQs are connected to IRQ_IN[8] to IRQ_IN[15] in all clusters. |
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| 38 | // - The TTY IRQs are connected to IRQ_IN[16] to IRQ_IN[30] in I/O cluster. |
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| 39 | // - The BDEV IRQ is connected to IRQ_IN[31] in I/O cluster. |
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| 40 | // |
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[396] | 41 | // Some hardware parameters are used when compiling the OS, and are used |
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| 42 | // by this top.cpp file. They must be defined in the hard_config.h file : |
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[344] | 43 | // - CLUSTER_X : number of clusters in a row (power of 2) |
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| 44 | // - CLUSTER_Y : number of clusters in a column (power of 2) |
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| 45 | // - CLUSTER_SIZE : size of the segment allocated to a cluster |
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| 46 | // - NB_PROCS_MAX : number of processors per cluster (power of 2) |
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[396] | 47 | // - NB_DMA_CHANNELS : number of DMA channels per cluster (< 9) |
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| 48 | // - NB_TTY_CHANNELS : number of TTY channels in I/O cluster (< 16) |
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| 49 | // - NB_NIC_CHANNELS : number of NIC channels in I/O cluster (< 9) |
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[344] | 50 | // |
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[396] | 51 | // Some other hardware parameters are not used when compiling the OS, |
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| 52 | // and can be directly defined in this top.cpp file: |
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[344] | 53 | // - XRAM_LATENCY : external ram latency |
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| 54 | // - MEMC_WAYS : L2 cache number of ways |
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| 55 | // - MEMC_SETS : L2 cache number of sets |
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| 56 | // - L1_IWAYS |
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| 57 | // - L1_ISETS |
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| 58 | // - L1_DWAYS |
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| 59 | // - L1_DSETS |
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| 60 | // - FBUF_X_SIZE : width of frame buffer (pixels) |
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| 61 | // - FBUF_Y_SIZE : heigth of frame buffer (lines) |
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| 62 | // - BDEV_SECTOR_SIZE : block size for block drvice |
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| 63 | // - BDEV_IMAGE_NAME : file pathname for block device |
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| 64 | // - NIC_RX_NAME : file pathname for NIC received packets |
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| 65 | // - NIC_TX_NAME : file pathname for NIC transmited packets |
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| 66 | // - NIC_TIMEOUT : max number of cycles before closing a container |
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[396] | 67 | ///////////////////////////////////////////////////////////////////////// |
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| 68 | // General policy for 40 bits physical address decoding: |
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| 69 | // All physical segments base addresses are multiple of 1 Mbytes |
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| 70 | // (=> the 24 LSB bits = 0, and the 16 MSB bits define the target) |
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[344] | 71 | // The (x_width + y_width) MSB bits (left aligned) define |
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[396] | 72 | // the cluster index, and the LADR bits define the local index: |
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[344] | 73 | // | X_ID | Y_ID |---| LADR | OFFSET | |
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[396] | 74 | // |x_width|y_width|---| 8 | 24 | |
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[344] | 75 | ///////////////////////////////////////////////////////////////////////// |
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[396] | 76 | // General policy for 14 bits SRCID decoding: |
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| 77 | // Each component is identified by (x_id, y_id, l_id) tuple. |
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| 78 | // | X_ID | Y_ID |---| L_ID | |
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| 79 | // |x_width|y_width|---| 6 | |
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| 80 | ///////////////////////////////////////////////////////////////////////// |
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[344] | 81 | |
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| 82 | #include <systemc> |
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| 83 | #include <sys/time.h> |
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| 84 | #include <iostream> |
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| 85 | #include <sstream> |
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| 86 | #include <cstdlib> |
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| 87 | #include <cstdarg> |
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| 88 | #include <stdint.h> |
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| 89 | |
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| 90 | #include "gdbserver.h" |
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| 91 | #include "mapping_table.h" |
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[378] | 92 | #include "tsar_xbar_cluster.h" |
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[344] | 93 | #include "alloc_elems.h" |
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| 94 | |
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| 95 | /////////////////////////////////////////////////// |
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| 96 | // OS |
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| 97 | /////////////////////////////////////////////////// |
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| 98 | #define USE_ALMOS 0 |
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| 99 | |
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| 100 | #define almos_bootloader_pathname "bootloader.bin" |
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| 101 | #define almos_kernel_pathname "kernel-soclib.bin@0xbfc10000:D" |
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| 102 | #define almos_archinfo_pathname "arch-info.bin@0xBFC08000:D" |
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| 103 | |
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| 104 | /////////////////////////////////////////////////// |
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| 105 | // Parallelisation |
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| 106 | /////////////////////////////////////////////////// |
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| 107 | #define USE_OPENMP 0 |
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| 108 | |
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| 109 | #if USE_OPENMP |
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| 110 | #include <omp.h> |
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| 111 | #endif |
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| 112 | |
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| 113 | // cluster index (computed from x,y coordinates) |
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| 114 | #define cluster(x,y) (y + CLUSTER_Y*x) |
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| 115 | |
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| 116 | /////////////////////////////////////////////////////////// |
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| 117 | // DSPIN parameters |
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| 118 | /////////////////////////////////////////////////////////// |
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| 119 | |
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[396] | 120 | #define dspin_cmd_width 40 |
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| 121 | #define dspin_rsp_width 33 |
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[344] | 122 | |
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[396] | 123 | /////////////////////////////////////////////////////////// |
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| 124 | // VCI parameters |
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| 125 | /////////////////////////////////////////////////////////// |
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| 126 | |
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| 127 | #define int_vci_cell_width 4 |
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| 128 | #define int_vci_plen_width 8 |
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| 129 | #define int_vci_address_width 40 |
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| 130 | #define int_vci_rerror_width 1 |
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| 131 | #define int_vci_clen_width 1 |
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| 132 | #define int_vci_rflag_width 1 |
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| 133 | #define int_vci_srcid_width 14 |
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| 134 | #define int_vci_pktid_width 4 |
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| 135 | #define int_vci_trdid_width 4 |
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| 136 | #define int_vci_wrplen_width 1 |
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| 137 | |
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| 138 | #define ext_vci_cell_width 8 |
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| 139 | #define ext_vci_plen_width 8 |
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| 140 | #define ext_vci_address_width 40 |
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| 141 | #define ext_vci_rerror_width 1 |
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| 142 | #define ext_vci_clen_width 1 |
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| 143 | #define ext_vci_rflag_width 1 |
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| 144 | #define ext_vci_srcid_width 14 |
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| 145 | #define ext_vci_pktid_width 4 |
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| 146 | #define ext_vci_trdid_width 4 |
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| 147 | #define ext_vci_wrplen_width 1 |
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| 148 | |
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[344] | 149 | //////////////////////////////////////////////////////////// |
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| 150 | // Main Hardware Parameters values |
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| 151 | //////////////////////i///////////////////////////////////// |
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| 152 | |
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[370] | 153 | #include "giet_vm/hard_config.h" |
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[344] | 154 | |
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| 155 | //////////////////////////////////////////////////////////// |
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[396] | 156 | // Secondary Hardware Parameters |
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[344] | 157 | //////////////////////i///////////////////////////////////// |
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| 158 | |
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| 159 | #define XRAM_LATENCY 0 |
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| 160 | |
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| 161 | #define MEMC_WAYS 16 |
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| 162 | #define MEMC_SETS 256 |
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| 163 | |
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| 164 | #define L1_IWAYS 4 |
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| 165 | #define L1_ISETS 64 |
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| 166 | |
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| 167 | #define L1_DWAYS 4 |
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| 168 | #define L1_DSETS 64 |
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| 169 | |
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| 170 | #define FBUF_X_SIZE 128 |
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| 171 | #define FBUF_Y_SIZE 128 |
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| 172 | |
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| 173 | #define BDEV_SECTOR_SIZE 512 |
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[351] | 174 | #define BDEV_IMAGE_NAME "giet_vm/display/images.raw" |
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[344] | 175 | |
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[379] | 176 | #define NIC_RX_NAME "giet_vm/nic/rx_packets.txt" |
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| 177 | #define NIC_TX_NAME "giet_vm/nic/tx_packets.txt" |
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[344] | 178 | #define NIC_TIMEOUT 10000 |
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| 179 | |
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| 180 | //////////////////////////////////////////////////////////// |
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| 181 | // Software to be loaded in ROM & RAM |
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| 182 | //////////////////////i///////////////////////////////////// |
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| 183 | |
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[396] | 184 | #define SOFT_NAME "giet_vm/soft.elf" |
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[344] | 185 | |
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| 186 | //////////////////////////////////////////////////////////// |
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| 187 | // DEBUG Parameters default values |
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| 188 | //////////////////////i///////////////////////////////////// |
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| 189 | |
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| 190 | #define MAX_FROZEN_CYCLES 10000 |
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| 191 | |
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[396] | 192 | #define TRACE_MEMC_ID 1000000 |
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| 193 | #define TRACE_PROC_ID 1000000 |
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[344] | 194 | |
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| 195 | ///////////////////////////////////////////////////////// |
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| 196 | // Physical segments definition |
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| 197 | ///////////////////////////////////////////////////////// |
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| 198 | // There is 3 segments replicated in all clusters |
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| 199 | // and 5 specific segments in the "IO" cluster |
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| 200 | // (containing address 0xBF000000) |
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| 201 | ///////////////////////////////////////////////////////// |
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| 202 | |
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| 203 | // specific segments in "IO" cluster : absolute physical address |
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| 204 | |
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[396] | 205 | #define BROM_BASE 0x00BFC00000 |
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| 206 | #define BROM_SIZE 0x0000100000 // 1 Mbytes |
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[344] | 207 | |
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[396] | 208 | #define FBUF_BASE 0x00B2000000 |
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| 209 | #define FBUF_SIZE FBUF_X_SIZE * FBUF_Y_SIZE |
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[344] | 210 | |
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[396] | 211 | #define BDEV_BASE 0x00B3000000 |
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| 212 | #define BDEV_SIZE 0x0000001000 // 4 Kbytes |
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[344] | 213 | |
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[396] | 214 | #define MTTY_BASE 0x00B4000000 |
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| 215 | #define MTTY_SIZE 0x0000001000 // 4 Kbytes |
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[344] | 216 | |
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[396] | 217 | #define MNIC_BASE 0x00B5000000 |
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[402] | 218 | #define MNIC_SIZE 0x0000080000 // 512 Kbytes (for 8 channels) |
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[344] | 219 | |
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| 220 | // replicated segments : address is incremented by a cluster offset |
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| 221 | // offset = cluster(x,y) << (address_width-x_width-y_width); |
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| 222 | |
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[396] | 223 | #define MEMC_BASE 0x0000000000 |
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| 224 | #define MEMC_SIZE 0x0010000000 // 256 Mbytes per cluster |
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[344] | 225 | |
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[396] | 226 | #define XICU_BASE 0x00B0000000 |
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| 227 | #define XICU_SIZE 0x0000001000 // 4 Kbytes |
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[344] | 228 | |
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[396] | 229 | #define MDMA_BASE 0x00B1000000 |
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| 230 | #define MDMA_SIZE 0x0000001000 * NB_DMA_CHANNELS // 4 Kbytes per channel |
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[344] | 231 | |
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| 232 | //////////////////////////////////////////////////////////////////// |
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| 233 | // TGTID definition in direct space |
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| 234 | // For all components: global TGTID = global SRCID = cluster_index |
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| 235 | //////////////////////////////////////////////////////////////////// |
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| 236 | |
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[396] | 237 | #define MEMC_TGTID 0 |
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| 238 | #define XICU_TGTID 1 |
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| 239 | #define MDMA_TGTID 2 |
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| 240 | #define MTTY_TGTID 3 |
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| 241 | #define FBUF_TGTID 4 |
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| 242 | #define BDEV_TGTID 5 |
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| 243 | #define MNIC_TGTID 6 |
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| 244 | #define BROM_TGTID 7 |
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[344] | 245 | |
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| 246 | ///////////////////////////////// |
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| 247 | int _main(int argc, char *argv[]) |
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| 248 | { |
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| 249 | using namespace sc_core; |
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| 250 | using namespace soclib::caba; |
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| 251 | using namespace soclib::common; |
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| 252 | |
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| 253 | |
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[396] | 254 | char soft_name[256] = SOFT_NAME; // pathname to binary code |
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[344] | 255 | size_t ncycles = 1000000000; // simulated cycles |
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| 256 | char disk_name[256] = BDEV_IMAGE_NAME; // pathname to the disk image |
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| 257 | char nic_rx_name[256] = NIC_RX_NAME; // pathname to the rx packets file |
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| 258 | char nic_tx_name[256] = NIC_TX_NAME; // pathname to the tx packets file |
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| 259 | ssize_t threads_nr = 1; // simulator's threads number |
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| 260 | bool debug_ok = false; // trace activated |
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| 261 | size_t debug_period = 1; // trace period |
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[396] | 262 | size_t debug_memc_id = TRACE_MEMC_ID; // index of memc to be traced |
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[344] | 263 | size_t debug_proc_id = TRACE_PROC_ID; // index of proc to be traced |
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| 264 | uint32_t debug_from = 0; // trace start cycle |
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| 265 | uint32_t frozen_cycles = MAX_FROZEN_CYCLES; // monitoring frozen processor |
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[396] | 266 | size_t cluster_io_id = 0; // index of cluster containing IOs |
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[344] | 267 | |
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| 268 | ////////////// command line arguments ////////////////////// |
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| 269 | if (argc > 1) |
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| 270 | { |
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| 271 | for (int n = 1; n < argc; n = n + 2) |
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| 272 | { |
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| 273 | if ((strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc)) |
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| 274 | { |
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| 275 | ncycles = atoi(argv[n+1]); |
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| 276 | } |
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| 277 | else if ((strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) ) |
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| 278 | { |
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| 279 | strcpy(soft_name, argv[n+1]); |
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| 280 | } |
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| 281 | else if ((strcmp(argv[n],"-DISK") == 0) && (n+1<argc) ) |
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| 282 | { |
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| 283 | strcpy(disk_name, argv[n+1]); |
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| 284 | } |
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| 285 | else if ((strcmp(argv[n],"-DEBUG") == 0) && (n+1<argc) ) |
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| 286 | { |
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| 287 | debug_ok = true; |
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| 288 | debug_from = atoi(argv[n+1]); |
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| 289 | } |
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| 290 | else if ((strcmp(argv[n],"-MEMCID") == 0) && (n+1<argc) ) |
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| 291 | { |
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| 292 | debug_memc_id = atoi(argv[n+1]); |
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| 293 | assert( (debug_memc_id < (CLUSTER_X*CLUSTER_Y) ) && |
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| 294 | "debug_memc_id larger than XMAX * YMAX" ); |
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| 295 | } |
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| 296 | else if ((strcmp(argv[n],"-PROCID") == 0) && (n+1<argc) ) |
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| 297 | { |
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| 298 | debug_proc_id = atoi(argv[n+1]); |
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| 299 | assert( (debug_proc_id < (CLUSTER_X * CLUSTER_Y * NB_PROCS_MAX) ) && |
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| 300 | "debug_proc_id larger than XMAX * YMAX * NB_PROCS" ); |
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| 301 | } |
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| 302 | else if ((strcmp(argv[n], "-THREADS") == 0) && ((n+1) < argc)) |
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| 303 | { |
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| 304 | threads_nr = atoi(argv[n+1]); |
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| 305 | threads_nr = (threads_nr < 1) ? 1 : threads_nr; |
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| 306 | } |
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| 307 | else if ((strcmp(argv[n], "-FROZEN") == 0) && (n+1 < argc)) |
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| 308 | { |
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| 309 | frozen_cycles = atoi(argv[n+1]); |
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| 310 | } |
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| 311 | else if ((strcmp(argv[n], "-PERIOD") == 0) && (n+1 < argc)) |
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| 312 | { |
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| 313 | debug_period = atoi(argv[n+1]); |
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| 314 | } |
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| 315 | else |
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| 316 | { |
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| 317 | std::cout << " Arguments are (key,value) couples." << std::endl; |
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| 318 | std::cout << " The order is not important." << std::endl; |
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| 319 | std::cout << " Accepted arguments are :" << std::endl << std::endl; |
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| 320 | std::cout << " -SOFT pathname_for_embedded_soft" << std::endl; |
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| 321 | std::cout << " -DISK pathname_for_disk_image" << std::endl; |
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| 322 | std::cout << " -NCYCLES number_of_simulated_cycles" << std::endl; |
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| 323 | std::cout << " -DEBUG debug_start_cycle" << std::endl; |
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| 324 | std::cout << " -THREADS simulator's threads number" << std::endl; |
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| 325 | std::cout << " -FROZEN max_number_of_lines" << std::endl; |
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| 326 | std::cout << " -PERIOD number_of_cycles between trace" << std::endl; |
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| 327 | std::cout << " -MEMCID index_memc_to_be_traced" << std::endl; |
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| 328 | std::cout << " -PROCID index_proc_to_be_traced" << std::endl; |
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| 329 | exit(0); |
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| 330 | } |
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| 331 | } |
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| 332 | } |
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| 333 | |
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[396] | 334 | // checking hardware parameters |
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| 335 | assert( ( (CLUSTER_X == 1) or (CLUSTER_X == 2) or (CLUSTER_X == 4) or |
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| 336 | (CLUSTER_X == 8) or (CLUSTER_X == 16) ) and |
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| 337 | "The CLUSTER_X parameter must be 1, 2, 4, 8 or 16" ); |
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[344] | 338 | |
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[396] | 339 | assert( ( (CLUSTER_Y == 1) or (CLUSTER_Y == 2) or (CLUSTER_Y == 4) or |
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| 340 | (CLUSTER_Y == 8) or (CLUSTER_Y == 16) ) and |
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| 341 | "The CLUSTER_Y parameter must be 1, 2, 4, 8 or 16" ); |
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[344] | 342 | |
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[396] | 343 | assert( ( (NB_PROCS_MAX == 1) or (NB_PROCS_MAX == 2) or |
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| 344 | (NB_PROCS_MAX == 4) or (NB_PROCS_MAX == 8) ) and |
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| 345 | "The NB_PROCS_MAX parameter must be 1, 2, 4 or 8" ); |
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[344] | 346 | |
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[396] | 347 | assert( (NB_DMA_CHANNELS < 9) and |
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| 348 | "The NB_DMA_CHANNELS parameter must be smaller than 9" ); |
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[344] | 349 | |
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[396] | 350 | assert( (NB_TTY_CHANNELS < 15) and |
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| 351 | "The NB_TTY_CHANNELS parameter must be smaller than 15" ); |
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[344] | 352 | |
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[396] | 353 | assert( (NB_NIC_CHANNELS < 9) and |
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| 354 | "The NB_NIC_CHANNELS parameter must be smaller than 9" ); |
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[344] | 355 | |
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[396] | 356 | assert( (int_vci_address_width == ext_vci_address_width) and |
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| 357 | "address widths must be equal on internal & external networks" ); |
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[344] | 358 | |
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[396] | 359 | assert( (int_vci_address_width == 40) and |
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| 360 | "VCI address width must be 40 bits" ); |
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[344] | 361 | |
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[396] | 362 | std::cout << std::endl; |
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| 363 | std::cout << " - CLUSTER_X = " << CLUSTER_X << std::endl; |
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| 364 | std::cout << " - CLUSTER_Y = " << CLUSTER_Y << std::endl; |
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| 365 | std::cout << " - NB_PROCS_MAX = " << NB_PROCS_MAX << std::endl; |
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| 366 | std::cout << " - NB_DMA_CHANNELS = " << NB_DMA_CHANNELS << std::endl; |
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| 367 | std::cout << " - NB_TTY_CHANNELS = " << NB_TTY_CHANNELS << std::endl; |
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| 368 | std::cout << " - NB_NIC_CHANNELS = " << NB_NIC_CHANNELS << std::endl; |
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| 369 | std::cout << " - MEMC_WAYS = " << MEMC_WAYS << std::endl; |
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| 370 | std::cout << " - MEMC_SETS = " << MEMC_SETS << std::endl; |
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| 371 | std::cout << " - RAM_LATENCY = " << XRAM_LATENCY << std::endl; |
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| 372 | std::cout << " - MAX_FROZEN = " << frozen_cycles << std::endl; |
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| 373 | |
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| 374 | std::cout << std::endl; |
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| 375 | |
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| 376 | // Internal and External VCI parameters definition |
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| 377 | typedef soclib::caba::VciParams<int_vci_cell_width, |
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| 378 | int_vci_plen_width, |
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| 379 | int_vci_address_width, |
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| 380 | int_vci_rerror_width, |
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| 381 | int_vci_clen_width, |
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| 382 | int_vci_rflag_width, |
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| 383 | int_vci_srcid_width, |
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| 384 | int_vci_pktid_width, |
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| 385 | int_vci_trdid_width, |
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| 386 | int_vci_wrplen_width> vci_param_int; |
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| 387 | |
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| 388 | typedef soclib::caba::VciParamsBis<ext_vci_cell_width, |
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| 389 | ext_vci_plen_width, |
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| 390 | ext_vci_address_width, |
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| 391 | ext_vci_rerror_width, |
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| 392 | ext_vci_clen_width, |
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| 393 | ext_vci_rflag_width, |
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| 394 | ext_vci_srcid_width, |
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| 395 | ext_vci_pktid_width, |
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| 396 | ext_vci_trdid_width, |
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| 397 | ext_vci_wrplen_width> vci_param_ext; |
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| 398 | |
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[344] | 399 | #if USE_OPENMP |
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| 400 | omp_set_dynamic(false); |
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| 401 | omp_set_num_threads(threads_nr); |
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| 402 | std::cerr << "Built with openmp version " << _OPENMP << std::endl; |
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| 403 | #endif |
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| 404 | |
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| 405 | // Define parameters depending on mesh size |
---|
| 406 | size_t x_width; |
---|
| 407 | size_t y_width; |
---|
| 408 | |
---|
| 409 | if (CLUSTER_X == 1) x_width = 0; |
---|
| 410 | else if (CLUSTER_X == 2) x_width = 1; |
---|
| 411 | else if (CLUSTER_X <= 4) x_width = 2; |
---|
| 412 | else if (CLUSTER_X <= 8) x_width = 3; |
---|
[389] | 413 | else x_width = 4; |
---|
[344] | 414 | |
---|
| 415 | if (CLUSTER_Y == 1) y_width = 0; |
---|
| 416 | else if (CLUSTER_Y == 2) y_width = 1; |
---|
| 417 | else if (CLUSTER_Y <= 4) y_width = 2; |
---|
| 418 | else if (CLUSTER_Y <= 8) y_width = 3; |
---|
[389] | 419 | else y_width = 4; |
---|
[344] | 420 | |
---|
| 421 | ///////////////////// |
---|
| 422 | // Mapping Tables |
---|
| 423 | ///////////////////// |
---|
| 424 | |
---|
[396] | 425 | // internal network |
---|
| 426 | MappingTable maptabd(int_vci_address_width, |
---|
| 427 | IntTab(x_width + y_width, 16 - x_width - y_width), |
---|
| 428 | IntTab(x_width + y_width, int_vci_srcid_width - x_width - y_width), |
---|
| 429 | 0x00FF000000); |
---|
[344] | 430 | |
---|
| 431 | for (size_t x = 0; x < CLUSTER_X; x++) |
---|
| 432 | { |
---|
| 433 | for (size_t y = 0; y < CLUSTER_Y; y++) |
---|
| 434 | { |
---|
[396] | 435 | sc_uint<int_vci_address_width> offset; |
---|
| 436 | offset = (sc_uint<int_vci_address_width>)cluster(x,y) |
---|
| 437 | << (int_vci_address_width-x_width-y_width); |
---|
[344] | 438 | |
---|
| 439 | std::ostringstream sh; |
---|
[396] | 440 | sh << "seg_memc_" << x << "_" << y; |
---|
| 441 | maptabd.add(Segment(sh.str(), MEMC_BASE+offset, MEMC_SIZE, |
---|
| 442 | IntTab(cluster(x,y),MEMC_TGTID), true)); |
---|
[344] | 443 | |
---|
| 444 | std::ostringstream si; |
---|
[396] | 445 | si << "seg_xicu_" << x << "_" << y; |
---|
| 446 | maptabd.add(Segment(si.str(), XICU_BASE+offset, XICU_SIZE, |
---|
| 447 | IntTab(cluster(x,y),XICU_TGTID), false)); |
---|
[344] | 448 | |
---|
| 449 | std::ostringstream sd; |
---|
[396] | 450 | sd << "seg_mdma_" << x << "_" << y; |
---|
| 451 | maptabd.add(Segment(sd.str(), MDMA_BASE+offset, MDMA_SIZE, |
---|
| 452 | IntTab(cluster(x,y),MDMA_TGTID), false)); |
---|
[344] | 453 | |
---|
| 454 | if ( cluster(x,y) == cluster_io_id ) |
---|
| 455 | { |
---|
[396] | 456 | maptabd.add(Segment("seg_mtty", MTTY_BASE, MTTY_SIZE, |
---|
| 457 | IntTab(cluster(x,y),MTTY_TGTID), false)); |
---|
| 458 | maptabd.add(Segment("seg_fbuf", FBUF_BASE, FBUF_SIZE, |
---|
| 459 | IntTab(cluster(x,y),FBUF_TGTID), false)); |
---|
| 460 | maptabd.add(Segment("seg_bdev", BDEV_BASE, BDEV_SIZE, |
---|
| 461 | IntTab(cluster(x,y),BDEV_TGTID), false)); |
---|
| 462 | maptabd.add(Segment("seg_mnic", MNIC_BASE, MNIC_SIZE, |
---|
| 463 | IntTab(cluster(x,y),MNIC_TGTID), false)); |
---|
| 464 | maptabd.add(Segment("seg_brom", BROM_BASE, BROM_SIZE, |
---|
| 465 | IntTab(cluster(x,y),BROM_TGTID), true)); |
---|
[344] | 466 | } |
---|
| 467 | } |
---|
| 468 | } |
---|
| 469 | std::cout << maptabd << std::endl; |
---|
| 470 | |
---|
| 471 | // external network |
---|
[396] | 472 | MappingTable maptabx(ext_vci_address_width, |
---|
| 473 | IntTab(x_width+y_width), |
---|
| 474 | IntTab(x_width+y_width), |
---|
| 475 | 0xFFFF000000ULL); |
---|
[344] | 476 | |
---|
| 477 | for (size_t x = 0; x < CLUSTER_X; x++) |
---|
| 478 | { |
---|
| 479 | for (size_t y = 0; y < CLUSTER_Y ; y++) |
---|
| 480 | { |
---|
[396] | 481 | |
---|
| 482 | sc_uint<ext_vci_address_width> offset; |
---|
| 483 | offset = (sc_uint<ext_vci_address_width>)cluster(x,y) |
---|
| 484 | << (ext_vci_address_width-x_width-y_width); |
---|
| 485 | |
---|
[344] | 486 | std::ostringstream sh; |
---|
| 487 | sh << "x_seg_memc_" << x << "_" << y; |
---|
[396] | 488 | |
---|
[344] | 489 | maptabx.add(Segment(sh.str(), MEMC_BASE+offset, |
---|
| 490 | MEMC_SIZE, IntTab(cluster(x,y)), false)); |
---|
| 491 | } |
---|
| 492 | } |
---|
| 493 | std::cout << maptabx << std::endl; |
---|
| 494 | |
---|
| 495 | //////////////////// |
---|
| 496 | // Signals |
---|
| 497 | /////////////////// |
---|
| 498 | |
---|
[389] | 499 | sc_clock signal_clk("clk"); |
---|
[344] | 500 | sc_signal<bool> signal_resetn("resetn"); |
---|
| 501 | |
---|
| 502 | // Horizontal inter-clusters DSPIN signals |
---|
[396] | 503 | DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_inc = |
---|
| 504 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", CLUSTER_X-1, CLUSTER_Y, 2); |
---|
| 505 | DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_dec = |
---|
| 506 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", CLUSTER_X-1, CLUSTER_Y, 2); |
---|
| 507 | DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_inc = |
---|
| 508 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", CLUSTER_X-1, CLUSTER_Y, 2); |
---|
| 509 | DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_dec = |
---|
| 510 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", CLUSTER_X-1, CLUSTER_Y, 2); |
---|
[344] | 511 | |
---|
| 512 | // Vertical inter-clusters DSPIN signals |
---|
[396] | 513 | DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_inc = |
---|
| 514 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", CLUSTER_X, CLUSTER_Y-1, 2); |
---|
| 515 | DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_dec = |
---|
| 516 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", CLUSTER_X, CLUSTER_Y-1, 2); |
---|
| 517 | DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_inc = |
---|
| 518 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", CLUSTER_X, CLUSTER_Y-1, 2); |
---|
| 519 | DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_dec = |
---|
| 520 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", CLUSTER_X, CLUSTER_Y-1, 2); |
---|
[344] | 521 | |
---|
| 522 | // Mesh boundaries DSPIN signals |
---|
[396] | 523 | DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_in = |
---|
| 524 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_in", CLUSTER_X, CLUSTER_Y, 2, 4); |
---|
| 525 | DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_out = |
---|
| 526 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_out", CLUSTER_X, CLUSTER_Y, 2, 4); |
---|
| 527 | DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_in = |
---|
| 528 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_in", CLUSTER_X, CLUSTER_Y, 2, 4); |
---|
| 529 | DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_out = |
---|
| 530 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_out", CLUSTER_X, CLUSTER_Y, 2, 4); |
---|
[344] | 531 | |
---|
| 532 | |
---|
| 533 | //////////////////////////// |
---|
| 534 | // Loader |
---|
| 535 | //////////////////////////// |
---|
| 536 | |
---|
| 537 | #if USE_ALMOS |
---|
| 538 | soclib::common::Loader loader(almos_bootloader_pathname, |
---|
| 539 | almos_archinfo_pathname, |
---|
| 540 | almos_kernel_pathname); |
---|
| 541 | #else |
---|
| 542 | soclib::common::Loader loader(soft_name); |
---|
| 543 | #endif |
---|
| 544 | |
---|
| 545 | typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss; |
---|
| 546 | proc_iss::set_loader(loader); |
---|
| 547 | |
---|
| 548 | //////////////////////////// |
---|
| 549 | // Clusters construction |
---|
| 550 | //////////////////////////// |
---|
| 551 | |
---|
[396] | 552 | TsarXbarCluster<dspin_cmd_width, |
---|
| 553 | dspin_rsp_width, |
---|
| 554 | vci_param_int, |
---|
| 555 | vci_param_ext>* clusters[CLUSTER_X][CLUSTER_Y]; |
---|
[344] | 556 | |
---|
| 557 | #if USE_OPENMP |
---|
| 558 | #pragma omp parallel |
---|
| 559 | { |
---|
| 560 | #pragma omp for |
---|
| 561 | #endif |
---|
| 562 | for(size_t i = 0; i < (CLUSTER_X * CLUSTER_Y); i++) |
---|
| 563 | { |
---|
| 564 | size_t x = i / CLUSTER_Y; |
---|
| 565 | size_t y = i % CLUSTER_Y; |
---|
| 566 | |
---|
| 567 | #if USE_OPENMP |
---|
| 568 | #pragma omp critical |
---|
| 569 | { |
---|
| 570 | #endif |
---|
[389] | 571 | |
---|
[344] | 572 | std::ostringstream sc; |
---|
| 573 | sc << "cluster_" << x << "_" << y; |
---|
[396] | 574 | clusters[x][y] = new TsarXbarCluster<dspin_cmd_width, |
---|
| 575 | dspin_rsp_width, |
---|
| 576 | vci_param_int, |
---|
| 577 | vci_param_ext> |
---|
[344] | 578 | ( |
---|
| 579 | sc.str().c_str(), |
---|
[396] | 580 | NB_PROCS_MAX, |
---|
| 581 | NB_TTY_CHANNELS, |
---|
| 582 | NB_DMA_CHANNELS, |
---|
| 583 | x, |
---|
| 584 | y, |
---|
| 585 | cluster(x,y), |
---|
| 586 | maptabd, |
---|
| 587 | maptabx, |
---|
| 588 | x_width, |
---|
| 589 | y_width, |
---|
| 590 | int_vci_srcid_width - x_width - y_width, // l_id width, |
---|
| 591 | MEMC_TGTID, |
---|
| 592 | XICU_TGTID, |
---|
| 593 | MDMA_TGTID, |
---|
| 594 | FBUF_TGTID, |
---|
| 595 | MTTY_TGTID, |
---|
| 596 | BROM_TGTID, |
---|
| 597 | MNIC_TGTID, |
---|
| 598 | BDEV_TGTID, |
---|
| 599 | MEMC_WAYS, |
---|
| 600 | MEMC_SETS, |
---|
| 601 | L1_IWAYS, |
---|
| 602 | L1_ISETS, |
---|
| 603 | L1_DWAYS, |
---|
| 604 | L1_DSETS, |
---|
| 605 | XRAM_LATENCY, |
---|
| 606 | (cluster(x,y) == cluster_io_id), |
---|
| 607 | FBUF_X_SIZE, |
---|
| 608 | FBUF_Y_SIZE, |
---|
| 609 | disk_name, |
---|
| 610 | BDEV_SECTOR_SIZE, |
---|
| 611 | NB_NIC_CHANNELS, |
---|
| 612 | nic_rx_name, |
---|
| 613 | nic_tx_name, |
---|
| 614 | NIC_TIMEOUT, |
---|
| 615 | loader, |
---|
[344] | 616 | frozen_cycles, |
---|
[389] | 617 | debug_from , |
---|
[344] | 618 | debug_ok and (cluster(x,y) == debug_memc_id), |
---|
| 619 | debug_ok and (cluster(x,y) == debug_proc_id) |
---|
| 620 | ); |
---|
| 621 | |
---|
[379] | 622 | std::cout << std::endl; |
---|
[344] | 623 | std::cout << "cluster_" << x << "_" << y << " constructed" << std::endl; |
---|
[379] | 624 | std::cout << std::endl; |
---|
| 625 | |
---|
[344] | 626 | #if USE_OPENMP |
---|
| 627 | } // end critical |
---|
| 628 | #endif |
---|
| 629 | } // end for |
---|
| 630 | #if USE_OPENMP |
---|
| 631 | } |
---|
| 632 | #endif |
---|
| 633 | |
---|
| 634 | /////////////////////////////////////////////////////////////// |
---|
| 635 | // Net-list |
---|
| 636 | /////////////////////////////////////////////////////////////// |
---|
| 637 | |
---|
| 638 | // Clock & RESET |
---|
| 639 | for (size_t x = 0; x < (CLUSTER_X); x++){ |
---|
| 640 | for (size_t y = 0; y < CLUSTER_Y; y++){ |
---|
[389] | 641 | clusters[x][y]->p_clk (signal_clk); |
---|
| 642 | clusters[x][y]->p_resetn (signal_resetn); |
---|
[344] | 643 | } |
---|
| 644 | } |
---|
| 645 | |
---|
| 646 | // Inter Clusters horizontal connections |
---|
| 647 | if (CLUSTER_X > 1){ |
---|
| 648 | for (size_t x = 0; x < (CLUSTER_X-1); x++){ |
---|
| 649 | for (size_t y = 0; y < CLUSTER_Y; y++){ |
---|
| 650 | for (size_t k = 0; k < 2; k++){ |
---|
| 651 | clusters[x][y]->p_cmd_out[k][EAST] (signal_dspin_h_cmd_inc[x][y][k]); |
---|
| 652 | clusters[x+1][y]->p_cmd_in[k][WEST] (signal_dspin_h_cmd_inc[x][y][k]); |
---|
| 653 | clusters[x][y]->p_cmd_in[k][EAST] (signal_dspin_h_cmd_dec[x][y][k]); |
---|
| 654 | clusters[x+1][y]->p_cmd_out[k][WEST] (signal_dspin_h_cmd_dec[x][y][k]); |
---|
| 655 | clusters[x][y]->p_rsp_out[k][EAST] (signal_dspin_h_rsp_inc[x][y][k]); |
---|
| 656 | clusters[x+1][y]->p_rsp_in[k][WEST] (signal_dspin_h_rsp_inc[x][y][k]); |
---|
| 657 | clusters[x][y]->p_rsp_in[k][EAST] (signal_dspin_h_rsp_dec[x][y][k]); |
---|
| 658 | clusters[x+1][y]->p_rsp_out[k][WEST] (signal_dspin_h_rsp_dec[x][y][k]); |
---|
| 659 | } |
---|
| 660 | } |
---|
| 661 | } |
---|
| 662 | } |
---|
| 663 | std::cout << std::endl << "Horizontal connections established" << std::endl; |
---|
| 664 | |
---|
| 665 | // Inter Clusters vertical connections |
---|
| 666 | if (CLUSTER_Y > 1) { |
---|
| 667 | for (size_t y = 0; y < (CLUSTER_Y-1); y++){ |
---|
| 668 | for (size_t x = 0; x < CLUSTER_X; x++){ |
---|
| 669 | for (size_t k = 0; k < 2; k++){ |
---|
| 670 | clusters[x][y]->p_cmd_out[k][NORTH] (signal_dspin_v_cmd_inc[x][y][k]); |
---|
| 671 | clusters[x][y+1]->p_cmd_in[k][SOUTH] (signal_dspin_v_cmd_inc[x][y][k]); |
---|
| 672 | clusters[x][y]->p_cmd_in[k][NORTH] (signal_dspin_v_cmd_dec[x][y][k]); |
---|
| 673 | clusters[x][y+1]->p_cmd_out[k][SOUTH] (signal_dspin_v_cmd_dec[x][y][k]); |
---|
| 674 | clusters[x][y]->p_rsp_out[k][NORTH] (signal_dspin_v_rsp_inc[x][y][k]); |
---|
| 675 | clusters[x][y+1]->p_rsp_in[k][SOUTH] (signal_dspin_v_rsp_inc[x][y][k]); |
---|
| 676 | clusters[x][y]->p_rsp_in[k][NORTH] (signal_dspin_v_rsp_dec[x][y][k]); |
---|
| 677 | clusters[x][y+1]->p_rsp_out[k][SOUTH] (signal_dspin_v_rsp_dec[x][y][k]); |
---|
| 678 | } |
---|
| 679 | } |
---|
| 680 | } |
---|
| 681 | } |
---|
| 682 | std::cout << "Vertical connections established" << std::endl; |
---|
| 683 | |
---|
| 684 | // East & West boundary cluster connections |
---|
| 685 | for (size_t y = 0; y < CLUSTER_Y; y++) |
---|
| 686 | { |
---|
| 687 | for (size_t k = 0; k < 2; k++) |
---|
| 688 | { |
---|
[389] | 689 | clusters[0][y]->p_cmd_in[k][WEST] (signal_dspin_false_cmd_in[0][y][k][WEST]); |
---|
| 690 | clusters[0][y]->p_cmd_out[k][WEST] (signal_dspin_false_cmd_out[0][y][k][WEST]); |
---|
| 691 | clusters[0][y]->p_rsp_in[k][WEST] (signal_dspin_false_rsp_in[0][y][k][WEST]); |
---|
| 692 | clusters[0][y]->p_rsp_out[k][WEST] (signal_dspin_false_rsp_out[0][y][k][WEST]); |
---|
[344] | 693 | |
---|
[389] | 694 | clusters[CLUSTER_X-1][y]->p_cmd_in[k][EAST] (signal_dspin_false_cmd_in[CLUSTER_X-1][y][k][EAST]); |
---|
| 695 | clusters[CLUSTER_X-1][y]->p_cmd_out[k][EAST] (signal_dspin_false_cmd_out[CLUSTER_X-1][y][k][EAST]); |
---|
| 696 | clusters[CLUSTER_X-1][y]->p_rsp_in[k][EAST] (signal_dspin_false_rsp_in[CLUSTER_X-1][y][k][EAST]); |
---|
| 697 | clusters[CLUSTER_X-1][y]->p_rsp_out[k][EAST] (signal_dspin_false_rsp_out[CLUSTER_X-1][y][k][EAST]); |
---|
[344] | 698 | } |
---|
| 699 | } |
---|
| 700 | |
---|
| 701 | // North & South boundary clusters connections |
---|
| 702 | for (size_t x = 0; x < CLUSTER_X; x++) |
---|
| 703 | { |
---|
| 704 | for (size_t k = 0; k < 2; k++) |
---|
| 705 | { |
---|
[389] | 706 | clusters[x][0]->p_cmd_in[k][SOUTH] (signal_dspin_false_cmd_in[x][0][k][SOUTH]); |
---|
| 707 | clusters[x][0]->p_cmd_out[k][SOUTH] (signal_dspin_false_cmd_out[x][0][k][SOUTH]); |
---|
| 708 | clusters[x][0]->p_rsp_in[k][SOUTH] (signal_dspin_false_rsp_in[x][0][k][SOUTH]); |
---|
| 709 | clusters[x][0]->p_rsp_out[k][SOUTH] (signal_dspin_false_rsp_out[x][0][k][SOUTH]); |
---|
[344] | 710 | |
---|
[389] | 711 | clusters[x][CLUSTER_Y-1]->p_cmd_in[k][NORTH] (signal_dspin_false_cmd_in[x][CLUSTER_Y-1][k][NORTH]); |
---|
| 712 | clusters[x][CLUSTER_Y-1]->p_cmd_out[k][NORTH] (signal_dspin_false_cmd_out[x][CLUSTER_Y-1][k][NORTH]); |
---|
| 713 | clusters[x][CLUSTER_Y-1]->p_rsp_in[k][NORTH] (signal_dspin_false_rsp_in[x][CLUSTER_Y-1][k][NORTH]); |
---|
| 714 | clusters[x][CLUSTER_Y-1]->p_rsp_out[k][NORTH] (signal_dspin_false_rsp_out[x][CLUSTER_Y-1][k][NORTH]); |
---|
[344] | 715 | } |
---|
| 716 | } |
---|
[396] | 717 | std::cout << "North, South, West, East connections established" << std::endl; |
---|
| 718 | std::cout << std::endl; |
---|
[344] | 719 | |
---|
| 720 | |
---|
| 721 | //////////////////////////////////////////////////////// |
---|
| 722 | // Simulation |
---|
| 723 | /////////////////////////////////////////////////////// |
---|
| 724 | |
---|
| 725 | sc_start(sc_core::sc_time(0, SC_NS)); |
---|
| 726 | signal_resetn = false; |
---|
| 727 | |
---|
| 728 | // network boundaries signals |
---|
| 729 | for (size_t x = 0; x < CLUSTER_X ; x++){ |
---|
| 730 | for (size_t y = 0; y < CLUSTER_Y ; y++){ |
---|
| 731 | for (size_t k = 0; k < 2; k++){ |
---|
| 732 | for (size_t a = 0; a < 4; a++){ |
---|
[389] | 733 | signal_dspin_false_cmd_in [x][y][k][a].write = false; |
---|
| 734 | signal_dspin_false_cmd_in [x][y][k][a].read = true; |
---|
[344] | 735 | signal_dspin_false_cmd_out[x][y][k][a].write = false; |
---|
[389] | 736 | signal_dspin_false_cmd_out[x][y][k][a].read = true; |
---|
[344] | 737 | |
---|
[389] | 738 | signal_dspin_false_rsp_in [x][y][k][a].write = false; |
---|
| 739 | signal_dspin_false_rsp_in [x][y][k][a].read = true; |
---|
[344] | 740 | signal_dspin_false_rsp_out[x][y][k][a].write = false; |
---|
[389] | 741 | signal_dspin_false_rsp_out[x][y][k][a].read = true; |
---|
[344] | 742 | } |
---|
| 743 | } |
---|
| 744 | } |
---|
| 745 | } |
---|
| 746 | |
---|
| 747 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
| 748 | signal_resetn = true; |
---|
| 749 | |
---|
| 750 | for (size_t n = 1; n < ncycles; n++) |
---|
| 751 | { |
---|
[396] | 752 | // Monitor a specific address for L1 & L2 caches |
---|
| 753 | //clusters[0][0]->proc[0]->cache_monitor(0x800002c000ULL); |
---|
| 754 | //clusters[1][0]->memc->copies_monitor(0x800002C000ULL); |
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| 755 | |
---|
[344] | 756 | if (debug_ok and (n > debug_from) and (n % debug_period == 0)) |
---|
| 757 | { |
---|
| 758 | std::cout << "****************** cycle " << std::dec << n ; |
---|
| 759 | std::cout << " ************************************************" << std::endl; |
---|
| 760 | |
---|
[379] | 761 | // trace proc[debug_proc_id] |
---|
| 762 | if ( debug_proc_id < (CLUSTER_X * CLUSTER_Y * NB_PROCS_MAX) ) |
---|
| 763 | { |
---|
[396] | 764 | size_t l = debug_proc_id % NB_PROCS_MAX ; |
---|
[379] | 765 | size_t y = (debug_proc_id / NB_PROCS_MAX) % CLUSTER_Y ; |
---|
| 766 | size_t x = debug_proc_id / (CLUSTER_Y * NB_PROCS_MAX) ; |
---|
| 767 | |
---|
[396] | 768 | std::ostringstream vci_signame; |
---|
| 769 | vci_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; |
---|
| 770 | std::ostringstream p2m_signame; |
---|
| 771 | p2m_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " P2M" ; |
---|
| 772 | std::ostringstream m2p_signame; |
---|
| 773 | m2p_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " M2P" ; |
---|
[379] | 774 | |
---|
| 775 | clusters[x][y]->proc[l]->print_trace(); |
---|
[396] | 776 | clusters[x][y]->signal_vci_ini_proc[l].print_trace(vci_signame.str()); |
---|
| 777 | clusters[x][y]->signal_dspin_p2m_proc[l].print_trace(p2m_signame.str()); |
---|
| 778 | clusters[x][y]->signal_dspin_m2p_proc[l].print_trace(m2p_signame.str()); |
---|
[379] | 779 | } |
---|
| 780 | // trace memc[debug_memc_id] |
---|
| 781 | if ( debug_memc_id < (CLUSTER_X * CLUSTER_Y) ) |
---|
| 782 | { |
---|
| 783 | size_t x = debug_memc_id / CLUSTER_Y; |
---|
| 784 | size_t y = debug_memc_id % CLUSTER_Y; |
---|
[344] | 785 | |
---|
[396] | 786 | std::ostringstream smemc; |
---|
| 787 | smemc << "[SIG]MEMC_" << x << "_" << y; |
---|
| 788 | std::ostringstream sxram; |
---|
| 789 | sxram << "[SIG]XRAM_" << x << "_" << y; |
---|
| 790 | std::ostringstream sm2p; |
---|
| 791 | sm2p << "[SIG]MEMC_" << x << "_" << y << " M2P" ; |
---|
| 792 | std::ostringstream sp2m; |
---|
| 793 | sp2m << "[SIG]MEMC_" << x << "_" << y << " P2M" ; |
---|
[344] | 794 | |
---|
[396] | 795 | clusters[x][y]->memc->print_trace(); |
---|
| 796 | clusters[x][y]->xram->print_trace(); |
---|
| 797 | clusters[x][y]->signal_vci_tgt_memc.print_trace(smemc.str()); |
---|
| 798 | clusters[x][y]->signal_vci_xram.print_trace(sxram.str()); |
---|
| 799 | clusters[x][y]->signal_dspin_p2m_memc.print_trace(sp2m.str()); |
---|
| 800 | clusters[x][y]->signal_dspin_m2p_memc.print_trace(sm2p.str()); |
---|
[379] | 801 | } |
---|
[396] | 802 | |
---|
| 803 | // trace replicated peripherals |
---|
| 804 | clusters[1][1]->mdma->print_trace(); |
---|
| 805 | clusters[1][1]->signal_vci_tgt_mdma.print_trace("[SIG]MDMA_TGT_1_1"); |
---|
| 806 | clusters[1][1]->signal_vci_ini_mdma.print_trace("[SIG]MDMA_INI_1_1"); |
---|
| 807 | |
---|
| 808 | |
---|
[379] | 809 | // trace external peripherals |
---|
| 810 | size_t io_x = cluster_io_id / CLUSTER_Y; |
---|
| 811 | size_t io_y = cluster_io_id % CLUSTER_Y; |
---|
| 812 | |
---|
[396] | 813 | // clusters[io_x][io_y]->brom->print_trace(); |
---|
| 814 | // clusters[io_x][io_y]->signal_vci_tgt_brom.print_trace("/SIG/BROM"); |
---|
| 815 | // clusters[io_x][io_y]->signal_vci_tgt_mtty.print_trace("VCI signal TTY"); |
---|
| 816 | |
---|
[379] | 817 | clusters[io_x][io_y]->bdev->print_trace(); |
---|
[396] | 818 | clusters[io_x][io_y]->signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT"); |
---|
| 819 | clusters[io_x][io_y]->signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI"); |
---|
[344] | 820 | } |
---|
| 821 | |
---|
| 822 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
| 823 | } |
---|
| 824 | return EXIT_SUCCESS; |
---|
| 825 | } |
---|
| 826 | |
---|
| 827 | int sc_main (int argc, char *argv[]) |
---|
| 828 | { |
---|
| 829 | try { |
---|
| 830 | return _main(argc, argv); |
---|
| 831 | } catch (std::exception &e) { |
---|
| 832 | std::cout << e.what() << std::endl; |
---|
| 833 | } catch (...) { |
---|
| 834 | std::cout << "Unknown exception occured" << std::endl; |
---|
| 835 | throw; |
---|
| 836 | } |
---|
| 837 | return 1; |
---|
| 838 | } |
---|
| 839 | |
---|
| 840 | |
---|
| 841 | // Local Variables: |
---|
| 842 | // tab-width: 3 |
---|
| 843 | // c-basic-offset: 3 |
---|
| 844 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
| 845 | // indent-tabs-mode: nil |
---|
| 846 | // End: |
---|
| 847 | |
---|
| 848 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
---|