1 | ///////////////////////////////////////////////////////////////////////// |
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2 | // File: top.cpp |
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3 | // Author: Alain Greiner |
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4 | // Copyright: UPMC/LIP6 |
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5 | // Date : may 2013 |
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6 | // This program is released under the GNU public license |
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7 | ///////////////////////////////////////////////////////////////////////// |
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8 | // This file define a generic TSAR architecture. |
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9 | // The physical address space is 40 bits. |
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10 | // |
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11 | // The number of clusters cannot be larger than 256. |
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12 | // The number of processors per cluster cannot be larger than 8. |
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13 | // |
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14 | // - It uses four dspin_local_crossbar per cluster as local interconnect |
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15 | // - It uses two virtual_dspin routers per cluster as global interconnect |
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16 | // - It uses the vci_cc_vcache_wrapper |
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17 | // - It uses the vci_mem_cache |
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18 | // - It contains one vci_xicu per cluster. |
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19 | // - It contains one vci_multi_dma per cluster. |
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20 | // - It contains one vci_simple_ram per cluster to model the L3 cache. |
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21 | // |
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22 | // The communication between the MemCache and the Xram is 64 bits. |
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23 | // |
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24 | // All clusters are identical, but the cluster 0 (called io_cluster), |
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25 | // contains 5 extra components: |
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26 | // - the boot rom (BROM) |
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27 | // - the disk controller (BDEV) |
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28 | // - the multi-channel network controller (MNIC) |
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29 | // - the multi-channel tty controller (MTTY) |
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30 | // - the frame buffer controller (FBUF) |
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31 | // |
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32 | // It is build with one single component implementing a cluster, |
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33 | // defined in files tsar_xbar_cluster.* (with * = cpp, h, sd) |
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34 | // |
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35 | // The IRQs are connected to XICUs as follow: |
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36 | // - The IRQ_IN[0] to IRQ_IN[7] ports are not used in all clusters. |
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37 | // - The DMA IRQs are connected to IRQ_IN[8] to IRQ_IN[15] in all clusters. |
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38 | // - The TTY IRQs are connected to IRQ_IN[16] to IRQ_IN[30] in I/O cluster. |
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39 | // - The BDEV IRQ is connected to IRQ_IN[31] in I/O cluster. |
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40 | // |
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41 | // Some hardware parameters are used when compiling the OS, and are used |
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42 | // by this top.cpp file. They must be defined in the hard_config.h file : |
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43 | // - CLUSTER_X : number of clusters in a row (power of 2) |
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44 | // - CLUSTER_Y : number of clusters in a column (power of 2) |
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45 | // - CLUSTER_SIZE : size of the segment allocated to a cluster |
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46 | // - NB_PROCS_MAX : number of processors per cluster (power of 2) |
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47 | // - NB_DMA_CHANNELS : number of DMA channels per cluster (< 9) |
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48 | // - NB_TTY_CHANNELS : number of TTY channels in I/O cluster (< 16) |
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49 | // - NB_NIC_CHANNELS : number of NIC channels in I/O cluster (< 9) |
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50 | // |
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51 | // Some other hardware parameters are not used when compiling the OS, |
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52 | // and can be directly defined in this top.cpp file: |
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53 | // - XRAM_LATENCY : external ram latency |
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54 | // - MEMC_WAYS : L2 cache number of ways |
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55 | // - MEMC_SETS : L2 cache number of sets |
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56 | // - L1_IWAYS |
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57 | // - L1_ISETS |
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58 | // - L1_DWAYS |
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59 | // - L1_DSETS |
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60 | // - FBUF_X_SIZE : width of frame buffer (pixels) |
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61 | // - FBUF_Y_SIZE : heigth of frame buffer (lines) |
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62 | // - BDEV_SECTOR_SIZE : block size for block drvice |
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63 | // - BDEV_IMAGE_NAME : file pathname for block device |
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64 | // - NIC_RX_NAME : file pathname for NIC received packets |
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65 | // - NIC_TX_NAME : file pathname for NIC transmited packets |
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66 | // - NIC_TIMEOUT : max number of cycles before closing a container |
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67 | ///////////////////////////////////////////////////////////////////////// |
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68 | // General policy for 40 bits physical address decoding: |
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69 | // All physical segments base addresses are multiple of 1 Mbytes |
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70 | // (=> the 24 LSB bits = 0, and the 16 MSB bits define the target) |
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71 | // The (x_width + y_width) MSB bits (left aligned) define |
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72 | // the cluster index, and the LADR bits define the local index: |
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73 | // | X_ID | Y_ID |---| LADR | OFFSET | |
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74 | // |x_width|y_width|---| 8 | 24 | |
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75 | ///////////////////////////////////////////////////////////////////////// |
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76 | // General policy for 14 bits SRCID decoding: |
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77 | // Each component is identified by (x_id, y_id, l_id) tuple. |
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78 | // | X_ID | Y_ID |---| L_ID | |
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79 | // |x_width|y_width|---| 6 | |
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80 | ///////////////////////////////////////////////////////////////////////// |
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81 | |
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82 | #include <systemc> |
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83 | #include <sys/time.h> |
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84 | #include <iostream> |
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85 | #include <sstream> |
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86 | #include <cstdlib> |
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87 | #include <cstdarg> |
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88 | #include <stdint.h> |
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89 | |
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90 | #include "gdbserver.h" |
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91 | #include "mapping_table.h" |
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92 | #include "tsar_xbar_cluster.h" |
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93 | #include "alloc_elems.h" |
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94 | |
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95 | /////////////////////////////////////////////////// |
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96 | // OS |
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97 | /////////////////////////////////////////////////// |
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98 | #define USE_ALMOS 0 |
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99 | |
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100 | #define almos_bootloader_pathname "bootloader.bin" |
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101 | #define almos_kernel_pathname "kernel-soclib.bin@0xbfc10000:D" |
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102 | #define almos_archinfo_pathname "arch-info.bin@0xBFC08000:D" |
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103 | |
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104 | /////////////////////////////////////////////////// |
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105 | // Parallelisation |
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106 | /////////////////////////////////////////////////// |
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107 | #define USE_OPENMP 0 |
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108 | |
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109 | #if USE_OPENMP |
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110 | #include <omp.h> |
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111 | #endif |
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112 | |
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113 | // cluster index (computed from x,y coordinates) |
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114 | #define cluster(x,y) (y + CLUSTER_Y*x) |
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115 | |
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116 | /////////////////////////////////////////////////////////// |
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117 | // DSPIN parameters |
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118 | /////////////////////////////////////////////////////////// |
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119 | |
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120 | #define dspin_cmd_width 39 |
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121 | #define dspin_rsp_width 32 |
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122 | |
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123 | /////////////////////////////////////////////////////////// |
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124 | // VCI parameters |
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125 | /////////////////////////////////////////////////////////// |
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126 | |
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127 | #define int_vci_cell_width 4 |
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128 | #define int_vci_plen_width 8 |
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129 | #define int_vci_address_width 40 |
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130 | #define int_vci_rerror_width 1 |
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131 | #define int_vci_clen_width 1 |
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132 | #define int_vci_rflag_width 1 |
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133 | #define int_vci_srcid_width 14 |
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134 | #define int_vci_pktid_width 4 |
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135 | #define int_vci_trdid_width 4 |
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136 | #define int_vci_wrplen_width 1 |
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137 | |
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138 | #define ext_vci_cell_width 8 |
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139 | #define ext_vci_plen_width 8 |
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140 | #define ext_vci_address_width 40 |
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141 | #define ext_vci_rerror_width 1 |
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142 | #define ext_vci_clen_width 1 |
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143 | #define ext_vci_rflag_width 1 |
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144 | #define ext_vci_srcid_width 14 |
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145 | #define ext_vci_pktid_width 4 |
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146 | #define ext_vci_trdid_width 4 |
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147 | #define ext_vci_wrplen_width 1 |
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148 | |
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149 | //////////////////////////////////////////////////////////// |
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150 | // Main Hardware Parameters values |
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151 | //////////////////////i///////////////////////////////////// |
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152 | |
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153 | #include "giet_vm/hard_config.h" |
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154 | |
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155 | //////////////////////////////////////////////////////////// |
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156 | // Secondary Hardware Parameters |
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157 | //////////////////////i///////////////////////////////////// |
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158 | |
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159 | #define XRAM_LATENCY 0 |
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160 | |
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161 | #define MEMC_WAYS 16 |
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162 | #define MEMC_SETS 256 |
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163 | |
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164 | #define L1_IWAYS 4 |
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165 | #define L1_ISETS 64 |
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166 | |
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167 | #define L1_DWAYS 4 |
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168 | #define L1_DSETS 64 |
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169 | |
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170 | #define FBUF_X_SIZE 128 |
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171 | #define FBUF_Y_SIZE 128 |
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172 | |
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173 | #define BDEV_SECTOR_SIZE 512 |
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174 | #define BDEV_IMAGE_NAME "giet_vm/display/images.raw" |
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175 | |
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176 | #define NIC_RX_NAME "giet_vm/nic/rx_packets.txt" |
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177 | #define NIC_TX_NAME "giet_vm/nic/tx_packets.txt" |
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178 | #define NIC_TIMEOUT 10000 |
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179 | |
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180 | //////////////////////////////////////////////////////////// |
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181 | // Software to be loaded in ROM & RAM |
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182 | //////////////////////i///////////////////////////////////// |
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183 | |
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184 | #define SOFT_NAME "giet_vm/soft.elf" |
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185 | |
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186 | //////////////////////////////////////////////////////////// |
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187 | // DEBUG Parameters default values |
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188 | //////////////////////i///////////////////////////////////// |
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189 | |
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190 | #define MAX_FROZEN_CYCLES 10000 |
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191 | |
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192 | #define TRACE_MEMC_ID 1000000 |
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193 | #define TRACE_PROC_ID 1000000 |
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194 | |
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195 | ///////////////////////////////////////////////////////// |
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196 | // Physical segments definition |
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197 | ///////////////////////////////////////////////////////// |
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198 | // There is 3 segments replicated in all clusters |
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199 | // and 5 specific segments in the "IO" cluster |
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200 | // (containing address 0xBF000000) |
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201 | ///////////////////////////////////////////////////////// |
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202 | |
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203 | // specific segments in "IO" cluster : absolute physical address |
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204 | |
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205 | #define BROM_BASE 0x00BFC00000 |
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206 | #define BROM_SIZE 0x0000100000 // 1 Mbytes |
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207 | |
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208 | #define FBUF_BASE 0x00B2000000 |
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209 | #define FBUF_SIZE FBUF_X_SIZE * FBUF_Y_SIZE |
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210 | |
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211 | #define BDEV_BASE 0x00B3000000 |
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212 | #define BDEV_SIZE 0x0000001000 // 4 Kbytes |
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213 | |
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214 | #define MTTY_BASE 0x00B4000000 |
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215 | #define MTTY_SIZE 0x0000001000 // 4 Kbytes |
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216 | |
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217 | #define MNIC_BASE 0x00B5000000 |
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218 | #define MNIC_SIZE 0x0000080000 // 512 Kbytes (for 8 channels) |
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219 | |
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220 | // replicated segments : address is incremented by a cluster offset |
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221 | // offset = cluster(x,y) << (address_width-x_width-y_width); |
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222 | |
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223 | #define MEMC_BASE 0x0000000000 |
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224 | #define MEMC_SIZE 0x0010000000 // 256 Mbytes per cluster |
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225 | |
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226 | #define XICU_BASE 0x00B0000000 |
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227 | #define XICU_SIZE 0x0000001000 // 4 Kbytes |
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228 | |
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229 | #define MDMA_BASE 0x00B1000000 |
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230 | #define MDMA_SIZE 0x0000001000 * NB_DMA_CHANNELS // 4 Kbytes per channel |
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231 | |
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232 | //////////////////////////////////////////////////////////////////// |
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233 | // TGTID definition in direct space |
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234 | // For all components: global TGTID = global SRCID = cluster_index |
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235 | //////////////////////////////////////////////////////////////////// |
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236 | |
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237 | #define MEMC_TGTID 0 |
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238 | #define XICU_TGTID 1 |
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239 | #define MDMA_TGTID 2 |
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240 | #define MTTY_TGTID 3 |
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241 | #define FBUF_TGTID 4 |
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242 | #define BDEV_TGTID 5 |
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243 | #define BROM_TGTID 6 |
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244 | #define MNIC_TGTID 7 |
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245 | |
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246 | ///////////////////////////////// |
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247 | int _main(int argc, char *argv[]) |
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248 | { |
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249 | using namespace sc_core; |
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250 | using namespace soclib::caba; |
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251 | using namespace soclib::common; |
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252 | |
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253 | char soft_name[256] = SOFT_NAME; // pathname to binary code |
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254 | size_t ncycles = 1000000000; // simulated cycles |
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255 | char disk_name[256] = BDEV_IMAGE_NAME; // pathname to the disk image |
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256 | char nic_rx_name[256] = NIC_RX_NAME; // pathname to the rx packets file |
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257 | char nic_tx_name[256] = NIC_TX_NAME; // pathname to the tx packets file |
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258 | ssize_t threads_nr = 1; // simulator's threads number |
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259 | bool debug_ok = false; // trace activated |
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260 | size_t debug_period = 1; // trace period |
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261 | size_t debug_memc_id = TRACE_MEMC_ID; // index of memc to be traced |
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262 | size_t debug_proc_id = TRACE_PROC_ID; // index of proc to be traced |
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263 | uint32_t debug_from = 0; // trace start cycle |
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264 | uint32_t frozen_cycles = MAX_FROZEN_CYCLES; // monitoring frozen processor |
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265 | size_t cluster_io_id = 0; // index of cluster containing IOs |
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266 | |
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267 | ////////////// command line arguments ////////////////////// |
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268 | if (argc > 1) |
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269 | { |
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270 | for (int n = 1; n < argc; n = n + 2) |
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271 | { |
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272 | if ((strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc)) |
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273 | { |
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274 | ncycles = atoi(argv[n+1]); |
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275 | } |
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276 | else if ((strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) ) |
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277 | { |
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278 | strcpy(soft_name, argv[n+1]); |
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279 | } |
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280 | else if ((strcmp(argv[n],"-DISK") == 0) && (n+1<argc) ) |
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281 | { |
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282 | strcpy(disk_name, argv[n+1]); |
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283 | } |
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284 | else if ((strcmp(argv[n],"-DEBUG") == 0) && (n+1<argc) ) |
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285 | { |
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286 | debug_ok = true; |
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287 | debug_from = atoi(argv[n+1]); |
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288 | } |
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289 | else if ((strcmp(argv[n],"-MEMCID") == 0) && (n+1<argc) ) |
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290 | { |
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291 | debug_memc_id = atoi(argv[n+1]); |
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292 | assert( (debug_memc_id < (CLUSTER_X*CLUSTER_Y) ) && |
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293 | "debug_memc_id larger than XMAX * YMAX" ); |
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294 | } |
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295 | else if ((strcmp(argv[n],"-PROCID") == 0) && (n+1<argc) ) |
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296 | { |
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297 | debug_proc_id = atoi(argv[n+1]); |
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298 | assert( (debug_proc_id < (CLUSTER_X * CLUSTER_Y * NB_PROCS_MAX) ) && |
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299 | "debug_proc_id larger than XMAX * YMAX * NB_PROCS" ); |
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300 | } |
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301 | else if ((strcmp(argv[n], "-THREADS") == 0) && ((n+1) < argc)) |
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302 | { |
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303 | threads_nr = atoi(argv[n+1]); |
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304 | threads_nr = (threads_nr < 1) ? 1 : threads_nr; |
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305 | } |
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306 | else if ((strcmp(argv[n], "-FROZEN") == 0) && (n+1 < argc)) |
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307 | { |
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308 | frozen_cycles = atoi(argv[n+1]); |
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309 | } |
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310 | else if ((strcmp(argv[n], "-PERIOD") == 0) && (n+1 < argc)) |
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311 | { |
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312 | debug_period = atoi(argv[n+1]); |
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313 | } |
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314 | else |
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315 | { |
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316 | std::cout << " Arguments are (key,value) couples." << std::endl; |
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317 | std::cout << " The order is not important." << std::endl; |
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318 | std::cout << " Accepted arguments are :" << std::endl << std::endl; |
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319 | std::cout << " -SOFT pathname_for_embedded_soft" << std::endl; |
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320 | std::cout << " -DISK pathname_for_disk_image" << std::endl; |
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321 | std::cout << " -NCYCLES number_of_simulated_cycles" << std::endl; |
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322 | std::cout << " -DEBUG debug_start_cycle" << std::endl; |
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323 | std::cout << " -THREADS simulator's threads number" << std::endl; |
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324 | std::cout << " -FROZEN max_number_of_lines" << std::endl; |
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325 | std::cout << " -PERIOD number_of_cycles between trace" << std::endl; |
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326 | std::cout << " -MEMCID index_memc_to_be_traced" << std::endl; |
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327 | std::cout << " -PROCID index_proc_to_be_traced" << std::endl; |
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328 | exit(0); |
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329 | } |
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330 | } |
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331 | } |
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332 | |
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333 | // checking hardware parameters |
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334 | assert( ( (CLUSTER_X == 1) or (CLUSTER_X == 2) or (CLUSTER_X == 4) or |
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335 | (CLUSTER_X == 8) or (CLUSTER_X == 16) ) and |
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336 | "The CLUSTER_X parameter must be 1, 2, 4, 8 or 16" ); |
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337 | |
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338 | assert( ( (CLUSTER_Y == 1) or (CLUSTER_Y == 2) or (CLUSTER_Y == 4) or |
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339 | (CLUSTER_Y == 8) or (CLUSTER_Y == 16) ) and |
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340 | "The CLUSTER_Y parameter must be 1, 2, 4, 8 or 16" ); |
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341 | |
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342 | assert( ( (NB_PROCS_MAX == 1) or (NB_PROCS_MAX == 2) or |
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343 | (NB_PROCS_MAX == 4) or (NB_PROCS_MAX == 8) ) and |
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344 | "The NB_PROCS_MAX parameter must be 1, 2, 4 or 8" ); |
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345 | |
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346 | assert( (NB_DMA_CHANNELS < 9) and |
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347 | "The NB_DMA_CHANNELS parameter must be smaller than 9" ); |
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348 | |
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349 | assert( (NB_TTY_CHANNELS < 15) and |
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350 | "The NB_TTY_CHANNELS parameter must be smaller than 15" ); |
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351 | |
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352 | assert( (NB_NIC_CHANNELS < 9) and |
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353 | "The NB_NIC_CHANNELS parameter must be smaller than 9" ); |
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354 | |
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355 | assert( (int_vci_address_width == ext_vci_address_width) and |
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356 | "address widths must be equal on internal & external networks" ); |
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357 | |
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358 | assert( (int_vci_address_width == 40) and |
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359 | "VCI address width must be 40 bits" ); |
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360 | |
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361 | std::cout << std::endl; |
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362 | std::cout << " - CLUSTER_X = " << CLUSTER_X << std::endl; |
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363 | std::cout << " - CLUSTER_Y = " << CLUSTER_Y << std::endl; |
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364 | std::cout << " - NB_PROCS_MAX = " << NB_PROCS_MAX << std::endl; |
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365 | std::cout << " - NB_DMA_CHANNELS = " << NB_DMA_CHANNELS << std::endl; |
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366 | std::cout << " - NB_TTY_CHANNELS = " << NB_TTY_CHANNELS << std::endl; |
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367 | std::cout << " - NB_NIC_CHANNELS = " << NB_NIC_CHANNELS << std::endl; |
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368 | std::cout << " - MEMC_WAYS = " << MEMC_WAYS << std::endl; |
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369 | std::cout << " - MEMC_SETS = " << MEMC_SETS << std::endl; |
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370 | std::cout << " - RAM_LATENCY = " << XRAM_LATENCY << std::endl; |
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371 | std::cout << " - MAX_FROZEN = " << frozen_cycles << std::endl; |
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372 | |
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373 | std::cout << std::endl; |
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374 | |
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375 | // Internal and External VCI parameters definition |
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376 | typedef soclib::caba::VciParams<int_vci_cell_width, |
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377 | int_vci_plen_width, |
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378 | int_vci_address_width, |
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379 | int_vci_rerror_width, |
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380 | int_vci_clen_width, |
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381 | int_vci_rflag_width, |
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382 | int_vci_srcid_width, |
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383 | int_vci_pktid_width, |
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384 | int_vci_trdid_width, |
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385 | int_vci_wrplen_width> vci_param_int; |
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386 | |
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387 | typedef soclib::caba::VciParams<ext_vci_cell_width, |
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388 | ext_vci_plen_width, |
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389 | ext_vci_address_width, |
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390 | ext_vci_rerror_width, |
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391 | ext_vci_clen_width, |
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392 | ext_vci_rflag_width, |
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393 | ext_vci_srcid_width, |
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394 | ext_vci_pktid_width, |
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395 | ext_vci_trdid_width, |
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396 | ext_vci_wrplen_width> vci_param_ext; |
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397 | |
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398 | #if USE_OPENMP |
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399 | omp_set_dynamic(false); |
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400 | omp_set_num_threads(threads_nr); |
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401 | std::cerr << "Built with openmp version " << _OPENMP << std::endl; |
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402 | #endif |
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403 | |
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404 | // Define parameters depending on mesh size |
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405 | size_t x_width; |
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406 | size_t y_width; |
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407 | |
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408 | if (CLUSTER_X == 1) x_width = 0; |
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409 | else if (CLUSTER_X == 2) x_width = 1; |
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410 | else if (CLUSTER_X <= 4) x_width = 2; |
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411 | else if (CLUSTER_X <= 8) x_width = 3; |
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412 | else x_width = 4; |
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413 | |
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414 | if (CLUSTER_Y == 1) y_width = 0; |
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415 | else if (CLUSTER_Y == 2) y_width = 1; |
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416 | else if (CLUSTER_Y <= 4) y_width = 2; |
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417 | else if (CLUSTER_Y <= 8) y_width = 3; |
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418 | else y_width = 4; |
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419 | |
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420 | ///////////////////// |
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421 | // Mapping Tables |
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422 | ///////////////////// |
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423 | |
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424 | // internal network |
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425 | MappingTable maptabd(int_vci_address_width, |
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426 | IntTab(x_width + y_width, 16 - x_width - y_width), |
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427 | IntTab(x_width + y_width, int_vci_srcid_width - x_width - y_width), |
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428 | 0x00FF000000); |
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429 | |
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430 | for (size_t x = 0; x < CLUSTER_X; x++) |
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431 | { |
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432 | for (size_t y = 0; y < CLUSTER_Y; y++) |
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433 | { |
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434 | sc_uint<int_vci_address_width> offset; |
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435 | offset = (sc_uint<int_vci_address_width>)cluster(x,y) |
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436 | << (int_vci_address_width-x_width-y_width); |
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437 | |
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438 | std::ostringstream sh; |
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439 | sh << "seg_memc_" << x << "_" << y; |
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440 | maptabd.add(Segment(sh.str(), MEMC_BASE+offset, MEMC_SIZE, |
---|
441 | IntTab(cluster(x,y),MEMC_TGTID), true)); |
---|
442 | |
---|
443 | std::ostringstream si; |
---|
444 | si << "seg_xicu_" << x << "_" << y; |
---|
445 | maptabd.add(Segment(si.str(), XICU_BASE+offset, XICU_SIZE, |
---|
446 | IntTab(cluster(x,y),XICU_TGTID), false)); |
---|
447 | |
---|
448 | std::ostringstream sd; |
---|
449 | sd << "seg_mdma_" << x << "_" << y; |
---|
450 | maptabd.add(Segment(sd.str(), MDMA_BASE+offset, MDMA_SIZE, |
---|
451 | IntTab(cluster(x,y),MDMA_TGTID), false)); |
---|
452 | |
---|
453 | if ( cluster(x,y) == cluster_io_id ) |
---|
454 | { |
---|
455 | maptabd.add(Segment("seg_mtty", MTTY_BASE, MTTY_SIZE, |
---|
456 | IntTab(cluster(x,y),MTTY_TGTID), false)); |
---|
457 | maptabd.add(Segment("seg_fbuf", FBUF_BASE, FBUF_SIZE, |
---|
458 | IntTab(cluster(x,y),FBUF_TGTID), false)); |
---|
459 | maptabd.add(Segment("seg_bdev", BDEV_BASE, BDEV_SIZE, |
---|
460 | IntTab(cluster(x,y),BDEV_TGTID), false)); |
---|
461 | maptabd.add(Segment("seg_mnic", MNIC_BASE, MNIC_SIZE, |
---|
462 | IntTab(cluster(x,y),MNIC_TGTID), false)); |
---|
463 | maptabd.add(Segment("seg_brom", BROM_BASE, BROM_SIZE, |
---|
464 | IntTab(cluster(x,y),BROM_TGTID), true)); |
---|
465 | } |
---|
466 | } |
---|
467 | } |
---|
468 | std::cout << maptabd << std::endl; |
---|
469 | |
---|
470 | // external network |
---|
471 | MappingTable maptabx(ext_vci_address_width, |
---|
472 | IntTab(x_width+y_width), |
---|
473 | IntTab(x_width+y_width), |
---|
474 | 0xFFFF000000ULL); |
---|
475 | |
---|
476 | for (size_t x = 0; x < CLUSTER_X; x++) |
---|
477 | { |
---|
478 | for (size_t y = 0; y < CLUSTER_Y ; y++) |
---|
479 | { |
---|
480 | |
---|
481 | sc_uint<ext_vci_address_width> offset; |
---|
482 | offset = (sc_uint<ext_vci_address_width>)cluster(x,y) |
---|
483 | << (ext_vci_address_width-x_width-y_width); |
---|
484 | |
---|
485 | std::ostringstream sh; |
---|
486 | sh << "x_seg_memc_" << x << "_" << y; |
---|
487 | |
---|
488 | maptabx.add(Segment(sh.str(), MEMC_BASE+offset, |
---|
489 | MEMC_SIZE, IntTab(cluster(x,y)), false)); |
---|
490 | } |
---|
491 | } |
---|
492 | std::cout << maptabx << std::endl; |
---|
493 | |
---|
494 | //////////////////// |
---|
495 | // Signals |
---|
496 | /////////////////// |
---|
497 | |
---|
498 | sc_clock signal_clk("clk"); |
---|
499 | sc_signal<bool> signal_resetn("resetn"); |
---|
500 | |
---|
501 | enum { |
---|
502 | NORTH = VirtualDspinRouter<dspin_cmd_width>::NORTH, |
---|
503 | SOUTH = VirtualDspinRouter<dspin_cmd_width>::SOUTH, |
---|
504 | EAST = VirtualDspinRouter<dspin_cmd_width>::EAST, |
---|
505 | WEST = VirtualDspinRouter<dspin_cmd_width>::WEST, |
---|
506 | LOCAL = VirtualDspinRouter<dspin_cmd_width>::LOCAL |
---|
507 | }; |
---|
508 | |
---|
509 | // Horizontal inter-clusters DSPIN signals |
---|
510 | DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_inc = |
---|
511 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", CLUSTER_X-1, CLUSTER_Y, 2); |
---|
512 | DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_dec = |
---|
513 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", CLUSTER_X-1, CLUSTER_Y, 2); |
---|
514 | DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_inc = |
---|
515 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", CLUSTER_X-1, CLUSTER_Y, 2); |
---|
516 | DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_dec = |
---|
517 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", CLUSTER_X-1, CLUSTER_Y, 2); |
---|
518 | |
---|
519 | // Vertical inter-clusters DSPIN signals |
---|
520 | DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_inc = |
---|
521 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", CLUSTER_X, CLUSTER_Y-1, 2); |
---|
522 | DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_dec = |
---|
523 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", CLUSTER_X, CLUSTER_Y-1, 2); |
---|
524 | DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_inc = |
---|
525 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", CLUSTER_X, CLUSTER_Y-1, 2); |
---|
526 | DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_dec = |
---|
527 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", CLUSTER_X, CLUSTER_Y-1, 2); |
---|
528 | |
---|
529 | // Mesh boundaries DSPIN signals |
---|
530 | DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_in = |
---|
531 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_in", CLUSTER_X, CLUSTER_Y, 2, 4); |
---|
532 | DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_out = |
---|
533 | alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_out", CLUSTER_X, CLUSTER_Y, 2, 4); |
---|
534 | DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_in = |
---|
535 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_in", CLUSTER_X, CLUSTER_Y, 2, 4); |
---|
536 | DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_out = |
---|
537 | alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_out", CLUSTER_X, CLUSTER_Y, 2, 4); |
---|
538 | |
---|
539 | |
---|
540 | //////////////////////////// |
---|
541 | // Loader |
---|
542 | //////////////////////////// |
---|
543 | |
---|
544 | #if USE_ALMOS |
---|
545 | soclib::common::Loader loader(almos_bootloader_pathname, |
---|
546 | almos_archinfo_pathname, |
---|
547 | almos_kernel_pathname); |
---|
548 | #else |
---|
549 | soclib::common::Loader loader(soft_name); |
---|
550 | #endif |
---|
551 | |
---|
552 | typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss; |
---|
553 | proc_iss::set_loader(loader); |
---|
554 | |
---|
555 | //////////////////////////// |
---|
556 | // Clusters construction |
---|
557 | //////////////////////////// |
---|
558 | |
---|
559 | TsarXbarCluster<dspin_cmd_width, |
---|
560 | dspin_rsp_width, |
---|
561 | vci_param_int, |
---|
562 | vci_param_ext>* clusters[CLUSTER_X][CLUSTER_Y]; |
---|
563 | |
---|
564 | #if USE_OPENMP |
---|
565 | #pragma omp parallel |
---|
566 | { |
---|
567 | #pragma omp for |
---|
568 | #endif |
---|
569 | for(size_t i = 0; i < (CLUSTER_X * CLUSTER_Y); i++) |
---|
570 | { |
---|
571 | size_t x = i / CLUSTER_Y; |
---|
572 | size_t y = i % CLUSTER_Y; |
---|
573 | |
---|
574 | #if USE_OPENMP |
---|
575 | #pragma omp critical |
---|
576 | { |
---|
577 | #endif |
---|
578 | |
---|
579 | std::ostringstream sc; |
---|
580 | sc << "cluster_" << x << "_" << y; |
---|
581 | clusters[x][y] = new TsarXbarCluster<dspin_cmd_width, |
---|
582 | dspin_rsp_width, |
---|
583 | vci_param_int, |
---|
584 | vci_param_ext> |
---|
585 | ( |
---|
586 | sc.str().c_str(), |
---|
587 | NB_PROCS_MAX, |
---|
588 | NB_TTY_CHANNELS, |
---|
589 | NB_DMA_CHANNELS, |
---|
590 | x, |
---|
591 | y, |
---|
592 | cluster(x,y), |
---|
593 | maptabd, |
---|
594 | maptabx, |
---|
595 | x_width, |
---|
596 | y_width, |
---|
597 | int_vci_srcid_width - x_width - y_width, // l_id width, |
---|
598 | MEMC_TGTID, |
---|
599 | XICU_TGTID, |
---|
600 | MDMA_TGTID, |
---|
601 | FBUF_TGTID, |
---|
602 | MTTY_TGTID, |
---|
603 | BROM_TGTID, |
---|
604 | MNIC_TGTID, |
---|
605 | BDEV_TGTID, |
---|
606 | MEMC_WAYS, |
---|
607 | MEMC_SETS, |
---|
608 | L1_IWAYS, |
---|
609 | L1_ISETS, |
---|
610 | L1_DWAYS, |
---|
611 | L1_DSETS, |
---|
612 | XRAM_LATENCY, |
---|
613 | (cluster(x,y) == cluster_io_id), |
---|
614 | FBUF_X_SIZE, |
---|
615 | FBUF_Y_SIZE, |
---|
616 | disk_name, |
---|
617 | BDEV_SECTOR_SIZE, |
---|
618 | NB_NIC_CHANNELS, |
---|
619 | nic_rx_name, |
---|
620 | nic_tx_name, |
---|
621 | NIC_TIMEOUT, |
---|
622 | loader, |
---|
623 | frozen_cycles, |
---|
624 | debug_from , |
---|
625 | debug_ok and (cluster(x,y) == debug_memc_id), |
---|
626 | debug_ok and (cluster(x,y) == debug_proc_id) |
---|
627 | ); |
---|
628 | |
---|
629 | std::cout << std::endl; |
---|
630 | std::cout << "cluster_" << x << "_" << y << " constructed" << std::endl; |
---|
631 | std::cout << std::endl; |
---|
632 | |
---|
633 | #if USE_OPENMP |
---|
634 | } // end critical |
---|
635 | #endif |
---|
636 | } // end for |
---|
637 | #if USE_OPENMP |
---|
638 | } |
---|
639 | #endif |
---|
640 | |
---|
641 | /////////////////////////////////////////////////////////////// |
---|
642 | // Net-list |
---|
643 | /////////////////////////////////////////////////////////////// |
---|
644 | |
---|
645 | // Clock & RESET |
---|
646 | for (size_t x = 0; x < (CLUSTER_X); x++){ |
---|
647 | for (size_t y = 0; y < CLUSTER_Y; y++){ |
---|
648 | clusters[x][y]->p_clk (signal_clk); |
---|
649 | clusters[x][y]->p_resetn (signal_resetn); |
---|
650 | } |
---|
651 | } |
---|
652 | |
---|
653 | // Inter Clusters horizontal connections |
---|
654 | if (CLUSTER_X > 1){ |
---|
655 | for (size_t x = 0; x < (CLUSTER_X-1); x++){ |
---|
656 | for (size_t y = 0; y < CLUSTER_Y; y++){ |
---|
657 | for (size_t k = 0; k < 2; k++){ |
---|
658 | clusters[x][y]->p_cmd_out[k][EAST] (signal_dspin_h_cmd_inc[x][y][k]); |
---|
659 | clusters[x+1][y]->p_cmd_in[k][WEST] (signal_dspin_h_cmd_inc[x][y][k]); |
---|
660 | clusters[x][y]->p_cmd_in[k][EAST] (signal_dspin_h_cmd_dec[x][y][k]); |
---|
661 | clusters[x+1][y]->p_cmd_out[k][WEST] (signal_dspin_h_cmd_dec[x][y][k]); |
---|
662 | clusters[x][y]->p_rsp_out[k][EAST] (signal_dspin_h_rsp_inc[x][y][k]); |
---|
663 | clusters[x+1][y]->p_rsp_in[k][WEST] (signal_dspin_h_rsp_inc[x][y][k]); |
---|
664 | clusters[x][y]->p_rsp_in[k][EAST] (signal_dspin_h_rsp_dec[x][y][k]); |
---|
665 | clusters[x+1][y]->p_rsp_out[k][WEST] (signal_dspin_h_rsp_dec[x][y][k]); |
---|
666 | } |
---|
667 | } |
---|
668 | } |
---|
669 | } |
---|
670 | std::cout << std::endl << "Horizontal connections established" << std::endl; |
---|
671 | |
---|
672 | // Inter Clusters vertical connections |
---|
673 | if (CLUSTER_Y > 1) { |
---|
674 | for (size_t y = 0; y < (CLUSTER_Y-1); y++){ |
---|
675 | for (size_t x = 0; x < CLUSTER_X; x++){ |
---|
676 | for (size_t k = 0; k < 2; k++){ |
---|
677 | clusters[x][y]->p_cmd_out[k][NORTH] (signal_dspin_v_cmd_inc[x][y][k]); |
---|
678 | clusters[x][y+1]->p_cmd_in[k][SOUTH] (signal_dspin_v_cmd_inc[x][y][k]); |
---|
679 | clusters[x][y]->p_cmd_in[k][NORTH] (signal_dspin_v_cmd_dec[x][y][k]); |
---|
680 | clusters[x][y+1]->p_cmd_out[k][SOUTH] (signal_dspin_v_cmd_dec[x][y][k]); |
---|
681 | clusters[x][y]->p_rsp_out[k][NORTH] (signal_dspin_v_rsp_inc[x][y][k]); |
---|
682 | clusters[x][y+1]->p_rsp_in[k][SOUTH] (signal_dspin_v_rsp_inc[x][y][k]); |
---|
683 | clusters[x][y]->p_rsp_in[k][NORTH] (signal_dspin_v_rsp_dec[x][y][k]); |
---|
684 | clusters[x][y+1]->p_rsp_out[k][SOUTH] (signal_dspin_v_rsp_dec[x][y][k]); |
---|
685 | } |
---|
686 | } |
---|
687 | } |
---|
688 | } |
---|
689 | std::cout << "Vertical connections established" << std::endl; |
---|
690 | |
---|
691 | // East & West boundary cluster connections |
---|
692 | for (size_t y = 0; y < CLUSTER_Y; y++) |
---|
693 | { |
---|
694 | for (size_t k = 0; k < 2; k++) |
---|
695 | { |
---|
696 | clusters[0][y]->p_cmd_in[k][WEST] (signal_dspin_false_cmd_in[0][y][k][WEST]); |
---|
697 | clusters[0][y]->p_cmd_out[k][WEST] (signal_dspin_false_cmd_out[0][y][k][WEST]); |
---|
698 | clusters[0][y]->p_rsp_in[k][WEST] (signal_dspin_false_rsp_in[0][y][k][WEST]); |
---|
699 | clusters[0][y]->p_rsp_out[k][WEST] (signal_dspin_false_rsp_out[0][y][k][WEST]); |
---|
700 | |
---|
701 | clusters[CLUSTER_X-1][y]->p_cmd_in[k][EAST] (signal_dspin_false_cmd_in[CLUSTER_X-1][y][k][EAST]); |
---|
702 | clusters[CLUSTER_X-1][y]->p_cmd_out[k][EAST] (signal_dspin_false_cmd_out[CLUSTER_X-1][y][k][EAST]); |
---|
703 | clusters[CLUSTER_X-1][y]->p_rsp_in[k][EAST] (signal_dspin_false_rsp_in[CLUSTER_X-1][y][k][EAST]); |
---|
704 | clusters[CLUSTER_X-1][y]->p_rsp_out[k][EAST] (signal_dspin_false_rsp_out[CLUSTER_X-1][y][k][EAST]); |
---|
705 | } |
---|
706 | } |
---|
707 | |
---|
708 | // North & South boundary clusters connections |
---|
709 | for (size_t x = 0; x < CLUSTER_X; x++) |
---|
710 | { |
---|
711 | for (size_t k = 0; k < 2; k++) |
---|
712 | { |
---|
713 | clusters[x][0]->p_cmd_in[k][SOUTH] (signal_dspin_false_cmd_in[x][0][k][SOUTH]); |
---|
714 | clusters[x][0]->p_cmd_out[k][SOUTH] (signal_dspin_false_cmd_out[x][0][k][SOUTH]); |
---|
715 | clusters[x][0]->p_rsp_in[k][SOUTH] (signal_dspin_false_rsp_in[x][0][k][SOUTH]); |
---|
716 | clusters[x][0]->p_rsp_out[k][SOUTH] (signal_dspin_false_rsp_out[x][0][k][SOUTH]); |
---|
717 | |
---|
718 | clusters[x][CLUSTER_Y-1]->p_cmd_in[k][NORTH] (signal_dspin_false_cmd_in[x][CLUSTER_Y-1][k][NORTH]); |
---|
719 | clusters[x][CLUSTER_Y-1]->p_cmd_out[k][NORTH] (signal_dspin_false_cmd_out[x][CLUSTER_Y-1][k][NORTH]); |
---|
720 | clusters[x][CLUSTER_Y-1]->p_rsp_in[k][NORTH] (signal_dspin_false_rsp_in[x][CLUSTER_Y-1][k][NORTH]); |
---|
721 | clusters[x][CLUSTER_Y-1]->p_rsp_out[k][NORTH] (signal_dspin_false_rsp_out[x][CLUSTER_Y-1][k][NORTH]); |
---|
722 | } |
---|
723 | } |
---|
724 | std::cout << "North, South, West, East connections established" << std::endl; |
---|
725 | std::cout << std::endl; |
---|
726 | |
---|
727 | |
---|
728 | //////////////////////////////////////////////////////// |
---|
729 | // Simulation |
---|
730 | /////////////////////////////////////////////////////// |
---|
731 | |
---|
732 | sc_start(sc_core::sc_time(0, SC_NS)); |
---|
733 | signal_resetn = false; |
---|
734 | |
---|
735 | // network boundaries signals |
---|
736 | for (size_t x = 0; x < CLUSTER_X ; x++){ |
---|
737 | for (size_t y = 0; y < CLUSTER_Y ; y++){ |
---|
738 | for (size_t k = 0; k < 2; k++){ |
---|
739 | for (size_t a = 0; a < 4; a++){ |
---|
740 | signal_dspin_false_cmd_in [x][y][k][a].write = false; |
---|
741 | signal_dspin_false_cmd_in [x][y][k][a].read = true; |
---|
742 | signal_dspin_false_cmd_out[x][y][k][a].write = false; |
---|
743 | signal_dspin_false_cmd_out[x][y][k][a].read = true; |
---|
744 | |
---|
745 | signal_dspin_false_rsp_in [x][y][k][a].write = false; |
---|
746 | signal_dspin_false_rsp_in [x][y][k][a].read = true; |
---|
747 | signal_dspin_false_rsp_out[x][y][k][a].write = false; |
---|
748 | signal_dspin_false_rsp_out[x][y][k][a].read = true; |
---|
749 | } |
---|
750 | } |
---|
751 | } |
---|
752 | } |
---|
753 | |
---|
754 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
755 | signal_resetn = true; |
---|
756 | |
---|
757 | for (size_t n = 1; n < ncycles; n++) |
---|
758 | { |
---|
759 | // Monitor a specific address for L1 & L2 caches |
---|
760 | //clusters[0][0]->proc[0]->cache_monitor(0x800002c000ULL); |
---|
761 | //clusters[1][0]->memc->copies_monitor(0x800002C000ULL); |
---|
762 | |
---|
763 | if (debug_ok and (n > debug_from) and (n % debug_period == 0)) |
---|
764 | { |
---|
765 | std::cout << "****************** cycle " << std::dec << n ; |
---|
766 | std::cout << " ************************************************" << std::endl; |
---|
767 | |
---|
768 | // trace proc[debug_proc_id] |
---|
769 | if ( debug_proc_id < (CLUSTER_X * CLUSTER_Y * NB_PROCS_MAX) ) |
---|
770 | { |
---|
771 | size_t l = debug_proc_id % NB_PROCS_MAX ; |
---|
772 | size_t y = (debug_proc_id / NB_PROCS_MAX) % CLUSTER_Y ; |
---|
773 | size_t x = debug_proc_id / (CLUSTER_Y * NB_PROCS_MAX) ; |
---|
774 | |
---|
775 | std::ostringstream vci_signame; |
---|
776 | vci_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ; |
---|
777 | std::ostringstream p2m_signame; |
---|
778 | p2m_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " P2M" ; |
---|
779 | std::ostringstream m2p_signame; |
---|
780 | m2p_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " M2P" ; |
---|
781 | std::ostringstream cmd_signame; |
---|
782 | cmd_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " CMD" ; |
---|
783 | std::ostringstream rsp_signame; |
---|
784 | rsp_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " RSP" ; |
---|
785 | |
---|
786 | clusters[x][y]->proc[l]->print_trace(); |
---|
787 | clusters[x][y]->wi_proc[l]->print_trace(); |
---|
788 | clusters[x][y]->signal_vci_ini_proc[l].print_trace(vci_signame.str()); |
---|
789 | clusters[x][y]->signal_dspin_p2m_proc[l].print_trace(p2m_signame.str()); |
---|
790 | clusters[x][y]->signal_dspin_m2p_proc[l].print_trace(m2p_signame.str()); |
---|
791 | clusters[x][y]->signal_dspin_cmd_proc_i[l].print_trace(cmd_signame.str()); |
---|
792 | clusters[x][y]->signal_dspin_rsp_proc_i[l].print_trace(rsp_signame.str()); |
---|
793 | |
---|
794 | clusters[x][y]->xbar_rsp_d->print_trace(); |
---|
795 | clusters[x][y]->xbar_cmd_d->print_trace(); |
---|
796 | clusters[x][y]->signal_dspin_cmd_l2g_d.print_trace("[SIG]L2G CMD"); |
---|
797 | clusters[x][y]->signal_dspin_cmd_g2l_d.print_trace("[SIG]G2L CMD"); |
---|
798 | clusters[x][y]->signal_dspin_rsp_l2g_d.print_trace("[SIG]L2G RSP"); |
---|
799 | clusters[x][y]->signal_dspin_rsp_g2l_d.print_trace("[SIG]G2L RSP"); |
---|
800 | } |
---|
801 | |
---|
802 | // trace memc[debug_memc_id] |
---|
803 | if ( debug_memc_id < (CLUSTER_X * CLUSTER_Y) ) |
---|
804 | { |
---|
805 | size_t x = debug_memc_id / CLUSTER_Y; |
---|
806 | size_t y = debug_memc_id % CLUSTER_Y; |
---|
807 | |
---|
808 | std::ostringstream smemc; |
---|
809 | smemc << "[SIG]MEMC_" << x << "_" << y; |
---|
810 | std::ostringstream sxram; |
---|
811 | sxram << "[SIG]XRAM_" << x << "_" << y; |
---|
812 | std::ostringstream sm2p; |
---|
813 | sm2p << "[SIG]MEMC_" << x << "_" << y << " M2P" ; |
---|
814 | std::ostringstream sp2m; |
---|
815 | sp2m << "[SIG]MEMC_" << x << "_" << y << " P2M" ; |
---|
816 | std::ostringstream cmd_signame; |
---|
817 | cmd_signame << "[SIG]MEMC_" << x << "_" << y << " CMD" ; |
---|
818 | std::ostringstream rsp_signame; |
---|
819 | rsp_signame << "[SIG]MEMC_" << x << "_" << y << " RSP" ; |
---|
820 | |
---|
821 | clusters[x][y]->memc->print_trace(); |
---|
822 | clusters[x][y]->wt_memc->print_trace(); |
---|
823 | clusters[x][y]->signal_vci_tgt_memc.print_trace(smemc.str()); |
---|
824 | clusters[x][y]->signal_vci_xram.print_trace(sxram.str()); |
---|
825 | clusters[x][y]->signal_dspin_p2m_memc.print_trace(sp2m.str()); |
---|
826 | clusters[x][y]->signal_dspin_m2p_memc.print_trace(sm2p.str()); |
---|
827 | clusters[x][y]->signal_dspin_cmd_memc_t.print_trace(cmd_signame.str()); |
---|
828 | clusters[x][y]->signal_dspin_rsp_memc_t.print_trace(rsp_signame.str()); |
---|
829 | } |
---|
830 | |
---|
831 | // trace replicated peripherals |
---|
832 | // clusters[1][1]->mdma->print_trace(); |
---|
833 | // clusters[1][1]->signal_vci_tgt_mdma.print_trace("[SIG]MDMA_TGT_1_1"); |
---|
834 | // clusters[1][1]->signal_vci_ini_mdma.print_trace("[SIG]MDMA_INI_1_1"); |
---|
835 | |
---|
836 | |
---|
837 | // trace external peripherals |
---|
838 | size_t io_x = cluster_io_id / CLUSTER_Y; |
---|
839 | size_t io_y = cluster_io_id % CLUSTER_Y; |
---|
840 | |
---|
841 | clusters[io_x][io_y]->brom->print_trace(); |
---|
842 | clusters[io_x][io_y]->wt_brom->print_trace(); |
---|
843 | clusters[io_x][io_y]->signal_vci_tgt_brom.print_trace("[SIG]BROM"); |
---|
844 | clusters[io_x][io_y]->signal_dspin_cmd_brom_t.print_trace("[SIG]BROM CMD"); |
---|
845 | clusters[io_x][io_y]->signal_dspin_rsp_brom_t.print_trace("[SIG]BROM RSP"); |
---|
846 | |
---|
847 | // clusters[io_x][io_y]->bdev->print_trace(); |
---|
848 | // clusters[io_x][io_y]->signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT"); |
---|
849 | // clusters[io_x][io_y]->signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI"); |
---|
850 | } |
---|
851 | |
---|
852 | sc_start(sc_core::sc_time(1, SC_NS)); |
---|
853 | } |
---|
854 | return EXIT_SUCCESS; |
---|
855 | } |
---|
856 | |
---|
857 | int sc_main (int argc, char *argv[]) |
---|
858 | { |
---|
859 | try { |
---|
860 | return _main(argc, argv); |
---|
861 | } catch (std::exception &e) { |
---|
862 | std::cout << e.what() << std::endl; |
---|
863 | } catch (...) { |
---|
864 | std::cout << "Unknown exception occured" << std::endl; |
---|
865 | throw; |
---|
866 | } |
---|
867 | return 1; |
---|
868 | } |
---|
869 | |
---|
870 | |
---|
871 | // Local Variables: |
---|
872 | // tab-width: 3 |
---|
873 | // c-basic-offset: 3 |
---|
874 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
875 | // indent-tabs-mode: nil |
---|
876 | // End: |
---|
877 | |
---|
878 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
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