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source: trunk/platforms/tsar_generic_xbar/top.cpp @ 466

Last change on this file since 466 was 465, checked in by joannou, 11 years ago
Updated tsar_generic_xbar platform to use the new generic virtual_dspin_router.
File size: 35.1 KB

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1	/////////////////////////////////////////////////////////////////////////
2	// File: top.cpp
3	// Author: Alain Greiner
4	// Copyright: UPMC/LIP6
5	// Date : may 2013
6	// This program is released under the GNU public license
7	/////////////////////////////////////////////////////////////////////////
8	// This file define a generic TSAR architecture.
9	// The physical address space is 40 bits.
10	//
11	// The number of clusters cannot be larger than 256.
12	// The number of processors per cluster cannot be larger than 8.
13	//
14	// - It uses four dspin_local_crossbar per cluster as local interconnect
15	// - It uses two virtual_dspin routers per cluster as global interconnect
16	// - It uses the vci_cc_vcache_wrapper
17	// - It uses the vci_mem_cache
18	// - It contains one vci_xicu per cluster.
19	// - It contains one vci_multi_dma per cluster.
20	// - It contains one vci_simple_ram per cluster to model the L3 cache.
21	//
22	// The communication between the MemCache and the Xram is 64 bits.
23	//
24	// All clusters are identical, but the cluster 0 (called io_cluster),
25	// contains 5 extra components:
26	// - the boot rom (BROM)
27	// - the disk controller (BDEV)
28	// - the multi-channel network controller (MNIC)
29	// - the multi-channel tty controller (MTTY)
30	// - the frame buffer controller (FBUF)
31	//
32	// It is build with one single component implementing a cluster,
33	// defined in files tsar_xbar_cluster.* (with * = cpp, h, sd)
34	//
35	// The IRQs are connected to XICUs as follow:
36	// - The IRQ_IN[0] to IRQ_IN[7] ports are not used in all clusters.
37	// - The DMA IRQs are connected to IRQ_IN[8] to IRQ_IN[15] in all clusters.
38	// - The TTY IRQs are connected to IRQ_IN[16] to IRQ_IN[30] in I/O cluster.
39	// - The BDEV IRQ is connected to IRQ_IN[31] in I/O cluster.
40	//
41	// Some hardware parameters are used when compiling the OS, and are used
42	// by this top.cpp file. They must be defined in the hard_config.h file :
43	// - CLUSTER_X : number of clusters in a row (power of 2)
44	// - CLUSTER_Y : number of clusters in a column (power of 2)
45	// - CLUSTER_SIZE : size of the segment allocated to a cluster
46	// - NB_PROCS_MAX : number of processors per cluster (power of 2)
47	// - NB_DMA_CHANNELS : number of DMA channels per cluster (< 9)
48	// - NB_TTY_CHANNELS : number of TTY channels in I/O cluster (< 16)
49	// - NB_NIC_CHANNELS : number of NIC channels in I/O cluster (< 9)
50	//
51	// Some other hardware parameters are not used when compiling the OS,
52	// and can be directly defined in this top.cpp file:
53	// - XRAM_LATENCY : external ram latency
54	// - MEMC_WAYS : L2 cache number of ways
55	// - MEMC_SETS : L2 cache number of sets
56	// - L1_IWAYS
57	// - L1_ISETS
58	// - L1_DWAYS
59	// - L1_DSETS
60	// - FBUF_X_SIZE : width of frame buffer (pixels)
61	// - FBUF_Y_SIZE : heigth of frame buffer (lines)
62	// - BDEV_SECTOR_SIZE : block size for block drvice
63	// - BDEV_IMAGE_NAME : file pathname for block device
64	// - NIC_RX_NAME : file pathname for NIC received packets
65	// - NIC_TX_NAME : file pathname for NIC transmited packets
66	// - NIC_TIMEOUT : max number of cycles before closing a container
67	/////////////////////////////////////////////////////////////////////////
68	// General policy for 40 bits physical address decoding:
69	// All physical segments base addresses are multiple of 1 Mbytes
70	// (=> the 24 LSB bits = 0, and the 16 MSB bits define the target)
71	// The (x_width + y_width) MSB bits (left aligned) define
72	// the cluster index, and the LADR bits define the local index:
73	// \| X_ID \| Y_ID \|---\| LADR \| OFFSET \|
74	// \|x_width\|y_width\|---\| 8 \| 24 \|
75	/////////////////////////////////////////////////////////////////////////
76	// General policy for 14 bits SRCID decoding:
77	// Each component is identified by (x_id, y_id, l_id) tuple.
78	// \| X_ID \| Y_ID \|---\| L_ID \|
79	// \|x_width\|y_width\|---\| 6 \|
80	/////////////////////////////////////////////////////////////////////////
81
82	#include <systemc>
83	#include <sys/time.h>
84	#include <iostream>
85	#include <sstream>
86	#include <cstdlib>
87	#include <cstdarg>
88	#include <stdint.h>
89
90	#include "gdbserver.h"
91	#include "mapping_table.h"
92	#include "tsar_xbar_cluster.h"
93	#include "alloc_elems.h"
94
95	///////////////////////////////////////////////////
96	// OS
97	///////////////////////////////////////////////////
98
99	//#define USE_ALMOS
100	#define USE_GIET
101
102	#ifdef USE_ALMOS
103	#ifdef USE_GIET
104	#error "Can't use Two different OS"
105	#endif
106	#endif
107
108	#ifndef USE_ALMOS
109	#ifndef USE_GIET
110	#error "You need to specify one OS"
111	#endif
112	#endif
113
114	///////////////////////////////////////////////////
115	// Parallelisation
116	///////////////////////////////////////////////////
117	#define USE_OPENMP 0
118
119	#if USE_OPENMP
120	#include <omp.h>
121	#endif
122
123	// cluster index (computed from x,y coordinates)
124	#define cluster(x,y) (y + YMAX*x)
125
126	///////////////////////////////////////////////////////////
127	// DSPIN parameters
128	///////////////////////////////////////////////////////////
129
130	#define dspin_cmd_width 39
131	#define dspin_rsp_width 32
132
133	///////////////////////////////////////////////////////////
134	// VCI parameters
135	///////////////////////////////////////////////////////////
136
137	#define vci_cell_width_int 4
138	#define vci_cell_width_ext 8
139
140	#define vci_plen_width 8
141	#define vci_address_width 40
142	#define vci_rerror_width 1
143	#define vci_clen_width 1
144	#define vci_rflag_width 1
145	#define vci_srcid_width 14
146	#define vci_pktid_width 4
147	#define vci_trdid_width 4
148	#define vci_wrplen_width 1
149	////////////////////////////////////////////////////////////
150	// Main Hardware Parameters values
151	//////////////////////i/////////////////////////////////////
152
153
154	#ifdef USE_ALMOS
155	#include "almos/hard_config.h"
156	#define PREFIX_OS "almos/"
157	#endif
158	#ifdef USE_GIET
159	#define PREFIX_OS "giet_vm/"
160	#include "giet_vm/hard_config.h"
161	#endif
162
163	////////////////////////////////////////////////////////////
164	// Secondary Hardware Parameters
165	//////////////////////i/////////////////////////////////////
166
167	#define XMAX CLUSTER_X
168	#define YMAX CLUSTER_Y
169
170	#define XRAM_LATENCY 0
171
172	#define MEMC_WAYS 16
173	#define MEMC_SETS 256
174
175	#define L1_IWAYS 4
176	#define L1_ISETS 64
177
178	#define L1_DWAYS 4
179	#define L1_DSETS 64
180
181	#ifdef USE_ALMOS
182	#define FBUF_X_SIZE 512
183	#define FBUF_Y_SIZE 512
184	#endif
185	#ifdef USE_GIET
186	#define FBUF_X_SIZE 128
187	#define FBUF_Y_SIZE 128
188	#endif
189
190	#ifdef USE_GIET
191	#define BDEV_SECTOR_SIZE 512
192	#define BDEV_IMAGE_NAME "giet_vm/display/images.raw"
193	#endif
194	#ifdef USE_ALMOS
195	#define BDEV_SECTOR_SIZE 4096
196	#define BDEV_IMAGE_NAME PREFIX_OS"hdd-img.bin"
197	#endif
198
199
200	#define NIC_RX_NAME PREFIX_OS"nic/rx_packets.txt"
201	#define NIC_TX_NAME PREFIX_OS"nic/tx_packets.txt"
202	#define NIC_TIMEOUT 10000
203
204	#define NORTH 0
205	#define SOUTH 1
206	#define EAST 2
207	#define WEST 3
208
209	////////////////////////////////////////////////////////////
210	// Software to be loaded in ROM & RAM
211	//////////////////////i/////////////////////////////////////
212
213	#ifdef USE_ALMOS
214	#define soft_name PREFIX_OS"bootloader.bin",\
215	PREFIX_OS"kernel-soclib.bin@0xbfc10000:D",\
216	PREFIX_OS"arch-info.bib@0xBFC08000:D"
217	#endif
218	#ifdef USE_GIET
219	#define soft_pathname PREFIX_OS"soft.elf"
220	#endif
221
222	////////////////////////////////////////////////////////////
223	// DEBUG Parameters default values
224	//////////////////////i/////////////////////////////////////
225
226	#define MAX_FROZEN_CYCLES 10000
227
228	/////////////////////////////////////////////////////////
229	// Physical segments definition
230	/////////////////////////////////////////////////////////
231	// There is 3 segments replicated in all clusters
232	// and 5 specific segments in the "IO" cluster
233	// (containing address 0xBF000000)
234	/////////////////////////////////////////////////////////
235
236	// specific segments in "IO" cluster : absolute physical address
237
238	#define BROM_BASE 0x00BFC00000
239	#define BROM_SIZE 0x0000100000 // 1 Mbytes
240
241	#define FBUF_BASE 0x00B2000000
242	#define FBUF_SIZE FBUF_X_SIZE * FBUF_Y_SIZE * 2
243
244	#define BDEV_BASE 0x00B3000000
245	#define BDEV_SIZE 0x0000001000 // 4 Kbytes
246
247	#define MTTY_BASE 0x00B4000000
248	#define MTTY_SIZE 0x0000001000 // 4 Kbytes
249
250	#define MNIC_BASE 0x00B5000000
251	#define MNIC_SIZE 0x0000080000 // 512 Kbytes (for 8 channels)
252
253	// replicated segments : address is incremented by a cluster offset
254	// offset = cluster(x,y) << (address_width-x_width-y_width);
255
256	#define MEMC_BASE 0x0000000000
257	#define MEMC_SIZE 0x0010000000 // 256 Mbytes per cluster
258
259	#define XICU_BASE 0x00B0000000
260	#define XICU_SIZE 0x0000001000 // 4 Kbytes
261
262	#define MDMA_BASE 0x00B1000000
263	#define MDMA_SIZE 0x0000001000 * NB_DMA_CHANNELS // 4 Kbytes per channel
264
265	////////////////////////////////////////////////////////////////////
266	// TGTID definition in direct space
267	// For all components: global TGTID = global SRCID = cluster_index
268	////////////////////////////////////////////////////////////////////
269
270	#define MEMC_TGTID 0
271	#define XICU_TGTID 1
272	#define MDMA_TGTID 2
273	#define MTTY_TGTID 3
274	#define FBUF_TGTID 4
275	#define BDEV_TGTID 5
276	#define MNIC_TGTID 6
277	#define BROM_TGTID 7
278
279	/////////////////////////////////
280	int _main(int argc, char *argv[])
281	{
282	using namespace sc_core;
283	using namespace soclib::caba;
284	using namespace soclib::common;
285
286	#ifdef USE_GIET
287	char soft_name[256] = soft_pathname; // pathname to binary code
288	#endif
289	size_t ncycles = 1000000000; // simulated cycles
290	char disk_name[256] = BDEV_IMAGE_NAME; // pathname to the disk image
291	char nic_rx_name[256] = NIC_RX_NAME; // pathname to the rx packets file
292	char nic_tx_name[256] = NIC_TX_NAME; // pathname to the tx packets file
293	ssize_t threads_nr = 1; // simulator's threads number
294	bool debug_ok = false; // trace activated
295	size_t debug_period = 1; // trace period
296	size_t debug_memc_id = 0; // index of memc to be traced
297	size_t debug_proc_id = 0; // index of proc to be traced
298	uint32_t debug_from = 0; // trace start cycle
299	uint32_t frozen_cycles = MAX_FROZEN_CYCLES; // monitoring frozen processor
300	size_t cluster_io_id = 0; // index of cluster containing IOs
301	struct timeval t1,t2;
302	uint64_t ms1,ms2;
303
304	////////////// command line arguments //////////////////////
305	if (argc > 1)
306	{
307	for (int n = 1; n < argc; n = n + 2)
308	{
309	if ((strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc))
310	{
311	ncycles = atoi(argv[n+1]);
312	}
313	else if ((strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) )
314	{
315	#ifdef USE_ALMOS
316	assert( 0 && "Can't define almos soft name" );
317	#endif
318	#ifdef USE_GIET
319	strcpy(soft_name, argv[n+1]);
320	#endif
321	}
322	else if ((strcmp(argv[n],"-DISK") == 0) && (n+1<argc) )
323	{
324	strcpy(disk_name, argv[n+1]);
325	}
326	else if ((strcmp(argv[n],"-DEBUG") == 0) && (n+1<argc) )
327	{
328	debug_ok = true;
329	debug_from = atoi(argv[n+1]);
330	}
331	else if ((strcmp(argv[n],"-MEMCID") == 0) && (n+1<argc) )
332	{
333	debug_memc_id = atoi(argv[n+1]);
334	assert( (debug_memc_id < (XMAX*YMAX) ) &&
335	"debug_memc_id larger than XMAX * YMAX" );
336	}
337	else if ((strcmp(argv[n],"-PROCID") == 0) && (n+1<argc) )
338	{
339	debug_proc_id = atoi(argv[n+1]);
340	assert( (debug_proc_id < (XMAX * YMAX * NB_PROCS_MAX) ) &&
341	"debug_proc_id larger than XMAX * YMAX * NB_PROCS" );
342	}
343	else if ((strcmp(argv[n], "-THREADS") == 0) && ((n+1) < argc))
344	{
345	threads_nr = atoi(argv[n+1]);
346	threads_nr = (threads_nr < 1) ? 1 : threads_nr;
347	}
348	else if ((strcmp(argv[n], "-FROZEN") == 0) && (n+1 < argc))
349	{
350	frozen_cycles = atoi(argv[n+1]);
351	}
352	else if ((strcmp(argv[n], "-PERIOD") == 0) && (n+1 < argc))
353	{
354	debug_period = atoi(argv[n+1]);
355	}
356	else
357	{
358	std::cout << " Arguments are (key,value) couples." << std::endl;
359	std::cout << " The order is not important." << std::endl;
360	std::cout << " Accepted arguments are :" << std::endl << std::endl;
361	std::cout << " -SOFT pathname_for_embedded_soft" << std::endl;
362	std::cout << " -DISK pathname_for_disk_image" << std::endl;
363	std::cout << " -NCYCLES number_of_simulated_cycles" << std::endl;
364	std::cout << " -DEBUG debug_start_cycle" << std::endl;
365	std::cout << " -THREADS simulator's threads number" << std::endl;
366	std::cout << " -FROZEN max_number_of_lines" << std::endl;
367	std::cout << " -PERIOD number_of_cycles between trace" << std::endl;
368	std::cout << " -MEMCID index_memc_to_be_traced" << std::endl;
369	std::cout << " -PROCID index_proc_to_be_traced" << std::endl;
370	exit(0);
371	}
372	}
373	}
374
375	// checking hardware parameters
376	assert( ( (XMAX == 1) or (XMAX == 2) or (XMAX == 4) or
377	(XMAX == 8) or (XMAX == 16) ) and
378	"The XMAX parameter must be 1, 2, 4, 8 or 16" );
379
380	assert( ( (YMAX == 1) or (YMAX == 2) or (YMAX == 4) or
381	(YMAX == 8) or (YMAX == 16) ) and
382	"The YMAX parameter must be 1, 2, 4, 8 or 16" );
383
384	assert( ( (NB_PROCS_MAX == 1) or (NB_PROCS_MAX == 2) or
385	(NB_PROCS_MAX == 4) or (NB_PROCS_MAX == 8) ) and
386	"The NB_PROCS_MAX parameter must be 1, 2, 4 or 8" );
387
388	assert( (NB_DMA_CHANNELS < 9) and
389	"The NB_DMA_CHANNELS parameter must be smaller than 9" );
390
391	assert( (NB_TTY_CHANNELS < 15) and
392	"The NB_TTY_CHANNELS parameter must be smaller than 15" );
393
394	assert( (NB_NIC_CHANNELS < 9) and
395	"The NB_NIC_CHANNELS parameter must be smaller than 9" );
396
397	#ifdef USE_GIET
398	assert( (vci_address_width == 40) and
399	"VCI address width must be 40 bits" );
400	#endif
401
402	std::cout << std::endl;
403	std::cout << " - XMAX = " << XMAX << std::endl;
404	std::cout << " - YMAX = " << YMAX << std::endl;
405	std::cout << " - NB_PROCS_MAX = " << NB_PROCS_MAX << std::endl;
406	std::cout << " - NB_DMA_CHANNELS = " << NB_DMA_CHANNELS << std::endl;
407	std::cout << " - NB_TTY_CHANNELS = " << NB_TTY_CHANNELS << std::endl;
408	std::cout << " - NB_NIC_CHANNELS = " << NB_NIC_CHANNELS << std::endl;
409	std::cout << " - MEMC_WAYS = " << MEMC_WAYS << std::endl;
410	std::cout << " - MEMC_SETS = " << MEMC_SETS << std::endl;
411	std::cout << " - RAM_LATENCY = " << XRAM_LATENCY << std::endl;
412	std::cout << " - MAX_FROZEN = " << frozen_cycles << std::endl;
413
414	std::cout << std::endl;
415	// Internal and External VCI parameters definition
416	typedef soclib::caba::VciParams<vci_cell_width_int,
417	vci_plen_width,
418	vci_address_width,
419	vci_rerror_width,
420	vci_clen_width,
421	vci_rflag_width,
422	vci_srcid_width,
423	vci_pktid_width,
424	vci_trdid_width,
425	vci_wrplen_width> vci_param_int;
426
427	typedef soclib::caba::VciParams<vci_cell_width_ext,
428	vci_plen_width,
429	vci_address_width,
430	vci_rerror_width,
431	vci_clen_width,
432	vci_rflag_width,
433	vci_srcid_width,
434	vci_pktid_width,
435	vci_trdid_width,
436	vci_wrplen_width> vci_param_ext;
437
438	#if USE_OPENMP
439	omp_set_dynamic(false);
440	omp_set_num_threads(threads_nr);
441	std::cerr << "Built with openmp version " << _OPENMP << std::endl;
442	#endif
443
444	// Define parameters depending on mesh size
445	size_t x_width;
446	size_t y_width;
447
448	if (XMAX == 1) x_width = 0;
449	else if (XMAX == 2) x_width = 1;
450	else if (XMAX <= 4) x_width = 2;
451	else if (XMAX <= 8) x_width = 3;
452	else x_width = 4;
453
454	if (YMAX == 1) y_width = 0;
455	else if (YMAX == 2) y_width = 1;
456	else if (YMAX <= 4) y_width = 2;
457	else if (YMAX <= 8) y_width = 3;
458	else y_width = 4;
459
460	/////////////////////
461	// Mapping Tables
462	/////////////////////
463
464	// internal network
465	MappingTable maptabd(vci_address_width,
466	IntTab(x_width + y_width, 16 - x_width - y_width),
467	IntTab(x_width + y_width, vci_srcid_width - x_width - y_width),
468	0x00FF000000);
469
470	for (size_t x = 0; x < XMAX; x++)
471	{
472	for (size_t y = 0; y < YMAX; y++)
473	{
474	sc_uint<vci_address_width> offset;
475	offset = (sc_uint<vci_address_width>)cluster(x,y)
476	<< (vci_address_width-x_width-y_width);
477
478	std::ostringstream sh;
479	sh << "seg_memc_" << x << "_" << y;
480	maptabd.add(Segment(sh.str(), MEMC_BASE+offset, MEMC_SIZE,
481	IntTab(cluster(x,y),MEMC_TGTID), true));
482
483	std::ostringstream si;
484	si << "seg_xicu_" << x << "_" << y;
485	maptabd.add(Segment(si.str(), XICU_BASE+offset, XICU_SIZE,
486	IntTab(cluster(x,y),XICU_TGTID), false));
487
488	std::ostringstream sd;
489	sd << "seg_mdma_" << x << "_" << y;
490	maptabd.add(Segment(sd.str(), MDMA_BASE+offset, MDMA_SIZE,
491	IntTab(cluster(x,y),MDMA_TGTID), false));
492
493	if ( cluster(x,y) == cluster_io_id )
494	{
495	maptabd.add(Segment("seg_mtty", MTTY_BASE, MTTY_SIZE,
496	IntTab(cluster(x,y),MTTY_TGTID), false));
497	maptabd.add(Segment("seg_fbuf", FBUF_BASE, FBUF_SIZE,
498	IntTab(cluster(x,y),FBUF_TGTID), false));
499	maptabd.add(Segment("seg_bdev", BDEV_BASE, BDEV_SIZE,
500	IntTab(cluster(x,y),BDEV_TGTID), false));
501	maptabd.add(Segment("seg_mnic", MNIC_BASE, MNIC_SIZE,
502	IntTab(cluster(x,y),MNIC_TGTID), false));
503	maptabd.add(Segment("seg_brom", BROM_BASE, BROM_SIZE,
504	IntTab(cluster(x,y),BROM_TGTID), true));
505	}
506	}
507	}
508	std::cout << maptabd << std::endl;
509
510	// external network
511	MappingTable maptabx(vci_address_width,
512	IntTab(x_width+y_width),
513	IntTab(x_width+y_width),
514	0xFFFF000000ULL);
515
516	for (size_t x = 0; x < XMAX; x++)
517	{
518	for (size_t y = 0; y < YMAX ; y++)
519	{
520
521	sc_uint<vci_address_width> offset;
522	offset = (sc_uint<vci_address_width>)cluster(x,y)
523	<< (vci_address_width-x_width-y_width);
524
525	std::ostringstream sh;
526	sh << "x_seg_memc_" << x << "_" << y;
527
528	maptabx.add(Segment(sh.str(), MEMC_BASE+offset,
529	MEMC_SIZE, IntTab(cluster(x,y)), false));
530	}
531	}
532	std::cout << maptabx << std::endl;
533
534	////////////////////
535	// Signals
536	///////////////////
537
538	sc_clock signal_clk("clk");
539	sc_signal<bool> signal_resetn("resetn");
540
541	// Horizontal inter-clusters DSPIN signals
542	DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_inc =
543	alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_inc", XMAX-1, YMAX, 2);
544	DspinSignals<dspin_cmd_width>*** signal_dspin_h_cmd_dec =
545	alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_h_cmd_dec", XMAX-1, YMAX, 2);
546	DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_inc =
547	alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_inc", XMAX-1, YMAX, 2);
548	DspinSignals<dspin_rsp_width>*** signal_dspin_h_rsp_dec =
549	alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_h_rsp_dec", XMAX-1, YMAX, 2);
550
551	// Vertical inter-clusters DSPIN signals
552	DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_inc =
553	alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_inc", XMAX, YMAX-1, 2);
554	DspinSignals<dspin_cmd_width>*** signal_dspin_v_cmd_dec =
555	alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_v_cmd_dec", XMAX, YMAX-1, 2);
556	DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_inc =
557	alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_inc", XMAX, YMAX-1, 2);
558	DspinSignals<dspin_rsp_width>*** signal_dspin_v_rsp_dec =
559	alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_v_rsp_dec", XMAX, YMAX-1, 2);
560
561	// Mesh boundaries DSPIN signals
562	DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_in =
563	alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_in", XMAX, YMAX, 2, 4);
564	DspinSignals<dspin_cmd_width>**** signal_dspin_false_cmd_out =
565	alloc_elems<DspinSignals<dspin_cmd_width> >("signal_dspin_false_cmd_out", XMAX, YMAX, 2, 4);
566	DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_in =
567	alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_in", XMAX, YMAX, 2, 4);
568	DspinSignals<dspin_rsp_width>**** signal_dspin_false_rsp_out =
569	alloc_elems<DspinSignals<dspin_rsp_width> >("signal_dspin_false_rsp_out", XMAX, YMAX, 2, 4);
570
571
572	////////////////////////////
573	// Loader
574	////////////////////////////
575
576	soclib::common::Loader loader(soft_name);
577
578	typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss;
579	proc_iss::set_loader(loader);
580
581	////////////////////////////
582	// Clusters construction
583	////////////////////////////
584
585	TsarXbarCluster<dspin_cmd_width,
586	dspin_rsp_width,
587	vci_param_int,
588	vci_param_ext>* clusters[XMAX][YMAX];
589
590	#if USE_OPENMP
591	#pragma omp parallel
592	{
593	#pragma omp for
594	#endif
595	for(size_t i = 0; i < (XMAX * YMAX); i++)
596	{
597	size_t x = i / YMAX;
598	size_t y = i % YMAX;
599
600	#if USE_OPENMP
601	#pragma omp critical
602	{
603	#endif
604	std::cout << std::endl;
605	std::cout << "Cluster_" << x << "_" << y << std::endl;
606	std::cout << std::endl;
607
608	std::ostringstream sc;
609	sc << "cluster_" << x << "_" << y;
610	clusters[x][y] = new TsarXbarCluster<dspin_cmd_width,
611	dspin_rsp_width,
612	vci_param_int,
613	vci_param_ext>
614	(
615	sc.str().c_str(),
616	NB_PROCS_MAX,
617	NB_TTY_CHANNELS,
618	NB_DMA_CHANNELS,
619	x,
620	y,
621	cluster(x,y),
622	maptabd,
623	maptabx,
624	x_width,
625	y_width,
626	vci_srcid_width - x_width - y_width, // l_id width,
627	MEMC_TGTID,
628	XICU_TGTID,
629	MDMA_TGTID,
630	FBUF_TGTID,
631	MTTY_TGTID,
632	BROM_TGTID,
633	MNIC_TGTID,
634	BDEV_TGTID,
635	MEMC_WAYS,
636	MEMC_SETS,
637	L1_IWAYS,
638	L1_ISETS,
639	L1_DWAYS,
640	L1_DSETS,
641	XRAM_LATENCY,
642	(cluster(x,y) == cluster_io_id),
643	FBUF_X_SIZE,
644	FBUF_Y_SIZE,
645	disk_name,
646	BDEV_SECTOR_SIZE,
647	NB_NIC_CHANNELS,
648	nic_rx_name,
649	nic_tx_name,
650	NIC_TIMEOUT,
651	loader,
652	frozen_cycles,
653	debug_from ,
654	debug_ok and (cluster(x,y) == debug_memc_id),
655	debug_ok and (cluster(x,y) == debug_proc_id)
656	);
657
658	#if USE_OPENMP
659	} // end critical
660	#endif
661	} // end for
662	#if USE_OPENMP
663	}
664	#endif
665
666	///////////////////////////////////////////////////////////////
667	// Net-list
668	///////////////////////////////////////////////////////////////
669
670	// Clock & RESET
671	for (size_t x = 0; x < (XMAX); x++){
672	for (size_t y = 0; y < YMAX; y++){
673	clusters[x][y]->p_clk (signal_clk);
674	clusters[x][y]->p_resetn (signal_resetn);
675	}
676	}
677
678	// Inter Clusters horizontal connections
679	if (XMAX > 1){
680	for (size_t x = 0; x < (XMAX-1); x++){
681	for (size_t y = 0; y < YMAX; y++){
682	for (size_t k = 0; k < 2; k++){
683	clusters[x][y]->p_cmd_out[EAST][k] (signal_dspin_h_cmd_inc[x][y][k]);
684	clusters[x+1][y]->p_cmd_in[WEST][k] (signal_dspin_h_cmd_inc[x][y][k]);
685	clusters[x][y]->p_cmd_in[EAST][k] (signal_dspin_h_cmd_dec[x][y][k]);
686	clusters[x+1][y]->p_cmd_out[WEST][k] (signal_dspin_h_cmd_dec[x][y][k]);
687	clusters[x][y]->p_rsp_out[EAST][k] (signal_dspin_h_rsp_inc[x][y][k]);
688	clusters[x+1][y]->p_rsp_in[WEST][k] (signal_dspin_h_rsp_inc[x][y][k]);
689	clusters[x][y]->p_rsp_in[EAST][k] (signal_dspin_h_rsp_dec[x][y][k]);
690	clusters[x+1][y]->p_rsp_out[WEST][k] (signal_dspin_h_rsp_dec[x][y][k]);
691	}
692	}
693	}
694	}
695	std::cout << std::endl << "Horizontal connections established" << std::endl;
696
697	// Inter Clusters vertical connections
698	if (YMAX > 1) {
699	for (size_t y = 0; y < (YMAX-1); y++){
700	for (size_t x = 0; x < XMAX; x++){
701	for (size_t k = 0; k < 2; k++){
702	clusters[x][y]->p_cmd_out[NORTH][k] (signal_dspin_v_cmd_inc[x][y][k]);
703	clusters[x][y+1]->p_cmd_in[SOUTH][k] (signal_dspin_v_cmd_inc[x][y][k]);
704	clusters[x][y]->p_cmd_in[NORTH][k] (signal_dspin_v_cmd_dec[x][y][k]);
705	clusters[x][y+1]->p_cmd_out[SOUTH][k] (signal_dspin_v_cmd_dec[x][y][k]);
706	clusters[x][y]->p_rsp_out[NORTH][k] (signal_dspin_v_rsp_inc[x][y][k]);
707	clusters[x][y+1]->p_rsp_in[SOUTH][k] (signal_dspin_v_rsp_inc[x][y][k]);
708	clusters[x][y]->p_rsp_in[NORTH][k] (signal_dspin_v_rsp_dec[x][y][k]);
709	clusters[x][y+1]->p_rsp_out[SOUTH][k] (signal_dspin_v_rsp_dec[x][y][k]);
710	}
711	}
712	}
713	}
714	std::cout << "Vertical connections established" << std::endl;
715
716	// East & West boundary cluster connections
717	for (size_t y = 0; y < YMAX; y++)
718	{
719	for (size_t k = 0; k < 2; k++)
720	{
721	clusters[0][y]->p_cmd_in[WEST][k] (signal_dspin_false_cmd_in[0][y][k][WEST]);
722	clusters[0][y]->p_cmd_out[WEST][k] (signal_dspin_false_cmd_out[0][y][k][WEST]);
723	clusters[0][y]->p_rsp_in[WEST][k] (signal_dspin_false_rsp_in[0][y][k][WEST]);
724	clusters[0][y]->p_rsp_out[WEST][k] (signal_dspin_false_rsp_out[0][y][k][WEST]);
725
726	clusters[XMAX-1][y]->p_cmd_in[EAST][k] (signal_dspin_false_cmd_in[XMAX-1][y][k][EAST]);
727	clusters[XMAX-1][y]->p_cmd_out[EAST][k] (signal_dspin_false_cmd_out[XMAX-1][y][k][EAST]);
728	clusters[XMAX-1][y]->p_rsp_in[EAST][k] (signal_dspin_false_rsp_in[XMAX-1][y][k][EAST]);
729	clusters[XMAX-1][y]->p_rsp_out[EAST][k] (signal_dspin_false_rsp_out[XMAX-1][y][k][EAST]);
730	}
731	}
732
733	// North & South boundary clusters connections
734	for (size_t x = 0; x < XMAX; x++)
735	{
736	for (size_t k = 0; k < 2; k++)
737	{
738	clusters[x][0]->p_cmd_in[SOUTH][k] (signal_dspin_false_cmd_in[x][0][k][SOUTH]);
739	clusters[x][0]->p_cmd_out[SOUTH][k] (signal_dspin_false_cmd_out[x][0][k][SOUTH]);
740	clusters[x][0]->p_rsp_in[SOUTH][k] (signal_dspin_false_rsp_in[x][0][k][SOUTH]);
741	clusters[x][0]->p_rsp_out[SOUTH][k] (signal_dspin_false_rsp_out[x][0][k][SOUTH]);
742
743	clusters[x][YMAX-1]->p_cmd_in[NORTH][k] (signal_dspin_false_cmd_in[x][YMAX-1][k][NORTH]);
744	clusters[x][YMAX-1]->p_cmd_out[NORTH][k] (signal_dspin_false_cmd_out[x][YMAX-1][k][NORTH]);
745	clusters[x][YMAX-1]->p_rsp_in[NORTH][k] (signal_dspin_false_rsp_in[x][YMAX-1][k][NORTH]);
746	clusters[x][YMAX-1]->p_rsp_out[NORTH][k] (signal_dspin_false_rsp_out[x][YMAX-1][k][NORTH]);
747	}
748	}
749	std::cout << "North, South, West, East connections established" << std::endl;
750	std::cout << std::endl;
751
752
753	////////////////////////////////////////////////////////
754	// Simulation
755	///////////////////////////////////////////////////////
756
757	sc_start(sc_core::sc_time(0, SC_NS));
758	signal_resetn = false;
759
760	// network boundaries signals
761	for (size_t x = 0; x < XMAX ; x++){
762	for (size_t y = 0; y < YMAX ; y++){
763	for (size_t k = 0; k < 2; k++){
764	for (size_t a = 0; a < 4; a++){
765	signal_dspin_false_cmd_in [x][y][k][a].write = false;
766	signal_dspin_false_cmd_in [x][y][k][a].read = true;
767	signal_dspin_false_cmd_out[x][y][k][a].write = false;
768	signal_dspin_false_cmd_out[x][y][k][a].read = true;
769
770	signal_dspin_false_rsp_in [x][y][k][a].write = false;
771	signal_dspin_false_rsp_in [x][y][k][a].read = true;
772	signal_dspin_false_rsp_out[x][y][k][a].write = false;
773	signal_dspin_false_rsp_out[x][y][k][a].read = true;
774	}
775	}
776	}
777	}
778
779	sc_start(sc_core::sc_time(1, SC_NS));
780	signal_resetn = true;
781
782	if (gettimeofday(&t1, NULL) != 0)
783	{
784	perror("gettimeofday");
785	return EXIT_FAILURE;
786	}
787
788	for (size_t n = 1; n < ncycles; n++)
789	{
790	// Monitor a specific address for L1 & L2 caches
791	//clusters[0][0]->proc[0]->cache_monitor(0x800002c000ULL);
792	//clusters[1][0]->memc->copies_monitor(0x800002C000ULL);
793
794	if( (n % 5000000) == 0)
795	{
796
797	if (gettimeofday(&t2, NULL) != 0)
798	{
799	perror("gettimeofday");
800	return EXIT_FAILURE;
801	}
802
803	ms1 = (uint64_t)t1.tv_sec * 1000ULL + (uint64_t)t1.tv_usec / 1000;
804	ms2 = (uint64_t)t2.tv_sec * 1000ULL + (uint64_t)t2.tv_usec / 1000;
805	std::cerr << "platform clock frequency " << (double)5000000 / (double)(ms2 - ms1) << "Khz" << std::endl;
806
807	if (gettimeofday(&t1, NULL) != 0)
808	{
809	perror("gettimeofday");
810	return EXIT_FAILURE;
811	}
812	}
813
814
815	if (debug_ok and (n > debug_from) and (n % debug_period == 0))
816	{
817	std::cout << "****************** cycle " << std::dec << n ;
818	std::cout << " ************************************************" << std::endl;
819
820	// trace proc[debug_proc_id]
821	size_t l = debug_proc_id % NB_PROCS_MAX ;
822	size_t y = (debug_proc_id / NB_PROCS_MAX) % YMAX ;
823	size_t x = debug_proc_id / (YMAX * NB_PROCS_MAX) ;
824
825	std::ostringstream proc_signame;
826	proc_signame << "[SIG]PROC_" << x << "_" << y << "_" << l ;
827	std::ostringstream p2m_signame;
828	p2m_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " P2M" ;
829	std::ostringstream m2p_signame;
830	m2p_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " M2P" ;
831	std::ostringstream p_cmd_signame;
832	p_cmd_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " CMD" ;
833	std::ostringstream p_rsp_signame;
834	p_rsp_signame << "[SIG]PROC_" << x << "_" << y << "_" << l << " RSP" ;
835
836	clusters[x][y]->proc[l]->print_trace();
837	clusters[x][y]->wi_proc[l]->print_trace();
838	clusters[x][y]->signal_vci_ini_proc[l].print_trace(proc_signame.str());
839	clusters[x][y]->signal_dspin_p2m_proc[l].print_trace(p2m_signame.str());
840	clusters[x][y]->signal_dspin_m2p_proc[l].print_trace(m2p_signame.str());
841	clusters[x][y]->signal_dspin_cmd_proc_i[l].print_trace(p_cmd_signame.str());
842	clusters[x][y]->signal_dspin_rsp_proc_i[l].print_trace(p_rsp_signame.str());
843
844	clusters[x][y]->xbar_rsp_d->print_trace();
845	clusters[x][y]->xbar_cmd_d->print_trace();
846	clusters[x][y]->signal_dspin_cmd_l2g_d.print_trace("[SIG]L2G CMD");
847	clusters[x][y]->signal_dspin_cmd_g2l_d.print_trace("[SIG]G2L CMD");
848	clusters[x][y]->signal_dspin_rsp_l2g_d.print_trace("[SIG]L2G RSP");
849	clusters[x][y]->signal_dspin_rsp_g2l_d.print_trace("[SIG]G2L RSP");
850
851	// trace memc[debug_memc_id]
852	x = debug_memc_id / YMAX;
853	y = debug_memc_id % YMAX;
854
855	std::ostringstream smemc;
856	smemc << "[SIG]MEMC_" << x << "_" << y;
857	std::ostringstream sxram;
858	sxram << "[SIG]XRAM_" << x << "_" << y;
859	std::ostringstream sm2p;
860	sm2p << "[SIG]MEMC_" << x << "_" << y << " M2P" ;
861	std::ostringstream sp2m;
862	sp2m << "[SIG]MEMC_" << x << "_" << y << " P2M" ;
863	std::ostringstream m_cmd_signame;
864	m_cmd_signame << "[SIG]MEMC_" << x << "_" << y << " CMD" ;
865	std::ostringstream m_rsp_signame;
866	m_rsp_signame << "[SIG]MEMC_" << x << "_" << y << " RSP" ;
867
868	clusters[x][y]->memc->print_trace();
869	clusters[x][y]->wt_memc->print_trace();
870	clusters[x][y]->signal_vci_tgt_memc.print_trace(smemc.str());
871	clusters[x][y]->signal_vci_xram.print_trace(sxram.str());
872	clusters[x][y]->signal_dspin_p2m_memc.print_trace(sp2m.str());
873	clusters[x][y]->signal_dspin_m2p_memc.print_trace(sm2p.str());
874	clusters[x][y]->signal_dspin_cmd_memc_t.print_trace(m_cmd_signame.str());
875	clusters[x][y]->signal_dspin_rsp_memc_t.print_trace(m_rsp_signame.str());
876
877	// trace replicated peripherals
878	// clusters[1][1]->mdma->print_trace();
879	// clusters[1][1]->signal_vci_tgt_mdma.print_trace("[SIG]MDMA_TGT_1_1");
880	// clusters[1][1]->signal_vci_ini_mdma.print_trace("[SIG]MDMA_INI_1_1");
881
882
883	// trace external peripherals
884	size_t io_x = cluster_io_id / YMAX;
885	size_t io_y = cluster_io_id % YMAX;
886
887	clusters[io_x][io_y]->brom->print_trace();
888	clusters[io_x][io_y]->wt_brom->print_trace();
889	clusters[io_x][io_y]->signal_vci_tgt_brom.print_trace("[SIG]BROM");
890	clusters[io_x][io_y]->signal_dspin_cmd_brom_t.print_trace("[SIG]BROM CMD");
891	clusters[io_x][io_y]->signal_dspin_rsp_brom_t.print_trace("[SIG]BROM RSP");
892
893	// clusters[io_x][io_y]->bdev->print_trace();
894	// clusters[io_x][io_y]->signal_vci_tgt_bdev.print_trace("[SIG]BDEV_TGT");
895	// clusters[io_x][io_y]->signal_vci_ini_bdev.print_trace("[SIG]BDEV_INI");
896	}
897
898	sc_start(sc_core::sc_time(1, SC_NS));
899	}
900	return EXIT_SUCCESS;
901	}
902
903	int sc_main (int argc, char *argv[])
904	{
905	try {
906	return _main(argc, argv);
907	} catch (std::exception &e) {
908	std::cout << e.what() << std::endl;
909	} catch (...) {
910	std::cout << "Unknown exception occured" << std::endl;
911	throw;
912	}
913	return 1;
914	}
915
916
917	// Local Variables:
918	// tab-width: 3
919	// c-basic-offset: 3
920	// c-file-offsets:((innamespace . 0)(inline-open . 0))
921	// indent-tabs-mode: nil
922	// End:
923
924	// vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3

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