| [345] | 1 | |
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| 2 | # -*- python -*- |
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| 3 | |
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| [437] | 4 | Module('caba:tsar_xbar_cluster', |
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| [706] | 5 | classname = 'soclib::caba::TsarXbarCluster', |
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| [547] | 6 | tmpl_parameters = [ |
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| 7 | parameter.Int('dspin_cmd_width'), |
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| 8 | parameter.Int('dspin_rsp_width'), |
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| [437] | 9 | parameter.Module('vci_param_int', default = 'caba:vci_param', |
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| 10 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 11 | parameter.Module('vci_param_ext', default = 'caba:vci_param', |
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| 12 | cell_size = parameter.Reference('vci_data_width_ext')), |
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| 13 | ], |
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| [428] | 14 | |
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| [547] | 15 | header_files = [ '../source/include/tsar_xbar_cluster.h', |
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| [437] | 16 | ], |
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| [396] | 17 | |
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| [547] | 18 | implementation_files = [ '../source/src/tsar_xbar_cluster.cpp', |
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| [437] | 19 | ], |
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| [396] | 20 | |
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| [547] | 21 | uses = [ |
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| 22 | Uses('caba:base_module'), |
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| 23 | Uses('common:mapping_table'), |
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| 24 | Uses('common:iss2'), |
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| [437] | 25 | |
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| [547] | 26 | Uses('caba:vci_cc_vcache_wrapper', |
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| [437] | 27 | cell_size = parameter.Reference('vci_data_width_int'), |
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| 28 | dspin_in_width = parameter.Reference('dspin_cmd_width'), |
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| 29 | dspin_out_width = parameter.Reference('dspin_rsp_width'), |
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| 30 | iss_t = 'common:gdb_iss', |
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| 31 | gdb_iss_t = 'common:mips32el'), |
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| [396] | 32 | |
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| [547] | 33 | Uses('caba:vci_mem_cache', |
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| [437] | 34 | memc_cell_size_int = parameter.Reference('vci_data_width_int'), |
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| 35 | memc_cell_size_ext = parameter.Reference('vci_data_width_ext'), |
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| 36 | dspin_in_width = parameter.Reference('dspin_rsp_width'), |
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| 37 | dspin_out_width = parameter.Reference('dspin_cmd_width')), |
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| [396] | 38 | |
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| [547] | 39 | Uses('caba:vci_simple_rom', |
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| [437] | 40 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 41 | |
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| [547] | 42 | Uses('caba:vci_simple_ram', |
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| [437] | 43 | cell_size = parameter.Reference('vci_data_width_ext')), |
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| 44 | |
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| [547] | 45 | Uses('caba:vci_simple_ram', |
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| [437] | 46 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 47 | |
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| [547] | 48 | Uses('caba:vci_xicu', |
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| 49 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 50 | |
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| [706] | 51 | Uses('caba:vci_local_crossbar', |
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| 52 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 53 | |
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| [547] | 54 | Uses('caba:dspin_local_crossbar', |
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| [437] | 55 | flit_width = parameter.Reference('dspin_cmd_width')), |
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| 56 | |
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| [547] | 57 | Uses('caba:dspin_local_crossbar', |
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| [437] | 58 | flit_width = parameter.Reference('dspin_rsp_width')), |
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| 59 | |
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| [547] | 60 | Uses('caba:virtual_dspin_router', |
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| [437] | 61 | flit_width = parameter.Reference('dspin_cmd_width')), |
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| 62 | |
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| [547] | 63 | Uses('caba:virtual_dspin_router', |
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| [437] | 64 | flit_width = parameter.Reference('dspin_rsp_width')), |
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| [468] | 65 | |
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| [547] | 66 | Uses('caba:vci_multi_tty', |
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| [437] | 67 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 68 | |
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| [547] | 69 | Uses('caba:vci_framebuffer', |
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| [437] | 70 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 71 | |
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| [547] | 72 | Uses('caba:vci_multi_nic', |
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| [437] | 73 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 74 | |
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| [547] | 75 | Uses('caba:vci_chbuf_dma', |
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| [475] | 76 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 77 | |
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| [547] | 78 | Uses('caba:vci_block_device_tsar', |
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| [437] | 79 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 80 | |
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| [547] | 81 | Uses('caba:vci_multi_dma', |
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| [437] | 82 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 83 | |
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| [547] | 84 | Uses('caba:vci_dspin_target_wrapper', |
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| [437] | 85 | cell_size = parameter.Reference('vci_data_width_int')), |
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| 86 | |
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| [547] | 87 | Uses('caba:vci_dspin_initiator_wrapper', |
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| [437] | 88 | cell_size = parameter.Reference('vci_data_width_int')), |
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| [396] | 89 | |
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| [547] | 90 | Uses('caba:vci_simhelper', |
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| 91 | cell_size = parameter.Reference('vci_data_width_int')), |
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| [396] | 92 | |
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| [547] | 93 | Uses('common:elf_file_loader'), |
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| 94 | ], |
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| 95 | |
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| 96 | ports = [ |
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| 97 | Port('caba:bit_in', 'p_resetn', auto = 'resetn'), |
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| 98 | Port('caba:clock_in', 'p_clk', auto = 'clock'), |
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| 99 | Port('caba:dspin_output', 'p_cmd_out', [4, 3], |
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| [437] | 100 | dspin_data_size = parameter.Reference('dspin_cmd_width')), |
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| [547] | 101 | Port('caba:dspin_input', 'p_cmd_in', [4, 3], |
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| [437] | 102 | dspin_data_size = parameter.Reference('dspin_cmd_width')), |
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| [547] | 103 | Port('caba:dspin_output', 'p_rsp_out', [4, 2], |
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| [437] | 104 | dspin_data_size = parameter.Reference('dspin_rsp_width')), |
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| [547] | 105 | Port('caba:dspin_input', 'p_rsp_in', [4, 2], |
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| [437] | 106 | dspin_data_size = parameter.Reference('dspin_rsp_width')), |
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| [547] | 107 | ], |
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| [345] | 108 | ) |
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| 109 | |
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| [437] | 110 | |
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