1 | ////////////////////////////////////////////////////////////////////////////// |
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2 | // File: tsar_xbar_cluster_mmu.h |
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3 | // Author: Alain Greiner |
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4 | // Copyright: UPMC/LIP6 |
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5 | // Date : march 2011 |
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6 | // This program is released under the GNU public license |
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7 | ////////////////////////////////////////////////////////////////////////////// |
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8 | |
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9 | #ifndef SOCLIB_CABA_TSAR_XBAR_CLUSTER_H |
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10 | #define SOCLIB_CABA_TSAR_XBAR_CLUSTER_H |
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11 | |
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12 | #include <systemc> |
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13 | #include <sys/time.h> |
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14 | #include <iostream> |
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15 | #include <sstream> |
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16 | #include <cstdlib> |
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17 | #include <cstdarg> |
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18 | |
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19 | #include "gdbserver.h" |
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20 | #include "mapping_table.h" |
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21 | #include "mips32.h" |
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22 | #include "vci_simple_ram.h" |
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23 | #include "vci_xicu.h" |
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24 | #include "dspin_local_crossbar.h" |
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25 | #include "vci_dspin_initiator_wrapper.h" |
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26 | #include "vci_dspin_target_wrapper.h" |
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27 | #include "virtual_dspin_router.h" |
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28 | #include "vci_multi_tty.h" |
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29 | #include "vci_multi_nic.h" |
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30 | #include "vci_block_device_tsar.h" |
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31 | #include "vci_framebuffer.h" |
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32 | #include "vci_multi_dma.h" |
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33 | #include "vci_mem_cache.h" |
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34 | #include "vci_cc_vcache_wrapper.h" |
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35 | |
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36 | namespace soclib { namespace caba { |
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37 | |
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38 | /////////////////////////////////////////////////////////////////////////// |
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39 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
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40 | class TsarXbarCluster |
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41 | /////////////////////////////////////////////////////////////////////////// |
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42 | : public soclib::caba::BaseModule |
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43 | { |
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44 | |
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45 | public: |
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46 | |
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47 | // Ports |
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48 | sc_in<bool> p_clk; |
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49 | sc_in<bool> p_resetn; |
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50 | soclib::caba::DspinOutput<cmd_width> **p_cmd_out; |
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51 | soclib::caba::DspinInput<cmd_width> **p_cmd_in; |
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52 | soclib::caba::DspinOutput<rsp_width> **p_rsp_out; |
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53 | soclib::caba::DspinInput<rsp_width> **p_rsp_in; |
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54 | |
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55 | // interrupt signals |
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56 | sc_signal<bool> signal_false; |
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57 | sc_signal<bool> signal_proc_it[8]; |
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58 | sc_signal<bool> signal_irq_mdma[8]; |
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59 | sc_signal<bool> signal_irq_mtty[23]; |
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60 | sc_signal<bool> signal_irq_mnic_rx[8]; // unused |
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61 | sc_signal<bool> signal_irq_mnic_tx[8]; // unused |
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62 | sc_signal<bool> signal_irq_bdev; |
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63 | |
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64 | // DSPIN signals between DSPIN routers and local_crossbars |
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65 | DspinSignals<cmd_width> signal_dspin_cmd_l2g_d; |
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66 | DspinSignals<cmd_width> signal_dspin_cmd_g2l_d; |
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67 | DspinSignals<cmd_width> signal_dspin_m2p_l2g_c; |
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68 | DspinSignals<cmd_width> signal_dspin_m2p_g2l_c; |
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69 | DspinSignals<rsp_width> signal_dspin_rsp_l2g_d; |
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70 | DspinSignals<rsp_width> signal_dspin_rsp_g2l_d; |
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71 | DspinSignals<rsp_width> signal_dspin_p2m_l2g_c; |
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72 | DspinSignals<rsp_width> signal_dspin_p2m_g2l_c; |
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73 | |
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74 | // Direct VCI signals to VCI/DSPIN wrappers |
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75 | VciSignals<vci_param> signal_vci_ini_proc[8]; |
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76 | VciSignals<vci_param> signal_vci_ini_mdma; |
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77 | VciSignals<vci_param> signal_vci_ini_bdev; |
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78 | |
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79 | VciSignals<vci_param> signal_vci_tgt_memc; |
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80 | VciSignals<vci_param> signal_vci_tgt_xicu; |
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81 | VciSignals<vci_param> signal_vci_tgt_mdma; |
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82 | VciSignals<vci_param> signal_vci_tgt_mtty; |
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83 | VciSignals<vci_param> signal_vci_tgt_bdev; |
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84 | VciSignals<vci_param> signal_vci_tgt_brom; |
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85 | VciSignals<vci_param> signal_vci_tgt_fbuf; |
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86 | VciSignals<vci_param> signal_vci_tgt_mnic; |
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87 | |
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88 | // Direct DSPIN signals to local crossbars |
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89 | DspinSignals<cmd_width> signal_dspin_cmd_proc_i[8]; |
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90 | DspinSignals<rsp_width> signal_dspin_rsp_proc_i[8]; |
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91 | DspinSignals<cmd_width> signal_dspin_cmd_mdma_i; |
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92 | DspinSignals<rsp_width> signal_dspin_rsp_mdma_i; |
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93 | DspinSignals<cmd_width> signal_dspin_cmd_bdev_i; |
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94 | DspinSignals<rsp_width> signal_dspin_rsp_bdev_i; |
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95 | |
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96 | DspinSignals<cmd_width> signal_dspin_cmd_memc_t; |
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97 | DspinSignals<rsp_width> signal_dspin_rsp_memc_t; |
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98 | DspinSignals<cmd_width> signal_dspin_cmd_xicu_t; |
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99 | DspinSignals<rsp_width> signal_dspin_rsp_xicu_t; |
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100 | DspinSignals<cmd_width> signal_dspin_cmd_mdma_t; |
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101 | DspinSignals<rsp_width> signal_dspin_rsp_mdma_t; |
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102 | DspinSignals<cmd_width> signal_dspin_cmd_mtty_t; |
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103 | DspinSignals<rsp_width> signal_dspin_rsp_mtty_t; |
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104 | DspinSignals<cmd_width> signal_dspin_cmd_bdev_t; |
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105 | DspinSignals<rsp_width> signal_dspin_rsp_bdev_t; |
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106 | DspinSignals<cmd_width> signal_dspin_cmd_brom_t; |
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107 | DspinSignals<rsp_width> signal_dspin_rsp_brom_t; |
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108 | DspinSignals<cmd_width> signal_dspin_cmd_fbuf_t; |
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109 | DspinSignals<rsp_width> signal_dspin_rsp_fbuf_t; |
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110 | DspinSignals<cmd_width> signal_dspin_cmd_mnic_t; |
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111 | DspinSignals<rsp_width> signal_dspin_rsp_mnic_t; |
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112 | |
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113 | // Coherence DSPIN signals to local crossbar |
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114 | DspinSignals<cmd_width> signal_dspin_m2p_memc; |
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115 | DspinSignals<rsp_width> signal_dspin_p2m_memc; |
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116 | DspinSignals<cmd_width> signal_dspin_m2p_proc[8]; |
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117 | DspinSignals<rsp_width> signal_dspin_p2m_proc[8]; |
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118 | |
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119 | // external RAM VCI signal |
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120 | VciSignals<vci_param> signal_vci_xram; |
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121 | |
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122 | // Components |
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123 | |
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124 | VciCcVCacheWrapper<vci_param, iss_t>* proc[8]; |
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125 | VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>* wi_proc[4]; |
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126 | |
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127 | VciMemCache<vci_param>* memc; |
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128 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_memc; |
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129 | |
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130 | VciXicu<vci_param>* xicu; |
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131 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_xicu; |
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132 | |
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133 | VciMultiDma<vci_param>* mdma; |
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134 | VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>* wi_mdma; |
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135 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_mdma; |
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136 | |
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137 | VciSimpleRam<vci_param>* xram; |
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138 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_xram; |
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139 | |
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140 | VciSimpleRam<vci_param>* brom; |
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141 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_brom; |
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142 | |
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143 | VciMultiTty<vci_param>* mtty; |
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144 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_mtty; |
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145 | |
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146 | VciFrameBuffer<vci_param>* fbuf; |
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147 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_fbuf; |
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148 | |
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149 | VciMultiNic<vci_param>* mnic; |
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150 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_mnic; |
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151 | |
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152 | VciBlockDeviceTsar<vci_param>* bdev; |
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153 | VciDspinInitiatorWrapper<vci_param,cmd_width,rsp_width>* wi_bdev; |
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154 | VciDspinTargetWrapper<vci_param,cmd_width,rsp_width>* wt_bdev; |
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155 | |
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156 | DspinLocalCrossbar<cmd_width>* xbar_cmd_d; |
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157 | DspinLocalCrossbar<rsp_width>* xbar_rsp_d; |
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158 | DspinLocalCrossbar<cmd_width>* xbar_m2p_c; |
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159 | DspinLocalCrossbar<rsp_width>* xbar_p2m_c; |
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160 | |
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161 | VirtualDspinRouter<cmd_width>* router_cmd; |
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162 | VirtualDspinRouter<rsp_width>* router_rsp; |
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163 | |
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164 | TsarXbarCluster( sc_module_name insname, |
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165 | size_t nb_procs, // number of processors |
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166 | size_t nb_ttys, // number of TTY terminals |
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167 | size_t nb_dmas, // number of DMA channels |
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168 | size_t x, // x coordinate |
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169 | size_t y, // y coordinate |
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170 | size_t cluster, // y + ymax*x |
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171 | const soclib::common::MappingTable &mtd, // direct mapping table |
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172 | const soclib::common::MappingTable &mtx, // xram mapping table |
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173 | size_t x_width, // x field number of bits |
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174 | size_t y_width, // y field number of bits |
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175 | size_t l_width, // l field number of bits |
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176 | size_t tgtid_memc, |
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177 | size_t tgtid_xicu, |
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178 | size_t tgtid_mdma, |
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179 | size_t tgtid_fbuf, |
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180 | size_t tgtid_mtty, |
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181 | size_t tgtid_brom, |
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182 | size_t tgtid_mnic, |
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183 | size_t tgtid_bdev, |
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184 | size_t memc_ways, |
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185 | size_t memc_sets, |
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186 | size_t l1_i_ways, |
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187 | size_t l1_i_sets, |
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188 | size_t l1_d_ways, |
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189 | size_t l1_d_sets, |
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190 | size_t xram_latency, // external ram latency |
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191 | bool io, // I/O cluster if true |
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192 | size_t xfb, // frame buffer pixels |
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193 | size_t yfb, // frame buffer lines |
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194 | char* disk_name, // virtual disk for BDEV |
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195 | size_t block_size, // block size for BDEV |
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196 | size_t nic_channels, // number of channels |
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197 | char* nic_rx_name, // file name rx packets |
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198 | char* nic_tx_name, // file name tx packets |
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199 | uint32_t nic_timeout, // number of cycles |
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200 | const Loader &loader, // loader for BROM |
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201 | uint32_t frozen_cycles, // max frozen cycles |
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202 | uint32_t start_debug_cycle, |
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203 | bool memc_debug_ok, |
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204 | bool proc_debug_ok); |
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205 | |
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206 | ~TsarXbarCluster(); |
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207 | }; |
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208 | }} |
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209 | |
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210 | #endif |
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