[345] | 1 | ////////////////////////////////////////////////////////////////////////////// |
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[378] | 2 | // File: tsar_xbar_cluster.cpp |
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[428] | 3 | // Author: Alain Greiner |
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[345] | 4 | // Copyright: UPMC/LIP6 |
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| 5 | // Date : march 2011 |
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| 6 | // This program is released under the GNU public license |
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| 7 | ////////////////////////////////////////////////////////////////////////////// |
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| 8 | // This file define a TSAR cluster architecture with virtual memory: |
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[428] | 9 | // - It uses two virtual_dspin_router as distributed global interconnect |
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| 10 | // - It uses four dspin_local_crossbar as local interconnect |
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[345] | 11 | // - It uses the vci_cc_vcache_wrapper |
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| 12 | // - It uses the vci_mem_cache |
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| 13 | // - It contains a private RAM with a variable latency to emulate the L3 cache |
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| 14 | // - It can contains 1, 2 or 4 processors |
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| 15 | // - Each processor has a private dma channel (vci_multi_dma) |
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| 16 | // - It uses the vci_xicu interrupt controller |
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[396] | 17 | // - The peripherals MTTY, BDEV, FBUF, MNIC and BROM are in cluster (0,0) |
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[428] | 18 | // - The Multi-TTY component controls up to 15 terminals. |
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[345] | 19 | // - Each Multi-DMA component controls up to 8 DMA channels. |
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| 20 | // - The DMA IRQs are connected to IRQ_IN[8]...IRQ_IN[15] |
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| 21 | // - The TTY IRQs are connected to IRQ_IN[16]...IRQ_IN[30] |
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| 22 | // - The BDEV IRQ is connected to IRQ_IN[31] |
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[428] | 23 | ////////////////////////////////////////////////////////////////////////////////// |
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[345] | 24 | |
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[378] | 25 | #include "../include/tsar_xbar_cluster.h" |
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[345] | 26 | |
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[389] | 27 | |
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[345] | 28 | namespace soclib { |
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| 29 | namespace caba { |
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| 30 | |
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[396] | 31 | //////////////////////////////////////////////////////////////////////////////////// |
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[428] | 32 | template<size_t dspin_cmd_width, |
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[396] | 33 | size_t dspin_rsp_width, |
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| 34 | typename vci_param_int, |
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| 35 | typename vci_param_ext> TsarXbarCluster<dspin_cmd_width, |
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| 36 | dspin_rsp_width, |
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| 37 | vci_param_int, |
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| 38 | vci_param_ext>::TsarXbarCluster( |
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| 39 | //////////////////////////////////////////////////////////////////////////////////// |
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[345] | 40 | sc_module_name insname, |
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| 41 | size_t nb_procs, |
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| 42 | size_t nb_ttys, |
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| 43 | size_t nb_dmas, |
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| 44 | size_t x_id, |
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| 45 | size_t y_id, |
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| 46 | size_t cluster_id, |
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| 47 | const soclib::common::MappingTable &mtd, |
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[428] | 48 | const soclib::common::MappingTable &mtx, |
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[345] | 49 | size_t x_width, |
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| 50 | size_t y_width, |
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| 51 | size_t l_width, |
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| 52 | size_t tgtid_memc, |
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| 53 | size_t tgtid_xicu, |
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| 54 | size_t tgtid_mdma, |
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| 55 | size_t tgtid_fbuf, |
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| 56 | size_t tgtid_mtty, |
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| 57 | size_t tgtid_brom, |
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| 58 | size_t tgtid_mnic, |
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[475] | 59 | size_t tgtid_chbuf, |
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[345] | 60 | size_t tgtid_bdev, |
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[547] | 61 | size_t tgtid_simh, |
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[345] | 62 | size_t memc_ways, |
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| 63 | size_t memc_sets, |
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| 64 | size_t l1_i_ways, |
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| 65 | size_t l1_i_sets, |
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| 66 | size_t l1_d_ways, |
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| 67 | size_t l1_d_sets, |
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| 68 | size_t xram_latency, |
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| 69 | bool io, |
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| 70 | size_t xfb, |
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| 71 | size_t yfb, |
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| 72 | char* disk_name, |
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| 73 | size_t block_size, |
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| 74 | size_t nic_channels, |
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| 75 | char* nic_rx_name, |
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| 76 | char* nic_tx_name, |
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| 77 | uint32_t nic_timeout, |
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[485] | 78 | size_t chbufdma_channels, |
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[345] | 79 | const Loader &loader, |
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| 80 | uint32_t frozen_cycles, |
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| 81 | uint32_t debug_start_cycle, |
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| 82 | bool memc_debug_ok, |
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| 83 | bool proc_debug_ok) |
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| 84 | : soclib::caba::BaseModule(insname), |
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| 85 | p_clk("clk"), |
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| 86 | p_resetn("resetn") |
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| 87 | |
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| 88 | { |
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[508] | 89 | |
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| 90 | n_procs = nb_procs; |
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| 91 | |
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[345] | 92 | // Vectors of ports definition |
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[508] | 93 | p_cmd_in = alloc_elems<DspinInput<dspin_cmd_width> > ("p_cmd_in", 4, 3); |
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| 94 | p_cmd_out = alloc_elems<DspinOutput<dspin_cmd_width> > ("p_cmd_out", 4, 3); |
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| 95 | p_rsp_in = alloc_elems<DspinInput<dspin_rsp_width> > ("p_rsp_in", 4, 2); |
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| 96 | p_rsp_out = alloc_elems<DspinOutput<dspin_rsp_width> > ("p_rsp_out", 4, 2); |
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[345] | 97 | |
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[396] | 98 | ///////////////////////////////////////////////////////////////////////////// |
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[428] | 99 | // Components definition |
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[345] | 100 | ///////////////////////////////////////////////////////////////////////////// |
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| 101 | |
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| 102 | for (size_t p = 0; p < nb_procs; p++) |
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[428] | 103 | { |
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[345] | 104 | std::ostringstream sproc; |
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[396] | 105 | sproc << "proc_" << x_id << "_" << y_id << "_" << p; |
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| 106 | proc[p] = new VciCcVCacheWrapper<vci_param_int, |
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| 107 | dspin_cmd_width, |
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[428] | 108 | dspin_rsp_width, |
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[396] | 109 | GdbServer<Mips32ElIss> >( |
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[345] | 110 | sproc.str().c_str(), |
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[508] | 111 | cluster_id * nb_procs + p, // GLOBAL PROC_ID |
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[428] | 112 | mtd, // Mapping Table |
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[345] | 113 | IntTab(cluster_id,p), // SRCID |
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| 114 | (cluster_id << l_width) + p, // CC_GLOBAL_ID |
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| 115 | 8, // ITLB ways |
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| 116 | 8, // ITLB sets |
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| 117 | 8, // DTLB ways |
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| 118 | 8, // DTLB sets |
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[508] | 119 | l1_i_ways,l1_i_sets, 16, // ICACHE size |
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| 120 | l1_d_ways,l1_d_sets, 16, // DCACHE size |
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[345] | 121 | 4, // WBUF nlines |
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| 122 | 4, // WBUF nwords |
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| 123 | x_width, |
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| 124 | y_width, |
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| 125 | frozen_cycles, // max frozen cycles |
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| 126 | debug_start_cycle, |
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| 127 | proc_debug_ok); |
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| 128 | |
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| 129 | std::ostringstream swip; |
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[435] | 130 | swip << "wi_proc_" << x_id << "_" << y_id << "_" << p; |
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[396] | 131 | wi_proc[p] = new VciDspinInitiatorWrapper<vci_param_int, |
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| 132 | dspin_cmd_width, |
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| 133 | dspin_rsp_width>( |
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[351] | 134 | swip.str().c_str(), |
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[363] | 135 | x_width + y_width + l_width); |
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[345] | 136 | } |
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| 137 | |
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| 138 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 139 | std::ostringstream smemc; |
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| 140 | smemc << "memc_" << x_id << "_" << y_id; |
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| 141 | memc = new VciMemCache<vci_param_int, |
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| 142 | vci_param_ext, |
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| 143 | dspin_rsp_width, |
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| 144 | dspin_cmd_width>( |
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| 145 | smemc.str().c_str(), |
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[345] | 146 | mtd, // Mapping Table direct space |
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| 147 | mtx, // Mapping Table external space |
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| 148 | IntTab(cluster_id), // SRCID external space |
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| 149 | IntTab(cluster_id, tgtid_memc), // TGTID direct space |
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[504] | 150 | x_width, // Number of x bits in platform |
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| 151 | y_width, // Number of y bits in platform |
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[345] | 152 | memc_ways, memc_sets, 16, // CACHE SIZE |
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| 153 | 3, // MAX NUMBER OF COPIES |
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| 154 | 4096, // HEAP SIZE |
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| 155 | 8, // TRANSACTION TABLE DEPTH |
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| 156 | 8, // UPDATE TABLE DEPTH |
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[468] | 157 | 8, // INVALIDATE TABLE DEPTH |
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[345] | 158 | debug_start_cycle, |
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[508] | 159 | memc_debug_ok); |
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[345] | 160 | |
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[396] | 161 | wt_memc = new VciDspinTargetWrapper<vci_param_int, |
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| 162 | dspin_cmd_width, |
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| 163 | dspin_rsp_width>( |
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[379] | 164 | "wt_memc", |
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[363] | 165 | x_width + y_width + l_width); |
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[345] | 166 | |
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| 167 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 168 | std::ostringstream sxram; |
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| 169 | sxram << "xram_" << x_id << "_" << y_id; |
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| 170 | xram = new VciSimpleRam<vci_param_ext>( |
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| 171 | sxram.str().c_str(), |
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[345] | 172 | IntTab(cluster_id), |
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| 173 | mtx, |
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| 174 | loader, |
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| 175 | xram_latency); |
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[379] | 176 | |
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[345] | 177 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 178 | std::ostringstream sxicu; |
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| 179 | sxicu << "xicu_" << x_id << "_" << y_id; |
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| 180 | xicu = new VciXicu<vci_param_int>( |
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| 181 | sxicu.str().c_str(), |
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[345] | 182 | mtd, // mapping table |
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| 183 | IntTab(cluster_id, tgtid_xicu), // TGTID_D |
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[600] | 184 | 32, // number of timer IRQs |
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[345] | 185 | 32, // number of hard IRQs |
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[389] | 186 | 32, // number of soft IRQs |
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[624] | 187 | nb_procs*IRQ_PER_PROCESSOR); // number of output IRQs |
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[345] | 188 | |
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[396] | 189 | wt_xicu = new VciDspinTargetWrapper<vci_param_int, |
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| 190 | dspin_cmd_width, |
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| 191 | dspin_rsp_width>( |
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[379] | 192 | "wt_xicu", |
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[363] | 193 | x_width + y_width + l_width); |
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[345] | 194 | |
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| 195 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 196 | std::ostringstream smdma; |
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| 197 | smdma << "mdma_" << x_id << "_" << y_id; |
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| 198 | mdma = new VciMultiDma<vci_param_int>( |
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| 199 | smdma.str().c_str(), |
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[345] | 200 | mtd, |
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| 201 | IntTab(cluster_id, nb_procs), // SRCID |
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| 202 | IntTab(cluster_id, tgtid_mdma), // TGTID |
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| 203 | 64, // burst size |
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[379] | 204 | nb_dmas); // number of IRQs |
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[345] | 205 | |
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[396] | 206 | wt_mdma = new VciDspinTargetWrapper<vci_param_int, |
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| 207 | dspin_cmd_width, |
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| 208 | dspin_rsp_width>( |
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[379] | 209 | "wt_mdma", |
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[363] | 210 | x_width + y_width + l_width); |
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[345] | 211 | |
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[396] | 212 | wi_mdma = new VciDspinInitiatorWrapper<vci_param_int, |
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| 213 | dspin_cmd_width, |
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| 214 | dspin_rsp_width>( |
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[379] | 215 | "wi_mdma", |
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[363] | 216 | x_width + y_width + l_width); |
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[345] | 217 | |
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| 218 | ///////////////////////////////////////////////////////////////////////////// |
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| 219 | size_t nb_direct_initiators = nb_procs + 1; |
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| 220 | size_t nb_direct_targets = 3; |
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[508] | 221 | if (io) |
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[345] | 222 | { |
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[475] | 223 | nb_direct_initiators = nb_procs + 3; |
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[547] | 224 | nb_direct_targets = 10; |
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[345] | 225 | } |
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| 226 | |
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[396] | 227 | xbar_cmd_d = new DspinLocalCrossbar<dspin_cmd_width>( |
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[379] | 228 | "xbar_cmd_d", |
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[345] | 229 | mtd, // mapping table |
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| 230 | x_id, y_id, // cluster coordinates |
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| 231 | x_width, y_width, l_width, |
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| 232 | nb_direct_initiators, // number of local of sources |
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[435] | 233 | nb_direct_targets, // number of local dests |
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| 234 | 2, 2, // fifo depths |
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| 235 | true, // CMD |
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| 236 | true, // use local routing table |
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| 237 | false ); // no broadcast |
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[345] | 238 | |
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| 239 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 240 | xbar_rsp_d = new DspinLocalCrossbar<dspin_rsp_width>( |
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[379] | 241 | "xbar_rsp_d", |
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[345] | 242 | mtd, // mapping table |
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| 243 | x_id, y_id, // cluster coordinates |
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| 244 | x_width, y_width, l_width, |
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[428] | 245 | nb_direct_targets, // number of local sources |
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[345] | 246 | nb_direct_initiators, // number of local dests |
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[435] | 247 | 2, 2, // fifo depths |
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| 248 | false, // RSP |
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| 249 | false, // don't use local routing table |
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| 250 | false ); // no broadcast |
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[345] | 251 | |
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| 252 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 253 | xbar_m2p_c = new DspinLocalCrossbar<dspin_cmd_width>( |
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[379] | 254 | "xbar_m2p_c", |
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[345] | 255 | mtd, // mapping table |
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| 256 | x_id, y_id, // cluster coordinates |
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| 257 | x_width, y_width, l_width, |
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| 258 | 1, // number of local sources |
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[435] | 259 | nb_procs, // number of local targets |
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[428] | 260 | 2, 2, // fifo depths |
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[435] | 261 | true, // CMD |
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[345] | 262 | false, // don't use local routing table |
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[435] | 263 | true ); // broadcast |
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[345] | 264 | |
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| 265 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 266 | xbar_p2m_c = new DspinLocalCrossbar<dspin_rsp_width>( |
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[379] | 267 | "xbar_p2m_c", |
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[345] | 268 | mtd, // mapping table |
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| 269 | x_id, y_id, // cluster coordinates |
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[379] | 270 | x_width, y_width, 0, // l_width unused on p2m network |
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[345] | 271 | nb_procs, // number of local sources |
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| 272 | 1, // number of local dests |
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[428] | 273 | 2, 2, // fifo depths |
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[435] | 274 | false, // RSP |
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[345] | 275 | false, // don't use local routing table |
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[435] | 276 | false ); // no broadcast |
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[345] | 277 | |
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| 278 | ///////////////////////////////////////////////////////////////////////////// |
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[468] | 279 | xbar_clack_c = new DspinLocalCrossbar<dspin_cmd_width>( |
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| 280 | "xbar_clack_c", |
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| 281 | mtd, // mapping table |
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| 282 | x_id, y_id, // cluster coordinates |
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| 283 | x_width, y_width, l_width, |
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| 284 | 1, // number of local sources |
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| 285 | nb_procs, // number of local targets |
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| 286 | 1, 1, // fifo depths |
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| 287 | true, // CMD |
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| 288 | false, // don't use local routing table |
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| 289 | false); // broadcast |
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| 290 | |
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| 291 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 292 | router_cmd = new VirtualDspinRouter<dspin_cmd_width>( |
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[379] | 293 | "router_cmd", |
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[345] | 294 | x_id,y_id, // coordinate in the mesh |
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| 295 | x_width, y_width, // x & y fields width |
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[468] | 296 | 3, // nb virtual channels |
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[345] | 297 | 4,4); // input & output fifo depths |
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| 298 | |
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| 299 | ///////////////////////////////////////////////////////////////////////////// |
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[396] | 300 | router_rsp = new VirtualDspinRouter<dspin_rsp_width>( |
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[379] | 301 | "router_rsp", |
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[345] | 302 | x_id,y_id, // coordinates in mesh |
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| 303 | x_width, y_width, // x & y fields width |
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[465] | 304 | 2, // nb virtual channels |
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[345] | 305 | 4,4); // input & output fifo depths |
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| 306 | |
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| 307 | // IO cluster components |
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[508] | 308 | if (io) |
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[345] | 309 | { |
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| 310 | ///////////////////////////////////////////// |
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[435] | 311 | brom = new VciSimpleRom<vci_param_int>( |
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[396] | 312 | "brom", |
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| 313 | IntTab(cluster_id, tgtid_brom), |
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| 314 | mtd, |
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| 315 | loader); |
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[345] | 316 | |
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[396] | 317 | wt_brom = new VciDspinTargetWrapper<vci_param_int, |
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| 318 | dspin_cmd_width, |
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| 319 | dspin_rsp_width>( |
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| 320 | "wt_brom", |
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[363] | 321 | x_width + y_width + l_width); |
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[345] | 322 | |
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| 323 | ///////////////////////////////////////////// |
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[396] | 324 | fbuf = new VciFrameBuffer<vci_param_int>( |
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| 325 | "fbuf", |
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| 326 | IntTab(cluster_id, tgtid_fbuf), |
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| 327 | mtd, |
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[428] | 328 | xfb, yfb); |
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[345] | 329 | |
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[396] | 330 | wt_fbuf = new VciDspinTargetWrapper<vci_param_int, |
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| 331 | dspin_cmd_width, |
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| 332 | dspin_rsp_width>( |
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| 333 | "wt_fbuf", |
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[363] | 334 | x_width + y_width + l_width); |
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[345] | 335 | |
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| 336 | ///////////////////////////////////////////// |
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[396] | 337 | bdev = new VciBlockDeviceTsar<vci_param_int>( |
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| 338 | "bdev", |
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| 339 | mtd, |
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[508] | 340 | IntTab(cluster_id, nb_procs + 1), |
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[396] | 341 | IntTab(cluster_id, tgtid_bdev), |
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| 342 | disk_name, |
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| 343 | block_size, |
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| 344 | 64); // burst size |
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[345] | 345 | |
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[396] | 346 | wt_bdev = new VciDspinTargetWrapper<vci_param_int, |
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| 347 | dspin_cmd_width, |
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| 348 | dspin_rsp_width>( |
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| 349 | "wt_bdev", |
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[363] | 350 | x_width + y_width + l_width); |
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[396] | 351 | |
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| 352 | wi_bdev = new VciDspinInitiatorWrapper<vci_param_int, |
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| 353 | dspin_cmd_width, |
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| 354 | dspin_rsp_width>( |
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| 355 | "wi_bdev", |
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[363] | 356 | x_width + y_width + l_width); |
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[345] | 357 | |
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[548] | 358 | int mac = 0xBEEF0000; |
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| 359 | mnic = new VciMultiNic<vci_param_int>( |
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| 360 | "mnic", |
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| 361 | IntTab(cluster_id, tgtid_mnic), |
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| 362 | mtd, |
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| 363 | nic_channels, |
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[619] | 364 | mac, // mac_4 address |
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| 365 | 0xBABE, // mac_2 address |
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[548] | 366 | nic_rx_name, |
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[619] | 367 | nic_tx_name); |
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[345] | 368 | |
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[396] | 369 | wt_mnic = new VciDspinTargetWrapper<vci_param_int, |
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[597] | 370 | dspin_cmd_width, |
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| 371 | dspin_rsp_width>( |
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| 372 | "wt_mnic", |
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| 373 | x_width + y_width + l_width); |
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[345] | 374 | |
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| 375 | ///////////////////////////////////////////// |
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[475] | 376 | chbuf = new VciChbufDma<vci_param_int>( |
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| 377 | "chbuf_dma", |
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| 378 | mtd, |
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| 379 | IntTab(cluster_id, nb_procs + 2), |
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| 380 | IntTab(cluster_id, tgtid_chbuf), |
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| 381 | 64, |
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[485] | 382 | chbufdma_channels); |
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[475] | 383 | |
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| 384 | wt_chbuf = new VciDspinTargetWrapper<vci_param_int, |
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| 385 | dspin_cmd_width, |
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| 386 | dspin_rsp_width>( |
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| 387 | "wt_chbuf", |
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| 388 | x_width + y_width + l_width); |
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| 389 | |
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| 390 | wi_chbuf = new VciDspinInitiatorWrapper<vci_param_int, |
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| 391 | dspin_cmd_width, |
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| 392 | dspin_rsp_width>( |
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| 393 | "wi_chbuf", |
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| 394 | x_width + y_width + l_width); |
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| 395 | |
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| 396 | ///////////////////////////////////////////// |
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[345] | 397 | std::vector<std::string> vect_names; |
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[508] | 398 | for (size_t tid = 0; tid < nb_ttys; tid++) |
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[345] | 399 | { |
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| 400 | std::ostringstream term_name; |
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| 401 | term_name << "term" << tid; |
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| 402 | vect_names.push_back(term_name.str().c_str()); |
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| 403 | } |
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[396] | 404 | mtty = new VciMultiTty<vci_param_int>( |
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| 405 | "mtty", |
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| 406 | IntTab(cluster_id, tgtid_mtty), |
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[428] | 407 | mtd, |
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[396] | 408 | vect_names); |
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[345] | 409 | |
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[396] | 410 | wt_mtty = new VciDspinTargetWrapper<vci_param_int, |
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| 411 | dspin_cmd_width, |
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| 412 | dspin_rsp_width>( |
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| 413 | "wt_mtty", |
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[363] | 414 | x_width + y_width + l_width); |
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[547] | 415 | |
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| 416 | simhelper = new VciSimhelper<vci_param_int>( |
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| 417 | "sim_helper", |
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| 418 | IntTab(cluster_id, tgtid_simh), |
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| 419 | mtd); |
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| 420 | |
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| 421 | wt_simhelper = new VciDspinTargetWrapper<vci_param_int, |
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| 422 | dspin_cmd_width, |
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| 423 | dspin_rsp_width>( |
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| 424 | "wt_simhelper", |
---|
| 425 | x_width + y_width + l_width); |
---|
[345] | 426 | } |
---|
| 427 | |
---|
| 428 | //////////////////////////////////// |
---|
| 429 | // Connections are defined here |
---|
| 430 | //////////////////////////////////// |
---|
| 431 | |
---|
| 432 | //////////////////////// CMD ROUTER and RSP ROUTER |
---|
| 433 | router_cmd->p_clk (this->p_clk); |
---|
| 434 | router_cmd->p_resetn (this->p_resetn); |
---|
| 435 | router_rsp->p_clk (this->p_clk); |
---|
| 436 | router_rsp->p_resetn (this->p_resetn); |
---|
[465] | 437 | |
---|
[508] | 438 | for (int i = 0; i < 4; i++) |
---|
[345] | 439 | { |
---|
[468] | 440 | for (int k = 0; k < 3; k++) |
---|
[345] | 441 | { |
---|
[465] | 442 | router_cmd->p_out[i][k] (this->p_cmd_out[i][k]); |
---|
| 443 | router_cmd->p_in[i][k] (this->p_cmd_in[i][k]); |
---|
[468] | 444 | } |
---|
| 445 | |
---|
| 446 | for (int k = 0; k < 2; k++) |
---|
| 447 | { |
---|
[465] | 448 | router_rsp->p_out[i][k] (this->p_rsp_out[i][k]); |
---|
| 449 | router_rsp->p_in[i][k] (this->p_rsp_in[i][k]); |
---|
[345] | 450 | } |
---|
| 451 | } |
---|
| 452 | |
---|
[465] | 453 | router_cmd->p_out[4][0] (signal_dspin_cmd_g2l_d); |
---|
| 454 | router_cmd->p_out[4][1] (signal_dspin_m2p_g2l_c); |
---|
[468] | 455 | router_cmd->p_out[4][2] (signal_dspin_clack_g2l_c); |
---|
[465] | 456 | router_cmd->p_in[4][0] (signal_dspin_cmd_l2g_d); |
---|
| 457 | router_cmd->p_in[4][1] (signal_dspin_m2p_l2g_c); |
---|
[468] | 458 | router_cmd->p_in[4][2] (signal_dspin_clack_l2g_c); |
---|
[345] | 459 | |
---|
[465] | 460 | router_rsp->p_out[4][0] (signal_dspin_rsp_g2l_d); |
---|
| 461 | router_rsp->p_out[4][1] (signal_dspin_p2m_g2l_c); |
---|
| 462 | router_rsp->p_in[4][0] (signal_dspin_rsp_l2g_d); |
---|
| 463 | router_rsp->p_in[4][1] (signal_dspin_p2m_l2g_c); |
---|
[345] | 464 | |
---|
[468] | 465 | |
---|
[345] | 466 | std::cout << " - CMD & RSP routers connected" << std::endl; |
---|
| 467 | |
---|
| 468 | ///////////////////// CMD DSPIN local crossbar direct |
---|
| 469 | xbar_cmd_d->p_clk (this->p_clk); |
---|
| 470 | xbar_cmd_d->p_resetn (this->p_resetn); |
---|
| 471 | xbar_cmd_d->p_global_out (signal_dspin_cmd_l2g_d); |
---|
| 472 | xbar_cmd_d->p_global_in (signal_dspin_cmd_g2l_d); |
---|
| 473 | |
---|
| 474 | xbar_cmd_d->p_local_out[tgtid_memc] (signal_dspin_cmd_memc_t); |
---|
| 475 | xbar_cmd_d->p_local_out[tgtid_xicu] (signal_dspin_cmd_xicu_t); |
---|
| 476 | xbar_cmd_d->p_local_out[tgtid_mdma] (signal_dspin_cmd_mdma_t); |
---|
| 477 | |
---|
| 478 | xbar_cmd_d->p_local_in[nb_procs] (signal_dspin_cmd_mdma_i); |
---|
| 479 | |
---|
| 480 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 481 | xbar_cmd_d->p_local_in[p] (signal_dspin_cmd_proc_i[p]); |
---|
| 482 | |
---|
[508] | 483 | if (io) |
---|
[345] | 484 | { |
---|
| 485 | xbar_cmd_d->p_local_out[tgtid_mtty] (signal_dspin_cmd_mtty_t); |
---|
| 486 | xbar_cmd_d->p_local_out[tgtid_brom] (signal_dspin_cmd_brom_t); |
---|
| 487 | xbar_cmd_d->p_local_out[tgtid_bdev] (signal_dspin_cmd_bdev_t); |
---|
| 488 | xbar_cmd_d->p_local_out[tgtid_fbuf] (signal_dspin_cmd_fbuf_t); |
---|
| 489 | xbar_cmd_d->p_local_out[tgtid_mnic] (signal_dspin_cmd_mnic_t); |
---|
[508] | 490 | xbar_cmd_d->p_local_out[tgtid_chbuf] (signal_dspin_cmd_chbuf_t); |
---|
[547] | 491 | xbar_cmd_d->p_local_out[tgtid_simh] (signal_dspin_cmd_simh_t); |
---|
[345] | 492 | |
---|
[508] | 493 | xbar_cmd_d->p_local_in[nb_procs + 1] (signal_dspin_cmd_bdev_i); |
---|
| 494 | xbar_cmd_d->p_local_in[nb_procs + 2] (signal_dspin_cmd_chbuf_i); |
---|
[345] | 495 | } |
---|
| 496 | |
---|
| 497 | std::cout << " - Command Direct crossbar connected" << std::endl; |
---|
| 498 | |
---|
| 499 | //////////////////////// RSP DSPIN local crossbar direct |
---|
| 500 | xbar_rsp_d->p_clk (this->p_clk); |
---|
| 501 | xbar_rsp_d->p_resetn (this->p_resetn); |
---|
| 502 | xbar_rsp_d->p_global_out (signal_dspin_rsp_l2g_d); |
---|
| 503 | xbar_rsp_d->p_global_in (signal_dspin_rsp_g2l_d); |
---|
| 504 | |
---|
| 505 | xbar_rsp_d->p_local_in[tgtid_memc] (signal_dspin_rsp_memc_t); |
---|
| 506 | xbar_rsp_d->p_local_in[tgtid_xicu] (signal_dspin_rsp_xicu_t); |
---|
| 507 | xbar_rsp_d->p_local_in[tgtid_mdma] (signal_dspin_rsp_mdma_t); |
---|
| 508 | |
---|
| 509 | xbar_rsp_d->p_local_out[nb_procs] (signal_dspin_rsp_mdma_i); |
---|
| 510 | |
---|
| 511 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 512 | xbar_rsp_d->p_local_out[p] (signal_dspin_rsp_proc_i[p]); |
---|
| 513 | |
---|
[508] | 514 | if (io) |
---|
[345] | 515 | { |
---|
| 516 | xbar_rsp_d->p_local_in[tgtid_mtty] (signal_dspin_rsp_mtty_t); |
---|
| 517 | xbar_rsp_d->p_local_in[tgtid_brom] (signal_dspin_rsp_brom_t); |
---|
| 518 | xbar_rsp_d->p_local_in[tgtid_bdev] (signal_dspin_rsp_bdev_t); |
---|
| 519 | xbar_rsp_d->p_local_in[tgtid_fbuf] (signal_dspin_rsp_fbuf_t); |
---|
| 520 | xbar_rsp_d->p_local_in[tgtid_mnic] (signal_dspin_rsp_mnic_t); |
---|
[508] | 521 | xbar_rsp_d->p_local_in[tgtid_chbuf] (signal_dspin_rsp_chbuf_t); |
---|
[547] | 522 | xbar_rsp_d->p_local_in[tgtid_simh] (signal_dspin_rsp_simh_t); |
---|
[345] | 523 | |
---|
[508] | 524 | xbar_rsp_d->p_local_out[nb_procs + 1] (signal_dspin_rsp_bdev_i); |
---|
| 525 | xbar_rsp_d->p_local_out[nb_procs + 2] (signal_dspin_rsp_chbuf_i); |
---|
[345] | 526 | } |
---|
| 527 | |
---|
| 528 | std::cout << " - Response Direct crossbar connected" << std::endl; |
---|
| 529 | |
---|
| 530 | ////////////////////// M2P DSPIN local crossbar coherence |
---|
| 531 | xbar_m2p_c->p_clk (this->p_clk); |
---|
| 532 | xbar_m2p_c->p_resetn (this->p_resetn); |
---|
| 533 | xbar_m2p_c->p_global_out (signal_dspin_m2p_l2g_c); |
---|
| 534 | xbar_m2p_c->p_global_in (signal_dspin_m2p_g2l_c); |
---|
[360] | 535 | xbar_m2p_c->p_local_in[0] (signal_dspin_m2p_memc); |
---|
[428] | 536 | for (size_t p = 0; p < nb_procs; p++) |
---|
[345] | 537 | xbar_m2p_c->p_local_out[p] (signal_dspin_m2p_proc[p]); |
---|
| 538 | |
---|
| 539 | std::cout << " - M2P Coherence crossbar connected" << std::endl; |
---|
| 540 | |
---|
[468] | 541 | ////////////////////// CLACK DSPIN local crossbar coherence |
---|
| 542 | xbar_clack_c->p_clk (this->p_clk); |
---|
| 543 | xbar_clack_c->p_resetn (this->p_resetn); |
---|
| 544 | xbar_clack_c->p_global_out (signal_dspin_clack_l2g_c); |
---|
| 545 | xbar_clack_c->p_global_in (signal_dspin_clack_g2l_c); |
---|
| 546 | xbar_clack_c->p_local_in[0] (signal_dspin_clack_memc); |
---|
| 547 | for (size_t p = 0; p < nb_procs; p++) |
---|
[508] | 548 | xbar_clack_c->p_local_out[p] (signal_dspin_clack_proc[p]); |
---|
[468] | 549 | |
---|
| 550 | std::cout << " - Clack Coherence crossbar connected" << std::endl; |
---|
| 551 | |
---|
[345] | 552 | ////////////////////////// P2M DSPIN local crossbar coherence |
---|
| 553 | xbar_p2m_c->p_clk (this->p_clk); |
---|
| 554 | xbar_p2m_c->p_resetn (this->p_resetn); |
---|
| 555 | xbar_p2m_c->p_global_out (signal_dspin_p2m_l2g_c); |
---|
| 556 | xbar_p2m_c->p_global_in (signal_dspin_p2m_g2l_c); |
---|
[360] | 557 | xbar_p2m_c->p_local_out[0] (signal_dspin_p2m_memc); |
---|
[428] | 558 | for (size_t p = 0; p < nb_procs; p++) |
---|
[345] | 559 | xbar_p2m_c->p_local_in[p] (signal_dspin_p2m_proc[p]); |
---|
| 560 | |
---|
| 561 | std::cout << " - P2M Coherence crossbar connected" << std::endl; |
---|
| 562 | |
---|
| 563 | |
---|
| 564 | //////////////////////////////////// Processors |
---|
| 565 | for (size_t p = 0; p < nb_procs; p++) |
---|
| 566 | { |
---|
| 567 | proc[p]->p_clk (this->p_clk); |
---|
| 568 | proc[p]->p_resetn (this->p_resetn); |
---|
| 569 | proc[p]->p_vci (signal_vci_ini_proc[p]); |
---|
[468] | 570 | proc[p]->p_dspin_m2p (signal_dspin_m2p_proc[p]); |
---|
| 571 | proc[p]->p_dspin_p2m (signal_dspin_p2m_proc[p]); |
---|
| 572 | proc[p]->p_dspin_clack (signal_dspin_clack_proc[p]); |
---|
[624] | 573 | |
---|
| 574 | for ( size_t i = 0 ; i < IRQ_PER_PROCESSOR ; i++) |
---|
[345] | 575 | { |
---|
[624] | 576 | proc[p]->p_irq[i] (signal_proc_it[p*IRQ_PER_PROCESSOR+i]); |
---|
| 577 | } |
---|
| 578 | for ( size_t j = IRQ_PER_PROCESSOR ; j < 6 ; j++) |
---|
| 579 | { |
---|
[345] | 580 | proc[p]->p_irq[j] (signal_false); |
---|
| 581 | } |
---|
| 582 | |
---|
| 583 | wi_proc[p]->p_clk (this->p_clk); |
---|
| 584 | wi_proc[p]->p_resetn (this->p_resetn); |
---|
| 585 | wi_proc[p]->p_dspin_cmd (signal_dspin_cmd_proc_i[p]); |
---|
| 586 | wi_proc[p]->p_dspin_rsp (signal_dspin_rsp_proc_i[p]); |
---|
| 587 | wi_proc[p]->p_vci (signal_vci_ini_proc[p]); |
---|
| 588 | } |
---|
| 589 | |
---|
| 590 | std::cout << " - Processors connected" << std::endl; |
---|
| 591 | |
---|
| 592 | ///////////////////////////////////// XICU |
---|
[428] | 593 | xicu->p_clk (this->p_clk); |
---|
| 594 | xicu->p_resetn (this->p_resetn); |
---|
| 595 | xicu->p_vci (signal_vci_tgt_xicu); |
---|
[624] | 596 | |
---|
| 597 | for (size_t i = 0; i < nb_procs*IRQ_PER_PROCESSOR; i++) |
---|
[345] | 598 | { |
---|
[624] | 599 | xicu->p_irq[i] (signal_proc_it[i]); |
---|
[345] | 600 | } |
---|
[508] | 601 | for (size_t i = 0; i < 32; i++) |
---|
[345] | 602 | { |
---|
[508] | 603 | if (io) // I/O cluster |
---|
[345] | 604 | { |
---|
| 605 | if (i < 8) xicu->p_hwi[i] (signal_false); |
---|
[508] | 606 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i - 8]); |
---|
[345] | 607 | else if (i < 16) xicu->p_hwi[i] (signal_false); |
---|
[508] | 608 | else if (i < (16 + nb_ttys)) xicu->p_hwi[i] (signal_irq_mtty[i - 16]); |
---|
[602] | 609 | else if (i < 30) xicu->p_hwi[i] (signal_false); |
---|
| 610 | else if (i < 31) xicu->p_hwi[i] (signal_irq_memc); |
---|
[345] | 611 | else xicu->p_hwi[i] (signal_irq_bdev); |
---|
| 612 | } |
---|
| 613 | else // other clusters |
---|
| 614 | { |
---|
| 615 | if (i < 8) xicu->p_hwi[i] (signal_false); |
---|
[508] | 616 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i - 8]); |
---|
[602] | 617 | else if (i < 30) xicu->p_hwi[i] (signal_false); |
---|
| 618 | else if (i < 31) xicu->p_hwi[i] (signal_irq_memc); |
---|
[428] | 619 | else xicu->p_hwi[i] (signal_false); |
---|
[345] | 620 | } |
---|
| 621 | } |
---|
| 622 | |
---|
| 623 | // wrapper XICU |
---|
[360] | 624 | wt_xicu->p_clk (this->p_clk); |
---|
| 625 | wt_xicu->p_resetn (this->p_resetn); |
---|
| 626 | wt_xicu->p_dspin_cmd (signal_dspin_cmd_xicu_t); |
---|
| 627 | wt_xicu->p_dspin_rsp (signal_dspin_rsp_xicu_t); |
---|
| 628 | wt_xicu->p_vci (signal_vci_tgt_xicu); |
---|
[345] | 629 | |
---|
| 630 | std::cout << " - XICU connected" << std::endl; |
---|
| 631 | |
---|
| 632 | //////////////////////////////////////////////// MEMC |
---|
[428] | 633 | memc->p_clk (this->p_clk); |
---|
| 634 | memc->p_resetn (this->p_resetn); |
---|
[602] | 635 | memc->p_irq (signal_irq_memc); |
---|
[428] | 636 | memc->p_vci_ixr (signal_vci_xram); |
---|
| 637 | memc->p_vci_tgt (signal_vci_tgt_memc); |
---|
[468] | 638 | memc->p_dspin_p2m (signal_dspin_p2m_memc); |
---|
| 639 | memc->p_dspin_m2p (signal_dspin_m2p_memc); |
---|
| 640 | memc->p_dspin_clack (signal_dspin_clack_memc); |
---|
[345] | 641 | |
---|
| 642 | // wrapper MEMC |
---|
[360] | 643 | wt_memc->p_clk (this->p_clk); |
---|
| 644 | wt_memc->p_resetn (this->p_resetn); |
---|
| 645 | wt_memc->p_dspin_cmd (signal_dspin_cmd_memc_t); |
---|
| 646 | wt_memc->p_dspin_rsp (signal_dspin_rsp_memc_t); |
---|
| 647 | wt_memc->p_vci (signal_vci_tgt_memc); |
---|
[345] | 648 | |
---|
| 649 | std::cout << " - MEMC connected" << std::endl; |
---|
| 650 | |
---|
| 651 | /////////////////////////////////////////////// XRAM |
---|
[428] | 652 | xram->p_clk (this->p_clk); |
---|
| 653 | xram->p_resetn (this->p_resetn); |
---|
| 654 | xram->p_vci (signal_vci_xram); |
---|
[345] | 655 | |
---|
| 656 | std::cout << " - XRAM connected" << std::endl; |
---|
| 657 | |
---|
[360] | 658 | ////////////////////////////////////////////// MDMA |
---|
[428] | 659 | mdma->p_clk (this->p_clk); |
---|
| 660 | mdma->p_resetn (this->p_resetn); |
---|
| 661 | mdma->p_vci_target (signal_vci_tgt_mdma); |
---|
| 662 | mdma->p_vci_initiator (signal_vci_ini_mdma); |
---|
[508] | 663 | for (size_t i = 0; i < nb_dmas; i++) |
---|
[345] | 664 | mdma->p_irq[i] (signal_irq_mdma[i]); |
---|
| 665 | |
---|
[360] | 666 | // wrapper tgt MDMA |
---|
| 667 | wt_mdma->p_clk (this->p_clk); |
---|
| 668 | wt_mdma->p_resetn (this->p_resetn); |
---|
| 669 | wt_mdma->p_dspin_cmd (signal_dspin_cmd_mdma_t); |
---|
| 670 | wt_mdma->p_dspin_rsp (signal_dspin_rsp_mdma_t); |
---|
| 671 | wt_mdma->p_vci (signal_vci_tgt_mdma); |
---|
| 672 | |
---|
| 673 | // wrapper ini MDMA |
---|
| 674 | wi_mdma->p_clk (this->p_clk); |
---|
| 675 | wi_mdma->p_resetn (this->p_resetn); |
---|
| 676 | wi_mdma->p_dspin_cmd (signal_dspin_cmd_mdma_i); |
---|
| 677 | wi_mdma->p_dspin_rsp (signal_dspin_rsp_mdma_i); |
---|
| 678 | wi_mdma->p_vci (signal_vci_ini_mdma); |
---|
| 679 | |
---|
[345] | 680 | std::cout << " - MDMA connected" << std::endl; |
---|
| 681 | |
---|
[428] | 682 | /////////////////////////////// Components in I/O cluster |
---|
[345] | 683 | |
---|
[508] | 684 | if (io) |
---|
[428] | 685 | { |
---|
| 686 | // BDEV |
---|
| 687 | bdev->p_clk (this->p_clk); |
---|
[345] | 688 | bdev->p_resetn (this->p_resetn); |
---|
| 689 | bdev->p_irq (signal_irq_bdev); |
---|
| 690 | bdev->p_vci_target (signal_vci_tgt_bdev); |
---|
| 691 | bdev->p_vci_initiator (signal_vci_ini_bdev); |
---|
| 692 | |
---|
[360] | 693 | // wrapper tgt BDEV |
---|
| 694 | wt_bdev->p_clk (this->p_clk); |
---|
| 695 | wt_bdev->p_resetn (this->p_resetn); |
---|
| 696 | wt_bdev->p_dspin_cmd (signal_dspin_cmd_bdev_t); |
---|
| 697 | wt_bdev->p_dspin_rsp (signal_dspin_rsp_bdev_t); |
---|
| 698 | wt_bdev->p_vci (signal_vci_tgt_bdev); |
---|
| 699 | |
---|
| 700 | // wrapper ini BDEV |
---|
| 701 | wi_bdev->p_clk (this->p_clk); |
---|
| 702 | wi_bdev->p_resetn (this->p_resetn); |
---|
| 703 | wi_bdev->p_dspin_cmd (signal_dspin_cmd_bdev_i); |
---|
| 704 | wi_bdev->p_dspin_rsp (signal_dspin_rsp_bdev_i); |
---|
| 705 | wi_bdev->p_vci (signal_vci_ini_bdev); |
---|
| 706 | |
---|
[345] | 707 | std::cout << " - BDEV connected" << std::endl; |
---|
| 708 | |
---|
| 709 | // FBUF |
---|
| 710 | fbuf->p_clk (this->p_clk); |
---|
| 711 | fbuf->p_resetn (this->p_resetn); |
---|
| 712 | fbuf->p_vci (signal_vci_tgt_fbuf); |
---|
| 713 | |
---|
[360] | 714 | // wrapper tgt FBUF |
---|
| 715 | wt_fbuf->p_clk (this->p_clk); |
---|
| 716 | wt_fbuf->p_resetn (this->p_resetn); |
---|
| 717 | wt_fbuf->p_dspin_cmd (signal_dspin_cmd_fbuf_t); |
---|
| 718 | wt_fbuf->p_dspin_rsp (signal_dspin_rsp_fbuf_t); |
---|
| 719 | wt_fbuf->p_vci (signal_vci_tgt_fbuf); |
---|
| 720 | |
---|
[345] | 721 | std::cout << " - FBUF connected" << std::endl; |
---|
| 722 | |
---|
| 723 | // MNIC |
---|
| 724 | mnic->p_clk (this->p_clk); |
---|
| 725 | mnic->p_resetn (this->p_resetn); |
---|
| 726 | mnic->p_vci (signal_vci_tgt_mnic); |
---|
[508] | 727 | for (size_t i = 0; i < nic_channels; i++) |
---|
[345] | 728 | { |
---|
[548] | 729 | mnic->p_rx_irq[i] (signal_irq_mnic_rx[i]); |
---|
| 730 | mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); |
---|
[345] | 731 | } |
---|
| 732 | |
---|
[360] | 733 | // wrapper tgt MNIC |
---|
| 734 | wt_mnic->p_clk (this->p_clk); |
---|
| 735 | wt_mnic->p_resetn (this->p_resetn); |
---|
| 736 | wt_mnic->p_dspin_cmd (signal_dspin_cmd_mnic_t); |
---|
| 737 | wt_mnic->p_dspin_rsp (signal_dspin_rsp_mnic_t); |
---|
| 738 | wt_mnic->p_vci (signal_vci_tgt_mnic); |
---|
| 739 | |
---|
[345] | 740 | std::cout << " - MNIC connected" << std::endl; |
---|
| 741 | |
---|
[475] | 742 | // CHBUF |
---|
| 743 | chbuf->p_clk (this->p_clk); |
---|
| 744 | chbuf->p_resetn (this->p_resetn); |
---|
| 745 | chbuf->p_vci_target (signal_vci_tgt_chbuf); |
---|
| 746 | chbuf->p_vci_initiator (signal_vci_ini_chbuf); |
---|
[508] | 747 | for (size_t i = 0; i < chbufdma_channels; i++) |
---|
[475] | 748 | { |
---|
| 749 | chbuf->p_irq[i] (signal_irq_chbuf[i]); |
---|
| 750 | } |
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| 751 | |
---|
| 752 | // wrapper tgt CHBUF |
---|
| 753 | wt_chbuf->p_clk (this->p_clk); |
---|
| 754 | wt_chbuf->p_resetn (this->p_resetn); |
---|
| 755 | wt_chbuf->p_dspin_cmd (signal_dspin_cmd_chbuf_t); |
---|
| 756 | wt_chbuf->p_dspin_rsp (signal_dspin_rsp_chbuf_t); |
---|
| 757 | wt_chbuf->p_vci (signal_vci_tgt_chbuf); |
---|
| 758 | |
---|
| 759 | // wrapper ini CHBUF |
---|
| 760 | wi_chbuf->p_clk (this->p_clk); |
---|
| 761 | wi_chbuf->p_resetn (this->p_resetn); |
---|
| 762 | wi_chbuf->p_dspin_cmd (signal_dspin_cmd_chbuf_i); |
---|
| 763 | wi_chbuf->p_dspin_rsp (signal_dspin_rsp_chbuf_i); |
---|
| 764 | wi_chbuf->p_vci (signal_vci_ini_chbuf); |
---|
| 765 | |
---|
| 766 | std::cout << " - CHBUF connected" << std::endl; |
---|
| 767 | |
---|
[345] | 768 | // BROM |
---|
| 769 | brom->p_clk (this->p_clk); |
---|
| 770 | brom->p_resetn (this->p_resetn); |
---|
| 771 | brom->p_vci (signal_vci_tgt_brom); |
---|
| 772 | |
---|
[360] | 773 | // wrapper tgt BROM |
---|
| 774 | wt_brom->p_clk (this->p_clk); |
---|
| 775 | wt_brom->p_resetn (this->p_resetn); |
---|
| 776 | wt_brom->p_dspin_cmd (signal_dspin_cmd_brom_t); |
---|
| 777 | wt_brom->p_dspin_rsp (signal_dspin_rsp_brom_t); |
---|
| 778 | wt_brom->p_vci (signal_vci_tgt_brom); |
---|
| 779 | |
---|
[345] | 780 | std::cout << " - BROM connected" << std::endl; |
---|
| 781 | |
---|
| 782 | // MTTY |
---|
| 783 | mtty->p_clk (this->p_clk); |
---|
| 784 | mtty->p_resetn (this->p_resetn); |
---|
| 785 | mtty->p_vci (signal_vci_tgt_mtty); |
---|
[508] | 786 | for (size_t i = 0; i < nb_ttys; i++) |
---|
[345] | 787 | { |
---|
[428] | 788 | mtty->p_irq[i] (signal_irq_mtty[i]); |
---|
[345] | 789 | } |
---|
| 790 | |
---|
[360] | 791 | // wrapper tgt MTTY |
---|
| 792 | wt_mtty->p_clk (this->p_clk); |
---|
| 793 | wt_mtty->p_resetn (this->p_resetn); |
---|
| 794 | wt_mtty->p_dspin_cmd (signal_dspin_cmd_mtty_t); |
---|
| 795 | wt_mtty->p_dspin_rsp (signal_dspin_rsp_mtty_t); |
---|
| 796 | wt_mtty->p_vci (signal_vci_tgt_mtty); |
---|
| 797 | |
---|
[547] | 798 | |
---|
| 799 | // Sim Helper |
---|
| 800 | simhelper->p_clk (this->p_clk); |
---|
| 801 | simhelper->p_resetn (this->p_resetn); |
---|
| 802 | simhelper->p_vci (signal_vci_tgt_simh); |
---|
| 803 | |
---|
| 804 | // wrapper tgt Sim Helper |
---|
| 805 | wt_simhelper->p_clk (this->p_clk); |
---|
| 806 | wt_simhelper->p_resetn (this->p_resetn); |
---|
| 807 | wt_simhelper->p_dspin_cmd (signal_dspin_cmd_simh_t); |
---|
| 808 | wt_simhelper->p_dspin_rsp (signal_dspin_rsp_simh_t); |
---|
| 809 | wt_simhelper->p_vci (signal_vci_tgt_simh); |
---|
| 810 | |
---|
[345] | 811 | std::cout << " - MTTY connected" << std::endl; |
---|
| 812 | } |
---|
| 813 | } // end constructor |
---|
| 814 | |
---|
[508] | 815 | |
---|
| 816 | |
---|
| 817 | template<size_t dspin_cmd_width, |
---|
| 818 | size_t dspin_rsp_width, |
---|
| 819 | typename vci_param_int, |
---|
| 820 | typename vci_param_ext> TsarXbarCluster<dspin_cmd_width, |
---|
| 821 | dspin_rsp_width, |
---|
| 822 | vci_param_int, |
---|
| 823 | vci_param_ext>::~TsarXbarCluster() { |
---|
| 824 | |
---|
[512] | 825 | dealloc_elems<DspinInput<dspin_cmd_width> > (p_cmd_in, 4, 3); |
---|
| 826 | dealloc_elems<DspinOutput<dspin_cmd_width> >(p_cmd_out, 4, 3); |
---|
| 827 | dealloc_elems<DspinInput<dspin_rsp_width> > (p_rsp_in, 4, 2); |
---|
| 828 | dealloc_elems<DspinOutput<dspin_rsp_width> >(p_rsp_out, 4, 2); |
---|
| 829 | |
---|
[508] | 830 | for (size_t p = 0; p < n_procs; p++) |
---|
| 831 | { |
---|
| 832 | delete proc[p]; |
---|
| 833 | delete wi_proc[p]; |
---|
| 834 | } |
---|
| 835 | |
---|
| 836 | delete memc; |
---|
| 837 | delete wt_memc; |
---|
| 838 | delete xram; |
---|
| 839 | delete xicu; |
---|
| 840 | delete wt_xicu; |
---|
| 841 | delete mdma; |
---|
| 842 | delete wt_mdma; |
---|
| 843 | delete wi_mdma; |
---|
| 844 | delete xbar_cmd_d; |
---|
| 845 | delete xbar_rsp_d; |
---|
| 846 | delete xbar_m2p_c; |
---|
| 847 | delete xbar_p2m_c; |
---|
| 848 | delete xbar_clack_c; |
---|
| 849 | delete router_cmd; |
---|
| 850 | delete router_rsp; |
---|
| 851 | if (brom != NULL) |
---|
| 852 | { |
---|
| 853 | delete brom; |
---|
| 854 | delete wt_brom; |
---|
| 855 | delete fbuf; |
---|
| 856 | delete wt_fbuf; |
---|
| 857 | delete bdev; |
---|
| 858 | delete wt_bdev; |
---|
| 859 | delete wi_bdev; |
---|
| 860 | delete mnic; |
---|
| 861 | delete wt_mnic; |
---|
| 862 | delete chbuf; |
---|
| 863 | delete wt_chbuf; |
---|
| 864 | delete wi_chbuf; |
---|
| 865 | delete mtty; |
---|
| 866 | delete wt_mtty; |
---|
[547] | 867 | delete simhelper; |
---|
| 868 | delete wt_simhelper; |
---|
[508] | 869 | } |
---|
| 870 | } |
---|
| 871 | |
---|
| 872 | |
---|
[396] | 873 | }} |
---|
[345] | 874 | |
---|
| 875 | // Local Variables: |
---|
[508] | 876 | // tab-width: 4 |
---|
| 877 | // c-basic-offset: 4 |
---|
[345] | 878 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
| 879 | // indent-tabs-mode: nil |
---|
| 880 | // End: |
---|
| 881 | |
---|
[508] | 882 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|
[345] | 883 | |
---|
| 884 | |
---|
| 885 | |
---|