[957] | 1 | ////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File: tsar_fpga_cluster.cpp |
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| 3 | // Author: Alain Greiner |
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| 4 | // Copyright: UPMC/LIP6 |
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| 5 | // Date : february 2014 |
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| 6 | // This program is released under the GNU public license |
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| 7 | ////////////////////////////////////////////////////////////////////////////// |
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| 8 | |
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| 9 | #include "../include/tsar_fpga_cluster.h" |
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| 10 | |
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| 11 | namespace soclib { |
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| 12 | namespace caba { |
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| 13 | |
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| 14 | //////////////////////////////////////////////////////////////////////////////////// |
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| 15 | template<size_t dspin_cmd_width, |
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| 16 | size_t dspin_rsp_width, |
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| 17 | typename vci_param_int, |
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| 18 | typename vci_param_ext> TsarFpgaCluster<dspin_cmd_width, |
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| 19 | dspin_rsp_width, |
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| 20 | vci_param_int, |
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| 21 | vci_param_ext>::TsarFpgaCluster( |
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| 22 | //////////////////////////////////////////////////////////////////////// |
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| 23 | sc_module_name insname, |
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| 24 | size_t nb_procs, |
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| 25 | const soclib::common::MappingTable &mtd, |
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| 26 | const soclib::common::MappingTable &mtx, |
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| 27 | uint32_t reset_address, |
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| 28 | size_t x_width, size_t y_width, size_t l_width, |
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| 29 | size_t tgtid_memc, |
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| 30 | size_t tgtid_xicu, |
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| 31 | size_t tgtid_mtty, |
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| 32 | size_t tgtid_bdev, |
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| 33 | size_t tgtid_xrom, |
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| 34 | const char* disk_pathname, |
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| 35 | size_t memc_ways, size_t memc_sets, |
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| 36 | size_t l1_i_ways, size_t l1_i_sets, |
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| 37 | size_t l1_d_ways, size_t l1_d_sets, |
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| 38 | size_t xram_latency, |
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| 39 | const Loader &loader, |
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| 40 | uint32_t frozen_cycles, |
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| 41 | uint32_t trace_start_cycle, |
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| 42 | bool trace_proc_ok, uint32_t trace_proc_id, |
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| 43 | bool trace_memc_ok ) |
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| 44 | : soclib::caba::BaseModule(insname), |
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| 45 | m_nprocs(nb_procs), |
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| 46 | p_clk("clk"), |
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| 47 | p_resetn("resetn") |
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| 48 | |
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| 49 | { |
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| 50 | ///////////////////////////////////////////////////////////////////////////// |
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| 51 | // Components definition and allocation |
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| 52 | ///////////////////////////////////////////////////////////////////////////// |
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| 53 | |
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| 54 | // The processor is a MIPS32 wrapped in the GDB server |
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| 55 | // the reset address is defined by the reset_address argument |
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| 56 | typedef GdbServer<Mips32ElIss> mips_iss; |
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| 57 | mips_iss::setResetAddress( reset_address ); |
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| 58 | |
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| 59 | for (size_t p = 0; p < nb_procs; p++) |
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| 60 | { |
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| 61 | bool trace_ok = trace_proc_ok and (trace_proc_id == p); |
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| 62 | |
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| 63 | std::ostringstream sproc; |
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| 64 | sproc << "proc_" << p; |
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| 65 | proc[p] = new VciCcVCacheWrapper<vci_param_int, |
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| 66 | dspin_cmd_width, dspin_rsp_width, |
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| 67 | mips_iss > ( |
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| 68 | sproc.str().c_str(), |
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| 69 | p, // GLOBAL PROC_ID |
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| 70 | mtd, // Mapping Table |
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| 71 | IntTab(0,p), // SRCID |
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| 72 | p, // GLOBAL_CC_ID |
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| 73 | 8, 8, // ITLB ways & sets |
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| 74 | 8, 8, // DTLB ways & sets |
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| 75 | l1_i_ways, l1_i_sets, 16, // ICACHE size |
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| 76 | l1_d_ways, l1_d_sets, 16, // DCACHE size |
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| 77 | 4, 4, // WBUF lines & words |
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| 78 | x_width, y_width, |
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| 79 | frozen_cycles, // max frozen cycles |
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| 80 | trace_start_cycle, trace_ok ); |
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| 81 | } |
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| 82 | |
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| 83 | ///////////////////////////////////////////////////////////////////////////// |
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| 84 | memc = new VciMemCache<vci_param_int, vci_param_ext, |
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| 85 | dspin_rsp_width, dspin_cmd_width>( |
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| 86 | "memc", |
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| 87 | mtd, // Mapping Table direct space |
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| 88 | mtx, // Mapping Table external space |
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| 89 | IntTab(0), // SRCID external space |
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| 90 | IntTab(0, tgtid_memc), // TGTID direct space |
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| 91 | x_width, y_width, // Number of x,y bits in platform |
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| 92 | memc_ways, memc_sets, 16, // CACHE SIZE |
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| 93 | 3, // MAX NUMBER OF COPIES |
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| 94 | 4096, // HEAP SIZE |
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| 95 | 8, 8, 8, // TRT, UPT, IVT DEPTH |
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| 96 | trace_start_cycle, |
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| 97 | trace_memc_ok ); |
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| 98 | |
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| 99 | ///////////////////////////////////////////////////////////////////////////// |
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| 100 | std::ostringstream sxram; |
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| 101 | xram = new VciSimpleRam<vci_param_ext>( |
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| 102 | "xram", |
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| 103 | IntTab(0), |
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| 104 | mtx, |
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| 105 | loader, |
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| 106 | xram_latency); |
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| 107 | |
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| 108 | ///////////////////////////////////////////////////////////////////////////// |
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| 109 | std::ostringstream sxicu; |
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| 110 | xicu = new VciXicu<vci_param_int>( |
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| 111 | "xicu", |
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| 112 | mtd, // mapping table |
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| 113 | IntTab(0, tgtid_xicu), // TGTID_D |
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| 114 | 16, // number of timer IRQs |
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| 115 | 16, // number of hard IRQs |
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| 116 | 16, // number of soft IRQs |
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| 117 | 16 ); // number of output IRQs |
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| 118 | |
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| 119 | ///////////////////////////////////////////////////////////////////////////// |
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| 120 | size_t nb_initiators = nb_procs + 1; |
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| 121 | size_t nb_targets = 5; |
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| 122 | |
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| 123 | std::ostringstream s_xbar_cmd; |
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| 124 | xbar_cmd = new VciLocalCrossbar<vci_param_int>( |
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| 125 | s_xbar_cmd.str().c_str(), |
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| 126 | mtd, // mapping table |
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| 127 | 0, // cluster id |
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| 128 | nb_initiators, // number of local initiators |
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| 129 | nb_targets, // number of local targets |
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| 130 | 0 ); // default target |
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| 131 | |
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| 132 | wi_gate = new VciDspinInitiatorWrapper<vci_param_int, |
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| 133 | dspin_cmd_width, dspin_rsp_width>( |
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| 134 | "wi_gate", |
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| 135 | x_width + y_width + l_width); |
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| 136 | |
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| 137 | wt_gate = new VciDspinTargetWrapper<vci_param_int, |
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| 138 | dspin_cmd_width, dspin_rsp_width>( |
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| 139 | "wt_gate", |
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| 140 | x_width + y_width + l_width); |
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| 141 | |
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| 142 | ///////////////////////////////////////////////////////////////////////////// |
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| 143 | xbar_m2p = new DspinLocalCrossbar<dspin_cmd_width>( |
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| 144 | "xbar_m2p", |
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| 145 | mtd, // mapping table |
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| 146 | 0, 0, // cluster coordinates |
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| 147 | x_width, y_width, l_width, |
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| 148 | 1, // number of local sources |
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| 149 | nb_procs, // number of local dests |
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| 150 | 2, 2, // fifo depths |
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| 151 | true, // CMD |
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| 152 | false, // don't use local routing table |
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| 153 | true ); // broadcast |
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| 154 | |
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| 155 | ///////////////////////////////////////////////////////////////////////////// |
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| 156 | xbar_p2m = new DspinLocalCrossbar<dspin_rsp_width>( |
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| 157 | "xbar_p2m", |
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| 158 | mtd, // mapping table |
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| 159 | 0, 0, // cluster coordinates |
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| 160 | x_width, y_width, 0, // l_width unused on p2m network |
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| 161 | nb_procs, // number of local sources |
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| 162 | 1, // number of local dests |
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| 163 | 2, 2, // fifo depths |
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| 164 | false, // RSP |
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| 165 | false, // don't use local routing table |
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| 166 | false ); // no broadcast |
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| 167 | |
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| 168 | ///////////////////////////////////////////////////////////////////////////// |
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| 169 | xbar_cla = new DspinLocalCrossbar<dspin_cmd_width>( |
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| 170 | "xbar_cla", |
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| 171 | mtd, // mapping table |
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| 172 | 0, 0, // cluster coordinates |
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| 173 | x_width, y_width, l_width, |
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| 174 | 1, // number of local sources |
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| 175 | nb_procs, // number of local dests |
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| 176 | 2, 2, // fifo depths |
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| 177 | true, // CMD |
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| 178 | false, // don't use local routing table |
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| 179 | false ); // no broadcast |
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| 180 | |
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| 181 | ///////////////////////////////////////////// |
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| 182 | bdev = new VciBlockDeviceTsar<vci_param_int>( |
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| 183 | "bdev", |
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| 184 | mtd, |
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| 185 | IntTab(0, nb_procs), |
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| 186 | IntTab(0, tgtid_bdev), |
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| 187 | disk_pathname, |
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| 188 | 512, |
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| 189 | 64 ); // burst size |
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| 190 | |
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| 191 | ///////////////////////////////////////////// |
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| 192 | mtty = new VciMultiTty<vci_param_int>( |
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| 193 | "mtty", |
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| 194 | IntTab(0, tgtid_mtty), |
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| 195 | mtd, |
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| 196 | "tty", NULL ); |
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| 197 | |
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| 198 | ///////////////////////////////////////////// |
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| 199 | xrom = new VciSimpleRom<vci_param_int>( |
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| 200 | "xrom", |
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| 201 | IntTab(0, tgtid_xrom), |
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| 202 | mtd, |
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| 203 | loader, |
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| 204 | 0 ); |
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| 205 | |
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| 206 | std::cout << std::endl; |
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| 207 | |
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| 208 | //////////////////////////////////// |
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| 209 | // Connections are defined here |
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| 210 | //////////////////////////////////// |
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| 211 | |
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| 212 | // CMD DSPIN local crossbar direct |
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| 213 | xbar_cmd->p_clk(this->p_clk); |
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| 214 | xbar_cmd->p_resetn(this->p_resetn); |
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| 215 | xbar_cmd->p_initiator_to_up(signal_vci_l2g); |
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| 216 | xbar_cmd->p_target_to_up(signal_vci_g2l); |
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| 217 | |
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| 218 | xbar_cmd->p_to_target[tgtid_memc](signal_vci_tgt_memc); |
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| 219 | xbar_cmd->p_to_target[tgtid_xicu](signal_vci_tgt_xicu); |
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| 220 | xbar_cmd->p_to_target[tgtid_mtty](signal_vci_tgt_mtty); |
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| 221 | xbar_cmd->p_to_target[tgtid_bdev](signal_vci_tgt_bdev); |
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| 222 | xbar_cmd->p_to_target[tgtid_xrom](signal_vci_tgt_xrom); |
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| 223 | |
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| 224 | for (size_t p = 0; p < nb_procs; p++) |
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| 225 | { |
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| 226 | xbar_cmd->p_to_initiator[p](signal_vci_ini_proc[p]); |
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| 227 | } |
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| 228 | xbar_cmd->p_to_initiator[nb_procs](signal_vci_ini_bdev); |
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| 229 | |
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| 230 | wi_gate->p_clk(this->p_clk); |
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| 231 | wi_gate->p_resetn(this->p_resetn); |
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| 232 | wi_gate->p_vci(signal_vci_l2g); |
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| 233 | wi_gate->p_dspin_cmd(p_cmd_out); |
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| 234 | wi_gate->p_dspin_rsp(p_rsp_in); |
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| 235 | |
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| 236 | wt_gate->p_clk(this->p_clk); |
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| 237 | wt_gate->p_resetn(this->p_resetn); |
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| 238 | wt_gate->p_vci(signal_vci_g2l); |
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| 239 | wt_gate->p_dspin_cmd(p_cmd_in); |
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| 240 | wt_gate->p_dspin_rsp(p_rsp_out); |
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| 241 | |
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| 242 | std::cout << " - CMD & RSP Direct crossbar connected" << std::endl; |
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| 243 | |
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| 244 | // M2P DSPIN local crossbar coherence |
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| 245 | xbar_m2p->p_clk(this->p_clk); |
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| 246 | xbar_m2p->p_resetn(this->p_resetn); |
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| 247 | xbar_m2p->p_global_out(p_m2p_out); |
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| 248 | xbar_m2p->p_global_in(p_m2p_in); |
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| 249 | xbar_m2p->p_local_in[0](signal_dspin_m2p_memc); |
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| 250 | for (size_t p = 0; p < nb_procs; p++) |
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| 251 | xbar_m2p->p_local_out[p](signal_dspin_m2p_proc[p]); |
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| 252 | |
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| 253 | std::cout << " - M2P Coherence crossbar connected" << std::endl; |
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| 254 | |
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| 255 | ////////////////////////// P2M DSPIN local crossbar coherence |
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| 256 | xbar_p2m->p_clk(this->p_clk); |
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| 257 | xbar_p2m->p_resetn(this->p_resetn); |
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| 258 | xbar_p2m->p_global_out(p_p2m_out); |
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| 259 | xbar_p2m->p_global_in(p_p2m_in); |
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| 260 | xbar_p2m->p_local_out[0](signal_dspin_p2m_memc); |
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| 261 | for (size_t p = 0; p < nb_procs; p++) |
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| 262 | xbar_p2m->p_local_in[p](signal_dspin_p2m_proc[p]); |
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| 263 | |
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| 264 | std::cout << " - P2M Coherence crossbar connected" << std::endl; |
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| 265 | |
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| 266 | ////////////////////// CLACK DSPIN local crossbar coherence |
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| 267 | xbar_cla->p_clk(this->p_clk); |
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| 268 | xbar_cla->p_resetn(this->p_resetn); |
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| 269 | xbar_cla->p_global_out(p_cla_out); |
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| 270 | xbar_cla->p_global_in(p_cla_in); |
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| 271 | xbar_cla->p_local_in[0](signal_dspin_clack_memc); |
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| 272 | for (size_t p = 0; p < nb_procs; p++) |
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| 273 | xbar_cla->p_local_out[p](signal_dspin_clack_proc[p]); |
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| 274 | |
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| 275 | std::cout << " - CLA Coherence crossbar connected" << std::endl; |
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| 276 | |
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| 277 | //////////////////////////////////// Processors |
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| 278 | for (size_t p = 0; p < nb_procs; p++) |
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| 279 | { |
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| 280 | proc[p]->p_clk(this->p_clk); |
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| 281 | proc[p]->p_resetn(this->p_resetn); |
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| 282 | proc[p]->p_vci(signal_vci_ini_proc[p]); |
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| 283 | proc[p]->p_dspin_m2p(signal_dspin_m2p_proc[p]); |
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| 284 | proc[p]->p_dspin_p2m(signal_dspin_p2m_proc[p]); |
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| 285 | proc[p]->p_dspin_clack(signal_dspin_clack_proc[p]); |
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| 286 | |
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| 287 | for ( size_t j = 0 ; j < 6 ; j++) |
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| 288 | { |
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| 289 | if ( j < 4 ) proc[p]->p_irq[j](signal_proc_irq[4*p + j]); |
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| 290 | else proc[p]->p_irq[j](signal_false); |
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| 291 | } |
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| 292 | } |
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| 293 | |
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| 294 | std::cout << " - Processors connected" << std::endl; |
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| 295 | |
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| 296 | ///////////////////////////////////// XICU |
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| 297 | xicu->p_clk(this->p_clk); |
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| 298 | xicu->p_resetn(this->p_resetn); |
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| 299 | xicu->p_vci(signal_vci_tgt_xicu); |
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| 300 | |
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| 301 | for (size_t i = 0 ; i < 16 ; i++) |
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| 302 | { |
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| 303 | xicu->p_irq[i](signal_proc_irq[i]); |
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| 304 | } |
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| 305 | |
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| 306 | for (size_t i = 0; i < 16; i++) |
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| 307 | { |
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| 308 | if (i == 8) xicu->p_hwi[i] (signal_irq_memc); |
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| 309 | else if (i == 9) xicu->p_hwi[i] (signal_irq_bdev); |
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| 310 | else if (i == 10) xicu->p_hwi[i] (signal_irq_mtty); |
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| 311 | else xicu->p_hwi[i] (signal_false); |
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| 312 | } |
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| 313 | |
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| 314 | std::cout << " - XICU connected" << std::endl; |
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| 315 | |
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| 316 | // MEMC |
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| 317 | memc->p_clk(this->p_clk); |
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| 318 | memc->p_resetn(this->p_resetn); |
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| 319 | memc->p_irq(signal_irq_memc); |
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| 320 | memc->p_vci_ixr(signal_vci_xram); |
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| 321 | memc->p_vci_tgt(signal_vci_tgt_memc); |
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| 322 | memc->p_dspin_p2m(signal_dspin_p2m_memc); |
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| 323 | memc->p_dspin_m2p(signal_dspin_m2p_memc); |
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| 324 | memc->p_dspin_clack(signal_dspin_clack_memc); |
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| 325 | |
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| 326 | std::cout << " - MEMC connected" << std::endl; |
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| 327 | |
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| 328 | // XRAM |
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| 329 | xram->p_clk(this->p_clk); |
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| 330 | xram->p_resetn(this->p_resetn); |
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| 331 | xram->p_vci(signal_vci_xram); |
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| 332 | |
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| 333 | std::cout << " - XRAM connected" << std::endl; |
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| 334 | |
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| 335 | // BDEV |
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| 336 | bdev->p_clk(this->p_clk); |
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| 337 | bdev->p_resetn(this->p_resetn); |
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| 338 | bdev->p_irq(signal_irq_bdev); |
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| 339 | bdev->p_vci_target(signal_vci_tgt_bdev); |
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| 340 | bdev->p_vci_initiator(signal_vci_ini_bdev); |
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| 341 | |
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| 342 | std::cout << " - BDEV connected" << std::endl; |
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| 343 | |
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| 344 | // MTTY (single channel) |
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| 345 | mtty->p_clk(this->p_clk); |
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| 346 | mtty->p_resetn(this->p_resetn); |
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| 347 | mtty->p_vci(signal_vci_tgt_mtty); |
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| 348 | mtty->p_irq[0](signal_irq_mtty); |
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| 349 | |
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| 350 | std::cout << " - MTTY connected" << std::endl; |
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| 351 | |
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| 352 | // XROM |
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| 353 | xrom->p_clk(this->p_clk); |
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| 354 | xrom->p_resetn(this->p_resetn); |
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| 355 | xrom->p_vci(signal_vci_tgt_xrom); |
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| 356 | |
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| 357 | std::cout << " - XROM connected" << std::endl; |
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| 358 | } // end constructor |
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| 359 | |
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| 360 | template<size_t dspin_cmd_width, size_t dspin_rsp_width, |
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| 361 | typename vci_param_int, typename vci_param_ext> |
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| 362 | TsarFpgaCluster<dspin_cmd_width, dspin_rsp_width, |
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| 363 | vci_param_int, vci_param_ext>::~TsarFpgaCluster() |
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| 364 | { |
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| 365 | for (size_t p = 0; p < m_nprocs ; p++) |
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| 366 | { |
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| 367 | if ( proc[p] ) delete proc[p]; |
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| 368 | } |
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| 369 | |
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| 370 | delete memc; |
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| 371 | delete xram; |
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| 372 | delete xicu; |
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| 373 | delete xbar_cmd; |
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| 374 | delete xbar_m2p; |
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| 375 | delete xbar_p2m; |
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| 376 | delete xbar_cla; |
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| 377 | delete wi_gate; |
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| 378 | delete wt_gate; |
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| 379 | delete bdev; |
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| 380 | delete mtty; |
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| 381 | delete xrom; |
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| 382 | } |
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| 383 | |
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| 384 | }} |
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| 385 | |
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| 386 | // Local Variables: |
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| 387 | // tab-width: 4 |
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| 388 | // c-basic-offset: 4 |
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| 389 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 390 | // indent-tabs-mode: nil |
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| 391 | // End: |
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| 392 | |
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| 393 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 394 | |
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| 395 | |
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| 396 | |
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