[516] | 1 | |
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| 2 | #include <systemc> |
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| 3 | #include <sys/time.h> |
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| 4 | #include <iostream> |
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| 5 | #include <cstdlib> |
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| 6 | #include <cstdarg> |
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| 7 | #ifdef _OPENMP |
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| 8 | #include <omp.h> |
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| 9 | #endif |
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| 10 | |
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| 11 | #include "mapping_table.h" |
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| 12 | #include "mips32.h" |
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| 13 | #include "vci_simple_ram.h" |
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| 14 | #include "vci_multi_tty.h" |
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| 15 | #include "vci_mem_cache.h" |
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| 16 | #include "vci_cc_vcache_wrapper.h" |
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| 17 | #include "vci_logger.h" |
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| 18 | #include "vci_xicu.h" |
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| 19 | #include "vci_multi_dma.h" |
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| 20 | #include "vci_simhelper.h" |
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| 21 | #include "dspin_local_crossbar.h" |
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| 22 | #include "vci_dspin_initiator_wrapper.h" |
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| 23 | #include "vci_dspin_target_wrapper.h" |
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| 24 | |
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| 25 | // Define VCI parameters |
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| 26 | #define cell_width 4 |
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| 27 | #define cell_width_ext 8 |
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| 28 | #define address_width 32 |
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| 29 | #define plen_width 8 |
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| 30 | #define error_width 1 |
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| 31 | #define clen_width 1 |
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| 32 | #define rflag_width 1 |
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| 33 | #define srcid_width 14 |
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| 34 | #define pktid_width 4 |
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| 35 | #define trdid_width 4 |
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| 36 | #define wrplen_width 1 |
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| 37 | |
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| 38 | #define dspin_cmd_width 39 |
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| 39 | #define dspin_rsp_width 32 |
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| 40 | // segments definition in direct space |
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| 41 | |
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| 42 | #define XICU_BASE 0xd8200000 |
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| 43 | #define XICU_SIZE 0x00001000 |
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| 44 | |
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| 45 | #define MDMA_BASE 0xe8000000 |
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| 46 | #define MDMA_SIZE 0x00000014 |
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| 47 | |
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| 48 | #define MTTY_BASE 0xd0200000 |
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| 49 | #define MTTY_SIZE 0x00000010 |
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| 50 | |
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| 51 | #define EXIT_BASE 0xe0000000 |
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| 52 | #define EXIT_SIZE 0x00000010 |
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| 53 | |
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| 54 | #define BOOT_BASE 0xbfc00000 |
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| 55 | #define BOOT_SIZE 0x00040000 |
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| 56 | |
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| 57 | #define MEMC_BASE 0x00000000 |
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| 58 | #define MEMC_SIZE 0x02000000 |
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| 59 | |
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| 60 | int _main(int argc, char *argv[]) |
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| 61 | { |
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| 62 | using namespace sc_core; |
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| 63 | // Avoid repeating these everywhere |
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| 64 | using soclib::common::IntTab; |
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| 65 | using soclib::common::Segment; |
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| 66 | using namespace soclib::caba; |
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| 67 | #ifdef _OPENMP |
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| 68 | omp_set_dynamic(false); |
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| 69 | omp_set_num_threads(1); |
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| 70 | std::cerr << "Built with openmp version " << _OPENMP << std::endl; |
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| 71 | #endif |
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| 72 | char soft_name[256] = "test.elf"; // pathname to binary code |
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| 73 | size_t ncycles = 1000000000; // max number of simulation cycles |
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| 74 | |
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| 75 | bool trace_ok = false; |
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| 76 | size_t from_cycle = 0; // debug start cycle |
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| 77 | size_t max_frozen = 100000; // max number of frozen cycles |
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| 78 | |
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| 79 | /////////////// command line arguments //////////////// |
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| 80 | if (argc > 1) |
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| 81 | { |
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| 82 | for( int n=1 ; n<argc ; n=n+2 ) |
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| 83 | { |
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| 84 | if( (strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc) ) |
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| 85 | { |
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| 86 | ncycles = atoi(argv[n+1]); |
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| 87 | } |
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| 88 | else if( (strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) ) |
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| 89 | { |
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| 90 | strcpy(soft_name, argv[n+1]); |
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| 91 | } |
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| 92 | else if( (strcmp(argv[n],"-TRACE") == 0) && (n+1<argc) ) |
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| 93 | { |
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| 94 | trace_ok = true; |
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| 95 | from_cycle = atoi(argv[n+1]); |
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| 96 | } |
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| 97 | else if( (strcmp(argv[n],"-MAXFROZEN") == 0) && (n+1<argc) ) |
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| 98 | { |
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| 99 | max_frozen = atoi(argv[n+1]); |
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| 100 | } |
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| 101 | else |
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| 102 | { |
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| 103 | std::cout << " Arguments on the command line are (key,value) couples." << std::endl; |
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| 104 | std::cout << " The order is not important." << std::endl; |
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| 105 | std::cout << " Accepted arguments are :" << std::endl << std::endl; |
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| 106 | std::cout << " -SOFT pathname_for_embedded_soft" << std::endl; |
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| 107 | std::cout << " -NCYCLES number_of_simulated_cycles" << std::endl; |
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| 108 | std::cout << " -TRACE debug_start_cycle" << std::endl; |
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| 109 | exit(0); |
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| 110 | } |
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| 111 | } |
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| 112 | } |
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| 113 | |
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| 114 | typedef soclib::caba::VciParams<cell_width, |
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| 115 | plen_width, |
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| 116 | address_width, |
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| 117 | error_width, |
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| 118 | clen_width, |
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| 119 | rflag_width, |
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| 120 | srcid_width, |
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| 121 | pktid_width, |
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| 122 | trdid_width, |
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| 123 | wrplen_width> vci_param; |
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| 124 | typedef soclib::caba::VciParams<cell_width_ext, |
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| 125 | plen_width, |
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| 126 | address_width, |
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| 127 | error_width, |
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| 128 | clen_width, |
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| 129 | rflag_width, |
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| 130 | srcid_width, |
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| 131 | pktid_width, |
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| 132 | trdid_width, |
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| 133 | wrplen_width> vci_param_ext; |
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| 134 | typedef soclib::common::Mips32ElIss proc_iss; |
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| 135 | |
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| 136 | // Direct DSPIN signals to local crossbars |
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| 137 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_proc0_i; |
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| 138 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_proc0_i; |
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| 139 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_dma_i; |
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| 140 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_dma_i; |
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| 141 | |
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| 142 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_memc_t; |
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| 143 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_memc_t; |
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| 144 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_xicu_t; |
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| 145 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_xicu_t; |
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| 146 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_dma_t; |
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| 147 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_dma_t; |
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| 148 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_tty_t; |
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| 149 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_tty_t; |
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| 150 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_rom_t; |
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| 151 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_rom_t; |
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| 152 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_simh_t; |
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| 153 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_simh_t; |
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| 154 | |
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| 155 | // Coherence DSPIN signals to local crossbar |
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| 156 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_l2g_c; |
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| 157 | DspinSignals<dspin_cmd_width> signal_dspin_cmd_g2l_c; |
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| 158 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_l2g_c; |
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| 159 | DspinSignals<dspin_rsp_width> signal_dspin_rsp_g2l_c; |
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| 160 | DspinSignals<dspin_cmd_width> signal_dspin_m2p_l2g_c; |
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| 161 | DspinSignals<dspin_cmd_width> signal_dspin_m2p_g2l_c; |
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| 162 | DspinSignals<dspin_rsp_width> signal_dspin_p2m_l2g_c; |
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| 163 | DspinSignals<dspin_rsp_width> signal_dspin_p2m_g2l_c; |
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| 164 | DspinSignals<dspin_cmd_width> signal_dspin_clack_l2g_c; |
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| 165 | DspinSignals<dspin_cmd_width> signal_dspin_clack_g2l_c; |
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| 166 | |
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| 167 | DspinSignals<dspin_cmd_width> signal_dspin_m2p_memc; |
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| 168 | DspinSignals<dspin_cmd_width> signal_dspin_clack_memc; |
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| 169 | DspinSignals<dspin_rsp_width> signal_dspin_p2m_memc; |
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| 170 | DspinSignals<dspin_cmd_width> signal_dspin_m2p_proc[1]; |
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| 171 | DspinSignals<dspin_cmd_width> signal_dspin_clack_proc[1]; |
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| 172 | DspinSignals<dspin_rsp_width> signal_dspin_p2m_proc[1]; |
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| 173 | |
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| 174 | // Mapping table |
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| 175 | |
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| 176 | soclib::common::MappingTable maptabp(32, IntTab(0, 16), IntTab(0, srcid_width), 0xF0000000); |
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| 177 | |
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| 178 | maptabp.add(Segment("mc_m" , MEMC_BASE , MEMC_SIZE , IntTab(0, 0), true)); |
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| 179 | maptabp.add(Segment("boot", BOOT_BASE, BOOT_SIZE, IntTab(0, 1), true)); |
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| 180 | maptabp.add(Segment("tty" , MTTY_BASE , MTTY_SIZE , IntTab(0, 2), false)); |
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| 181 | maptabp.add(Segment("xicu" , XICU_BASE , XICU_SIZE , IntTab(0, 3), false)); |
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| 182 | maptabp.add(Segment("dma", MDMA_BASE, MDMA_SIZE, IntTab(0, 4), false)); |
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| 183 | maptabp.add(Segment("simh", EXIT_BASE, EXIT_SIZE, IntTab(0, 5), false)); |
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| 184 | |
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| 185 | std::cout << maptabp << std::endl; |
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| 186 | |
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| 187 | soclib::common::MappingTable maptabx(32, IntTab(8), IntTab(8), 0x30000000); |
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| 188 | maptabx.add(Segment("xram" , MEMC_BASE , MEMC_SIZE , IntTab(0), false)); |
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| 189 | |
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| 190 | |
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| 191 | std::cout << maptabx << std::endl; |
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| 192 | |
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| 193 | // Signals |
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| 194 | |
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| 195 | sc_clock signal_clk ("clk"); |
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| 196 | sc_signal<bool> signal_resetn("resetn"); |
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| 197 | |
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| 198 | sc_signal<bool> signal_proc0_it0("signal_proc0_it0"); |
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| 199 | sc_signal<bool> signal_proc0_it1("signal_proc0_it1"); |
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| 200 | sc_signal<bool> signal_proc0_it2("signal_proc0_it2"); |
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| 201 | sc_signal<bool> signal_proc0_it3("signal_proc0_it3"); |
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| 202 | sc_signal<bool> signal_proc0_it4("signal_proc0_it4"); |
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| 203 | sc_signal<bool> signal_proc0_it5("signal_proc0_it5"); |
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| 204 | |
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| 205 | soclib::caba::VciSignals<vci_param> signal_vci_ini_rw_proc0 |
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| 206 | ("vci_ini_rw_proc0"); |
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| 207 | soclib::caba::VciSignals<vci_param> signal_vci_tty |
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| 208 | ("signal_vci_tty"); |
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| 209 | soclib::caba::VciSignals<vci_param> signal_vci_simh |
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| 210 | ("signal_vci_simh"); |
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| 211 | |
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| 212 | soclib::caba::VciSignals<vci_param> signal_vci_xicu |
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| 213 | ("signal_vci_xicu"); |
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| 214 | soclib::caba::VciSignals<vci_param> signal_vci_dmai |
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| 215 | ("signal_vci_dmai"); |
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| 216 | soclib::caba::VciSignals<vci_param> signal_vci_dmat |
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| 217 | ("signal_vci_dmat"); |
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| 218 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_rom |
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| 219 | ("vci_tgt_rom"); |
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| 220 | |
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| 221 | soclib::caba::VciSignals<vci_param_ext> signal_vci_ixr_memc |
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| 222 | ("vci_ixr_memc"); |
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| 223 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_memc |
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| 224 | ("vci_tgt_memc"); |
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| 225 | sc_signal<bool> signal_icu_irq0("signal_icu_irq0"); |
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| 226 | sc_signal<bool> signal_icu_irq1("signal_icu_irq1"); |
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| 227 | |
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| 228 | soclib::common::Loader loader("test.elf"); |
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| 229 | |
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| 230 | // init_rw init_c tgt |
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| 231 | soclib::caba::VciCcVCacheWrapper<vci_param, dspin_cmd_width, dspin_rsp_width, proc_iss > *proc0; |
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| 232 | soclib::caba::VciSimpleRam<vci_param> *rom; |
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| 233 | soclib::caba::VciSimpleRam<vci_param_ext> *xram; |
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| 234 | soclib::caba::VciMemCache<vci_param, vci_param_ext, dspin_rsp_width, dspin_cmd_width> *memc; |
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| 235 | soclib::caba::VciXicu<vci_param> *vcixicu; |
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| 236 | soclib::caba::VciMultiTty<vci_param> *vcitty; |
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| 237 | soclib::caba::VciSimhelper<vci_param> *vcisimh; |
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| 238 | soclib::caba::VciMultiDma<vci_param> *vcidma; |
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| 239 | DspinLocalCrossbar<dspin_cmd_width>* xbar_cmd_d; |
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| 240 | DspinLocalCrossbar<dspin_rsp_width>* xbar_rsp_d; |
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| 241 | DspinLocalCrossbar<dspin_cmd_width>* xbar_m2p_c; |
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| 242 | DspinLocalCrossbar<dspin_rsp_width>* xbar_p2m_c; |
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| 243 | DspinLocalCrossbar<dspin_cmd_width>* xbar_clack_c; |
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| 244 | |
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| 245 | proc0 = new soclib::caba::VciCcVCacheWrapper<vci_param, dspin_cmd_width, dspin_rsp_width, proc_iss > |
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| 246 | ("proc0", 0, maptabp, IntTab(0, 0), 0, |
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| 247 | 8,8,8,8,4,64,16,4,64,16,4, 4, 0, 0, max_frozen, from_cycle, trace_ok); |
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| 248 | VciDspinInitiatorWrapper<vci_param, dspin_cmd_width, dspin_rsp_width> |
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| 249 | wi_proc0("wi_proc0", srcid_width); |
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| 250 | |
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| 251 | vcisimh = new soclib::caba::VciSimhelper<vci_param> |
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| 252 | ("vcisimh", IntTab(0, 5), maptabp); |
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| 253 | VciDspinTargetWrapper<vci_param, dspin_cmd_width, dspin_rsp_width> |
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| 254 | wt_simh("wt_simh", srcid_width); |
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| 255 | |
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| 256 | vcidma = new soclib::caba::VciMultiDma<vci_param> |
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| 257 | ("vcidma", maptabp, IntTab(0, 1), IntTab(0, 4), 64, 1);//(1<<(vci_param::K-1))); |
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| 258 | VciDspinInitiatorWrapper<vci_param, dspin_cmd_width, dspin_rsp_width> |
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| 259 | wi_dma("wi_dma", srcid_width); |
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| 260 | VciDspinTargetWrapper<vci_param, dspin_cmd_width, dspin_rsp_width> |
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| 261 | wt_dma("wt_dma", srcid_width); |
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| 262 | |
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| 263 | vcitty = new soclib::caba::VciMultiTty<vci_param> |
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| 264 | ("vcitty", IntTab(0, 2), maptabp, "vcitty0", NULL); |
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| 265 | VciDspinTargetWrapper<vci_param, dspin_cmd_width, dspin_rsp_width> |
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| 266 | wt_tty("wt_tty", srcid_width); |
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| 267 | |
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| 268 | rom = new soclib::caba::VciSimpleRam<vci_param> |
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| 269 | ("rom", IntTab(0, 1), maptabp, loader); |
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| 270 | VciDspinTargetWrapper<vci_param, dspin_cmd_width, dspin_rsp_width> |
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| 271 | wt_rom("wt_rom", srcid_width); |
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| 272 | |
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| 273 | vcixicu = new soclib::caba::VciXicu<vci_param> |
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| 274 | ("vcixicu", maptabp, IntTab(0, 3), 4 /* npti */, 2 /* nhwi */, 4 /* nwti */, 6 /* nirq */); |
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| 275 | VciDspinTargetWrapper<vci_param, dspin_cmd_width, dspin_rsp_width> |
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| 276 | wt_xicu("wt_xicu", srcid_width); |
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| 277 | |
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| 278 | xram = new soclib::caba::VciSimpleRam<vci_param_ext> |
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| 279 | ("xram", IntTab(0), maptabx, loader); |
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| 280 | memc = new soclib::caba::VciMemCache<vci_param, vci_param_ext, dspin_rsp_width, dspin_cmd_width> |
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| 281 | ("memc",maptabp,maptabx,IntTab(0),IntTab(0, 0),/* (cluster_id << l_width) + nb_procs */ 1, 0, 0,16,256,16, 3, 4096, 8, 8, 8, from_cycle, trace_ok); |
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| 282 | VciDspinTargetWrapper<vci_param, dspin_cmd_width, dspin_rsp_width> |
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| 283 | wt_memc("wt_memc", srcid_width); |
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| 284 | |
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| 285 | xbar_cmd_d = new DspinLocalCrossbar<dspin_cmd_width>( |
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| 286 | "xbar_cmd_d", |
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| 287 | maptabp, // mapping table |
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| 288 | 0, 0, // cluster coordinates |
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| 289 | 0, 0, srcid_width, |
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| 290 | 2, // number of local of sources |
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| 291 | 6, // number of local dests |
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| 292 | 2, 2, // fifo depths |
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| 293 | true, // CMD |
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| 294 | true, // use local routing table |
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| 295 | false ); // no broadcast |
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| 296 | |
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| 297 | xbar_rsp_d = new DspinLocalCrossbar<dspin_rsp_width>( |
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| 298 | "xbar_rsp_d", |
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| 299 | maptabp, // mapping table |
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| 300 | 0, 0, // cluster coordinates |
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| 301 | 0, 0, srcid_width, |
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| 302 | 6, // number of local sources |
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| 303 | 2, // number of local dests |
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| 304 | 2, 2, // fifo depths |
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| 305 | false, // RSP |
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| 306 | false, // don't use local routing table |
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| 307 | false ); // no broadcast |
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| 308 | |
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| 309 | xbar_m2p_c = new DspinLocalCrossbar<dspin_cmd_width>( |
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| 310 | "xbar_m2p_c", maptabp, 0, 0, 0, 0, srcid_width, |
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| 311 | 1, 1, 2, 2, true, false, true); |
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| 312 | xbar_p2m_c = new DspinLocalCrossbar<dspin_rsp_width>( |
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| 313 | "xbar_p2m_c", maptabp, 0, 0, 0, 0, 0, |
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| 314 | 1, 1, 2, 2, false, false, false); |
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| 315 | xbar_clack_c = new DspinLocalCrossbar<dspin_cmd_width>( |
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| 316 | "xbar_clack_c", maptabp, 0, 0, 0, 0, srcid_width, |
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| 317 | 1, 1, 1, 1, true, false, false); |
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| 318 | #ifdef VCI_LOGGER_ON_L1 |
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| 319 | soclib::caba::VciLogger<vci_param> vci_logger0("vci_logger0",maptabp); |
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| 320 | #endif |
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| 321 | #ifdef VCI_LOGGER_ON_ROM |
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| 322 | soclib::caba::VciLogger<vci_param> vci_logger1("vci_logger1",maptabp); |
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| 323 | #endif |
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| 324 | #ifdef VCI_LOGGER_ON_L1_TGT |
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| 325 | soclib::caba::VciLogger<vci_param> vci_logger2("vci_logger2",maptabp); |
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| 326 | #endif |
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| 327 | proc0->p_clk(signal_clk); |
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| 328 | proc0->p_resetn(signal_resetn); |
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| 329 | proc0->p_irq[0](signal_proc0_it0); |
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| 330 | proc0->p_irq[1](signal_proc0_it1); |
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| 331 | proc0->p_irq[2](signal_proc0_it2); |
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| 332 | proc0->p_irq[3](signal_proc0_it3); |
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| 333 | proc0->p_irq[4](signal_proc0_it4); |
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| 334 | proc0->p_irq[5](signal_proc0_it5); |
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| 335 | proc0->p_vci(signal_vci_ini_rw_proc0); |
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| 336 | proc0->p_dspin_m2p(signal_dspin_m2p_proc[0]); |
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| 337 | proc0->p_dspin_p2m(signal_dspin_p2m_proc[0]); |
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| 338 | proc0->p_dspin_clack(signal_dspin_clack_proc[0]); |
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| 339 | wi_proc0.p_clk(signal_clk); |
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| 340 | wi_proc0.p_resetn(signal_resetn); |
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| 341 | wi_proc0.p_vci(signal_vci_ini_rw_proc0); |
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| 342 | wi_proc0.p_dspin_cmd(signal_dspin_cmd_proc0_i); |
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| 343 | wi_proc0.p_dspin_rsp(signal_dspin_rsp_proc0_i); |
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| 344 | |
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| 345 | rom->p_clk(signal_clk); |
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| 346 | rom->p_resetn(signal_resetn); |
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| 347 | rom->p_vci(signal_vci_tgt_rom); |
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| 348 | wt_rom.p_clk(signal_clk); |
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| 349 | wt_rom.p_resetn(signal_resetn); |
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| 350 | wt_rom.p_vci(signal_vci_tgt_rom); |
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| 351 | wt_rom.p_dspin_cmd(signal_dspin_cmd_rom_t); |
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| 352 | wt_rom.p_dspin_rsp(signal_dspin_rsp_rom_t); |
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| 353 | |
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| 354 | vcixicu->p_resetn(signal_resetn); |
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| 355 | vcixicu->p_clk(signal_clk); |
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| 356 | vcixicu->p_vci(signal_vci_xicu); |
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| 357 | vcixicu->p_hwi[0](signal_icu_irq0); |
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| 358 | vcixicu->p_hwi[1](signal_icu_irq1); |
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| 359 | vcixicu->p_irq[0](signal_proc0_it0); |
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| 360 | vcixicu->p_irq[1](signal_proc0_it1); |
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| 361 | vcixicu->p_irq[2](signal_proc0_it2); |
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| 362 | vcixicu->p_irq[3](signal_proc0_it3); |
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| 363 | vcixicu->p_irq[4](signal_proc0_it4); |
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| 364 | vcixicu->p_irq[5](signal_proc0_it5); |
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| 365 | wt_xicu.p_clk(signal_clk); |
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| 366 | wt_xicu.p_resetn(signal_resetn); |
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| 367 | wt_xicu.p_vci(signal_vci_xicu); |
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| 368 | wt_xicu.p_dspin_cmd(signal_dspin_cmd_xicu_t); |
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| 369 | wt_xicu.p_dspin_rsp(signal_dspin_rsp_xicu_t); |
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| 370 | |
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| 371 | vcidma->p_clk(signal_clk); |
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| 372 | vcidma->p_resetn(signal_resetn); |
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| 373 | vcidma->p_irq[0](signal_icu_irq1); |
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| 374 | vcidma->p_vci_target(signal_vci_dmat); |
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| 375 | vcidma->p_vci_initiator(signal_vci_dmai); |
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| 376 | wt_dma.p_clk(signal_clk); |
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| 377 | wt_dma.p_resetn(signal_resetn); |
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| 378 | wt_dma.p_vci(signal_vci_dmat); |
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| 379 | wt_dma.p_dspin_cmd(signal_dspin_cmd_dma_t); |
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| 380 | wt_dma.p_dspin_rsp(signal_dspin_rsp_dma_t); |
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| 381 | wi_dma.p_clk(signal_clk); |
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| 382 | wi_dma.p_resetn(signal_resetn); |
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| 383 | wi_dma.p_vci(signal_vci_dmai); |
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| 384 | wi_dma.p_dspin_cmd(signal_dspin_cmd_dma_i); |
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| 385 | wi_dma.p_dspin_rsp(signal_dspin_rsp_dma_i); |
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| 386 | |
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| 387 | |
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| 388 | #ifdef VCI_LOGGER_ON_L1 |
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| 389 | vci_logger0.p_clk(signal_clk); |
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| 390 | vci_logger0.p_resetn(signal_resetn); |
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| 391 | vci_logger0.p_vci(signal_vci_ini_rw_proc0); |
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| 392 | #endif |
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| 393 | |
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| 394 | #ifdef VCI_LOGGER_ON_ROM |
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| 395 | vci_logger1.p_clk(signal_clk); |
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| 396 | vci_logger1.p_resetn(signal_resetn); |
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| 397 | vci_logger1.p_vci(signal_vci_tgt_rom); |
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| 398 | #endif |
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| 399 | |
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| 400 | #ifdef VCI_LOGGER_ON_L1_TGT |
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| 401 | vci_logger2.p_clk(signal_clk); |
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| 402 | vci_logger2.p_resetn(signal_resetn); |
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| 403 | #endif |
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| 404 | |
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| 405 | vcitty->p_clk(signal_clk); |
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| 406 | vcitty->p_resetn(signal_resetn); |
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| 407 | vcitty->p_vci(signal_vci_tty); |
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| 408 | vcitty->p_irq[0](signal_icu_irq0); |
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| 409 | wt_tty.p_clk(signal_clk); |
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| 410 | wt_tty.p_resetn(signal_resetn); |
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| 411 | wt_tty.p_vci(signal_vci_tty); |
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| 412 | wt_tty.p_dspin_cmd(signal_dspin_cmd_tty_t); |
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| 413 | wt_tty.p_dspin_rsp(signal_dspin_rsp_tty_t); |
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| 414 | |
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| 415 | vcisimh->p_clk(signal_clk); |
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| 416 | vcisimh->p_resetn(signal_resetn); |
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| 417 | vcisimh->p_vci(signal_vci_simh); |
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| 418 | wt_simh.p_clk(signal_clk); |
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| 419 | wt_simh.p_resetn(signal_resetn); |
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| 420 | wt_simh.p_vci(signal_vci_simh); |
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| 421 | wt_simh.p_dspin_cmd(signal_dspin_cmd_simh_t); |
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| 422 | wt_simh.p_dspin_rsp(signal_dspin_rsp_simh_t); |
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| 423 | |
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| 424 | memc->p_clk(signal_clk); |
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| 425 | memc->p_resetn(signal_resetn); |
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| 426 | memc->p_vci_tgt(signal_vci_tgt_memc); |
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| 427 | memc->p_dspin_p2m(signal_dspin_p2m_memc); |
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| 428 | memc->p_dspin_m2p(signal_dspin_m2p_memc); |
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| 429 | memc->p_dspin_clack(signal_dspin_clack_memc); |
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| 430 | memc->p_vci_ixr(signal_vci_ixr_memc); |
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| 431 | wt_memc.p_clk(signal_clk); |
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| 432 | wt_memc.p_resetn(signal_resetn); |
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| 433 | wt_memc.p_vci(signal_vci_tgt_memc); |
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| 434 | wt_memc.p_dspin_cmd(signal_dspin_cmd_memc_t); |
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| 435 | wt_memc.p_dspin_rsp(signal_dspin_rsp_memc_t); |
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| 436 | |
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| 437 | xram->p_clk(signal_clk); |
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| 438 | xram->p_resetn(signal_resetn); |
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| 439 | xram->p_vci(signal_vci_ixr_memc); |
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| 440 | |
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| 441 | |
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| 442 | xbar_cmd_d->p_clk(signal_clk); |
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| 443 | xbar_cmd_d->p_resetn(signal_resetn); |
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| 444 | xbar_rsp_d->p_clk(signal_clk); |
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| 445 | xbar_rsp_d->p_resetn(signal_resetn); |
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| 446 | xbar_m2p_c->p_clk(signal_clk); |
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| 447 | xbar_m2p_c->p_resetn(signal_resetn); |
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| 448 | xbar_clack_c->p_clk(signal_clk); |
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| 449 | xbar_clack_c->p_resetn(signal_resetn); |
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| 450 | xbar_p2m_c->p_clk(signal_clk); |
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| 451 | xbar_p2m_c->p_resetn(signal_resetn); |
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| 452 | |
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| 453 | xbar_cmd_d->p_global_out(signal_dspin_cmd_l2g_c); |
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| 454 | xbar_cmd_d->p_global_in(signal_dspin_cmd_g2l_c); |
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| 455 | xbar_rsp_d->p_global_out(signal_dspin_rsp_l2g_c); |
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| 456 | xbar_rsp_d->p_global_in(signal_dspin_rsp_g2l_c); |
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| 457 | xbar_m2p_c->p_global_out(signal_dspin_m2p_l2g_c); |
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| 458 | xbar_m2p_c->p_global_in(signal_dspin_m2p_g2l_c); |
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| 459 | xbar_clack_c->p_global_out(signal_dspin_clack_l2g_c); |
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| 460 | xbar_clack_c->p_global_in(signal_dspin_clack_g2l_c); |
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| 461 | xbar_p2m_c->p_global_out(signal_dspin_p2m_l2g_c); |
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| 462 | xbar_p2m_c->p_global_in(signal_dspin_p2m_g2l_c); |
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| 463 | |
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| 464 | xbar_cmd_d->p_local_in[0](signal_dspin_cmd_proc0_i); |
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| 465 | xbar_cmd_d->p_local_in[1](signal_dspin_cmd_dma_i); |
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| 466 | xbar_cmd_d->p_local_out[0](signal_dspin_cmd_memc_t); |
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| 467 | xbar_cmd_d->p_local_out[1](signal_dspin_cmd_rom_t); |
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| 468 | xbar_cmd_d->p_local_out[2](signal_dspin_cmd_tty_t); |
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| 469 | xbar_cmd_d->p_local_out[3](signal_dspin_cmd_xicu_t); |
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| 470 | xbar_cmd_d->p_local_out[4](signal_dspin_cmd_dma_t); |
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| 471 | xbar_cmd_d->p_local_out[5](signal_dspin_cmd_simh_t); |
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| 472 | |
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| 473 | xbar_rsp_d->p_local_out[0](signal_dspin_rsp_proc0_i); |
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| 474 | xbar_rsp_d->p_local_out[1](signal_dspin_rsp_dma_i); |
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| 475 | xbar_rsp_d->p_local_in[0](signal_dspin_rsp_memc_t); |
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| 476 | xbar_rsp_d->p_local_in[1](signal_dspin_rsp_rom_t); |
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| 477 | xbar_rsp_d->p_local_in[2](signal_dspin_rsp_tty_t); |
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| 478 | xbar_rsp_d->p_local_in[3](signal_dspin_rsp_xicu_t); |
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| 479 | xbar_rsp_d->p_local_in[4](signal_dspin_rsp_dma_t); |
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| 480 | xbar_rsp_d->p_local_in[5](signal_dspin_rsp_simh_t); |
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| 481 | |
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| 482 | xbar_m2p_c->p_local_in[0](signal_dspin_m2p_memc); |
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| 483 | xbar_m2p_c->p_local_out[0](signal_dspin_m2p_proc[0]); |
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| 484 | |
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| 485 | xbar_clack_c->p_local_in[0](signal_dspin_clack_memc); |
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| 486 | xbar_clack_c->p_local_out[0](signal_dspin_clack_proc[0]); |
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| 487 | |
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| 488 | xbar_p2m_c->p_local_out[0](signal_dspin_p2m_memc); |
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| 489 | xbar_p2m_c->p_local_in[0](signal_dspin_p2m_proc[0]); |
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| 490 | |
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| 491 | sc_start(sc_core::sc_time(0, SC_NS)); |
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| 492 | signal_resetn = false; |
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| 493 | |
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| 494 | sc_start(sc_core::sc_time(1, SC_NS)); |
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| 495 | signal_resetn = true; |
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| 496 | |
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| 497 | |
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| 498 | for ( size_t n=1 ; n<ncycles ; n++ ) |
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| 499 | { |
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| 500 | if ( trace_ok and (n > from_cycle) ) |
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| 501 | { |
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| 502 | std::cout << "****************** cycle " << std::dec << n |
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| 503 | << " ************************************************" << std::endl; |
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| 504 | proc0->print_trace(); |
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| 505 | memc->print_trace(); |
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| 506 | signal_vci_ini_rw_proc0.print_trace("signal_vci_ini_rw_proc0"); |
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| 507 | signal_vci_tgt_memc.print_trace("signal_vci_tgt_memc"); |
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| 508 | signal_vci_ixr_memc.print_trace("signal_vci_ixr_memc"); |
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| 509 | } |
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| 510 | sc_start(sc_core::sc_time(1, SC_NS)); |
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| 511 | } |
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| 512 | return EXIT_FAILURE; |
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| 513 | |
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| 514 | } |
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| 515 | |
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| 516 | int sc_main (int argc, char *argv[]) |
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| 517 | { |
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| 518 | try { |
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| 519 | return _main(argc, argv); |
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| 520 | } catch (std::exception &e) { |
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| 521 | std::cout << e.what() << std::endl; |
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| 522 | } catch (...) { |
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| 523 | std::cout << "Unknown exception occured" << std::endl; |
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| 524 | throw; |
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| 525 | } |
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| 526 | return 1; |
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| 527 | } |
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| 528 | |
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