[226] | 1 | #ifndef TSAR_CLUSTER_V1_H |
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| 2 | #define TSAR_CLUSTER_V1_H |
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| 3 | |
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| 4 | #include <systemc.h> |
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| 5 | #include <iostream> |
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| 6 | |
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| 7 | #include "mapping_table.h" |
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| 8 | #include "mips32.h" |
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| 9 | #include "vci_multi_tty.h" |
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| 10 | #include "vci_mem_cache_v1.h" |
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| 11 | #include "vci_cc_xcache_wrapper_v1.h" |
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| 12 | #include "vci_xicu.h" |
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| 13 | #include "vci_simple_ring_fast.h" |
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| 14 | #include "gdbserver.h" |
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| 15 | #include "vci_initiator.h" |
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| 16 | |
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| 17 | /////////////////////////////////////////////////////////// |
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| 18 | // TGTID & SRCID definition in direct space |
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| 19 | // For all components: global TGTID = global SRCID = cluster_index |
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| 20 | // For processors, the local SRCID is between 0 & nprocs-1 |
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| 21 | |
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| 22 | #define MEMC_TGTID 0 |
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| 23 | #define XICU_TGTID 1 |
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| 24 | #define MTTY_TGTID 2 |
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| 25 | |
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| 26 | #define PROC_SRCID 0 |
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| 27 | |
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| 28 | namespace soclib { |
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| 29 | namespace caba { |
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| 30 | |
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| 31 | template <typename vci_param, size_t cmd_width, size_t rsp_width> |
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| 32 | class TsarClusterV1 : public soclib::caba::BaseModule { |
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| 33 | public: |
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| 34 | TsarClusterV1( |
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| 35 | sc_module_name nm, |
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| 36 | |
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| 37 | // Cluster Index |
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| 38 | int cluster_idx, |
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| 39 | |
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| 40 | // Dspin Routers parameters |
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| 41 | int infifo_depth, |
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| 42 | int outfifo_depth, |
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| 43 | int x_local, |
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| 44 | int y_local, |
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| 45 | |
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| 46 | // Bits for global routing |
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| 47 | size_t x_width, |
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| 48 | size_t y_width, |
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| 49 | |
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| 50 | // Mapping tables |
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| 51 | const MappingTable & md, |
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| 52 | const MappingTable & mc, |
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| 53 | const MappingTable & mx, |
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| 54 | |
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| 55 | // Processor Number |
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| 56 | size_t nprocs, |
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| 57 | size_t max_nprocs, |
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| 58 | |
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| 59 | // Cache L1 sizes |
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| 60 | size_t iways, |
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| 61 | size_t isets, |
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| 62 | size_t iwords, |
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| 63 | size_t dways, |
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| 64 | size_t dsets, |
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| 65 | size_t dwords, |
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| 66 | |
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| 67 | // MemCache sizes |
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| 68 | size_t mcways, |
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| 69 | size_t mcsets, |
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| 70 | size_t mcwords, |
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| 71 | |
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| 72 | int is_io, |
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| 73 | |
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| 74 | Loader & loader |
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| 75 | ); |
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| 76 | |
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| 77 | void print_trace(); |
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| 78 | |
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| 79 | ~TsarClusterV1(); |
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| 80 | |
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| 81 | private: |
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| 82 | typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss; |
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| 83 | |
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| 84 | /////////////////////////////////////////////////////////// |
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| 85 | // Components |
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| 86 | |
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| 87 | VciSimpleRingFast<vci_param,cmd_width,rsp_width> * ringd; |
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| 88 | VciSimpleRingFast<vci_param,cmd_width,rsp_width> * ringc; |
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| 89 | |
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| 90 | VciCcXCacheWrapperV1<vci_param, proc_iss> ** procs; |
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| 91 | VciMemCacheV1<vci_param> * memc; |
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| 92 | VciXicu<vci_param> * xicu; |
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| 93 | VciMultiTty<vci_param> * mtty; |
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| 94 | |
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| 95 | //////////////////////////////////////////////////////////// |
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| 96 | // Signals |
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| 97 | |
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| 98 | // Direct VCI Signals |
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| 99 | VciSignals<vci_param> * signal_vci_ini_d; |
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| 100 | VciSignals<vci_param> * signal_vci_tgt_d; |
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| 101 | |
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| 102 | // Coherence VCI Signals |
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| 103 | VciSignals<vci_param> * signal_vci_ini_c; |
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| 104 | VciSignals<vci_param> * signal_vci_tgt_c; |
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| 105 | |
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| 106 | // Interruptions |
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| 107 | sc_signal<bool> * signal_proc_irq; |
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| 108 | sc_signal<bool> signal_mtty_irq; |
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| 109 | |
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| 110 | sc_signal<bool> signal_false; |
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| 111 | |
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| 112 | size_t m_nprocs; |
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| 113 | |
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| 114 | public: |
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| 115 | |
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| 116 | //////////////////////////////////////////////////////////// |
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| 117 | // Ports |
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| 118 | |
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| 119 | sc_in<bool> p_clk; |
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| 120 | sc_in<bool> p_resetn; |
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| 121 | |
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| 122 | soclib::caba::VciInitiator<vci_param> p_vci_ixr; |
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| 123 | }; |
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| 124 | } |
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| 125 | } |
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| 126 | |
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| 127 | #endif |
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| 128 | |
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| 129 | // vim: tabstop=2 : shiftwidth=2 : expandtab |
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