[255] | 1 | ////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File: tsarv4_cluster_mmu.c |
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| 3 | // Author: Alain Greiner |
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| 4 | // Copyright: UPMC/LIP6 |
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| 5 | // Date : march 2011 |
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| 6 | // This program is released under the GNU public license |
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| 7 | ////////////////////////////////////////////////////////////////////////////// |
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| 8 | // This file define a TSAR cluster architecture with virtual memory: |
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| 9 | // - It uses the virtual_dspin_router as distributed global interconnect |
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| 10 | // - It uses the vci_local_crossbar as local interconnect |
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| 11 | // - It uses the vci_cc_vcache_wrapper_v4 |
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| 12 | // - It uses the vci_mem_cache_v4 |
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| 13 | // - It contains a private RAM with a variable latency to emulate the L3 cache |
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| 14 | // - It can contains 1, 2 or 4 processors |
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| 15 | // - Each processor has a private dma channel (vci_multi_dma) |
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| 16 | // - It uses the vci_xicu interrupt controller |
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| 17 | // - The peripherals MTTY, BDEV, FBUF, and the boot BROM are in the cluster |
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| 18 | // containing address 0xBFC00000. |
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| 19 | // - The Multi-TTY component controls up to 15 terminals. |
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| 20 | // - Each Multi-DMA component controls up to 8 DMA channels. |
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| 21 | // - The DMA IRQs are connected to IRQ_IN[8]...IRQ_IN[15] |
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| 22 | // - The TTY IRQs are connected to IRQ_IN[16]...IRQ_IN[30] |
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| 23 | // - The BDEV IRQ is connected to IRQ_IN[31] |
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| 24 | ////////////////////////////////////////////////////////////////////////////////// |
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| 25 | |
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[189] | 26 | #include "../include/tsarv4_cluster_mmu.h" |
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| 27 | |
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| 28 | namespace soclib { |
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| 29 | namespace caba { |
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| 30 | |
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| 31 | ////////////////////////////////////////////////////////////////////////// |
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| 32 | // Constructor |
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| 33 | ////////////////////////////////////////////////////////////////////////// |
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| 34 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
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[255] | 35 | TsarV4ClusterMmu<vci_param, iss_t, cmd_width, rsp_width>::TsarV4ClusterMmu( |
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| 36 | sc_module_name insname, |
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| 37 | size_t nb_procs, |
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| 38 | size_t nb_ttys, |
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| 39 | size_t nb_dmas, |
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| 40 | size_t x_id, |
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| 41 | size_t y_id, |
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| 42 | size_t cluster_id, |
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| 43 | const soclib::common::MappingTable &mtd, |
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| 44 | const soclib::common::MappingTable &mtc, |
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| 45 | const soclib::common::MappingTable &mtx, |
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| 46 | size_t x_width, |
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| 47 | size_t y_width, |
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| 48 | size_t tgtid_memc, |
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| 49 | size_t tgtid_xicu, |
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| 50 | size_t tgtid_fbuf, |
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| 51 | size_t tgtid_mtty, |
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| 52 | size_t tgtid_brom, |
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| 53 | size_t tgtid_bdev, |
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| 54 | size_t tgtid_mdma, |
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| 55 | size_t memc_ways, |
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| 56 | size_t memc_sets, |
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| 57 | size_t l1_i_ways, |
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| 58 | size_t l1_i_sets, |
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| 59 | size_t l1_d_ways, |
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| 60 | size_t l1_d_sets, |
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| 61 | size_t xram_latency, |
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| 62 | bool io, |
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| 63 | size_t xfb, |
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| 64 | size_t yfb, |
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| 65 | char* disk_name, |
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| 66 | size_t block_size, |
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| 67 | const Loader &loader, |
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| 68 | uint32_t frozen_cycles, |
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| 69 | uint32_t debug_start_cycle, |
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| 70 | bool memc_debug_ok, |
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| 71 | bool proc_debug_ok) |
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[249] | 72 | : soclib::caba::BaseModule(insname), |
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| 73 | p_clk("clk"), |
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[255] | 74 | p_resetn("resetn") |
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[189] | 75 | |
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[255] | 76 | { |
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| 77 | // Vectors of ports definition |
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[189] | 78 | |
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[255] | 79 | p_cmd_in = alloc_elems<DspinInput<cmd_width> >("p_cmd_in", 2, 4); |
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| 80 | p_cmd_out = alloc_elems<DspinOutput<cmd_width> >("p_cmd_out", 2, 4); |
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| 81 | p_rsp_in = alloc_elems<DspinInput<rsp_width> >("p_rsp_in", 2, 4); |
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| 82 | p_rsp_out = alloc_elems<DspinOutput<rsp_width> >("p_rsp_out", 2, 4); |
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[189] | 83 | |
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[255] | 84 | // Components definition |
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[189] | 85 | |
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[255] | 86 | // on direct network : local srcid[proc] in [0..nb_procs-1] |
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| 87 | // on direct network : local srcid[mdma] = nb_procs |
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| 88 | // on direct network : local srcid[bdev] = nb_procs + 1 |
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[189] | 89 | |
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[255] | 90 | // on coherence network : local srcid[proc] in [0...nb_procs-1] |
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| 91 | // on coherence network : local srcid[memc] = nb_procs |
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[189] | 92 | |
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[255] | 93 | std::cout << " - building proc_" << x_id << "_" << y_id << "-*" << std::endl; |
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[189] | 94 | |
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[255] | 95 | for (size_t p = 0; p < nb_procs; p++) |
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| 96 | { |
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| 97 | std::ostringstream sproc; |
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| 98 | sproc << "proc_" << x_id << "_" << y_id << "_" << p; |
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| 99 | proc[p] = new VciCcVCacheWrapperV4<vci_param, iss_t>( |
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| 100 | sproc.str().c_str(), |
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| 101 | cluster_id*nb_procs + p, |
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| 102 | mtd, // Mapping Table Direct |
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| 103 | mtc, // Mapping Table Coherence |
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| 104 | IntTab(cluster_id,p), // SRCID_D |
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| 105 | IntTab(cluster_id,p), // SRCID_C |
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| 106 | IntTab(cluster_id,p), // TGTID_C |
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| 107 | 8, // ITLB ways |
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| 108 | 8, // ITLB sets |
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| 109 | 8, // DTLB ways |
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| 110 | 8, // DTLB sets |
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| 111 | l1_i_ways,l1_i_sets,16, // ICACHE size |
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| 112 | l1_d_ways,l1_d_sets,16, // DCACHE size |
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| 113 | 4, // WBUF nlines |
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| 114 | 4, // WBUF nwords |
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| 115 | x_width, |
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| 116 | y_width, |
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| 117 | nb_procs, // MEMC local index |
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| 118 | frozen_cycles, // max frozen cycles |
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| 119 | debug_start_cycle, |
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| 120 | proc_debug_ok); |
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| 121 | } |
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[189] | 122 | |
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[255] | 123 | std::cout << " - building memc_" << x_id << "_" << y_id << std::endl; |
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[189] | 124 | |
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[255] | 125 | std::ostringstream smemc; |
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| 126 | smemc << "memc_" << x_id << "_" << y_id; |
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| 127 | memc = new VciMemCacheV4<vci_param>( |
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[249] | 128 | smemc.str().c_str(), |
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| 129 | mtd, mtc, mtx, |
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[255] | 130 | IntTab(cluster_id), // SRCID_X |
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| 131 | IntTab(cluster_id, nb_procs), // SRCID_C |
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| 132 | IntTab(cluster_id, tgtid_memc), // TGTID_D |
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| 133 | IntTab(cluster_id, nb_procs), // TGTID_C |
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| 134 | memc_ways, memc_sets, 16, // CACHE SIZE |
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| 135 | 4096, // HEAP SIZE |
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| 136 | 8, // TRANSACTION TABLE DEPTH |
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| 137 | 8, // UPDATE TABLE DEPTH |
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[249] | 138 | debug_start_cycle, |
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[255] | 139 | memc_debug_ok); |
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[189] | 140 | |
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[255] | 141 | std::cout << " - building xram_" << x_id << "_" << y_id << std::endl; |
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[189] | 142 | |
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[255] | 143 | std::ostringstream sxram; |
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| 144 | sxram << "xram_" << x_id << "_" << y_id; |
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| 145 | xram = new VciSimpleRam<vci_param>( |
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[249] | 146 | sxram.str().c_str(), |
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| 147 | IntTab(cluster_id), |
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| 148 | mtx, |
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| 149 | loader, |
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| 150 | xram_latency); |
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[189] | 151 | |
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[255] | 152 | std::cout << " - building xicu_" << x_id << "_" << y_id << std::endl; |
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[189] | 153 | |
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[255] | 154 | std::ostringstream sicu; |
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| 155 | sicu << "xicu_" << x_id << "_" << y_id; |
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| 156 | xicu = new VciXicu<vci_param>( |
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[249] | 157 | sicu.str().c_str(), |
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[255] | 158 | mtd, // mapping table |
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| 159 | IntTab(cluster_id, tgtid_xicu), // TGTID_D |
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| 160 | nb_procs, // number of timer IRQs |
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| 161 | 32, // number of hard IRQs |
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| 162 | 0, // number of soft IRQs |
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| 163 | nb_procs); // number of output IRQs |
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[189] | 164 | |
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[255] | 165 | std::cout << " - building dma_" << x_id << "_" << y_id << std::endl; |
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[189] | 166 | |
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[255] | 167 | std::ostringstream sdma; |
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| 168 | sdma << "dma_" << x_id << "_" << y_id; |
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| 169 | mdma = new VciMultiDma<vci_param>( |
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[249] | 170 | sdma.str().c_str(), |
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| 171 | mtd, |
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[255] | 172 | IntTab(cluster_id, nb_procs), // SRCID |
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[249] | 173 | IntTab(cluster_id, tgtid_mdma), // TGTID |
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| 174 | 64, // burst size |
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[255] | 175 | nb_procs); // number of IRQs |
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[189] | 176 | |
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[255] | 177 | std::cout << " - building xbard_" << x_id << "_" << y_id << std::endl; |
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[189] | 178 | |
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[255] | 179 | size_t nb_direct_initiators = nb_procs + 1; |
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| 180 | size_t nb_direct_targets = 3; |
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| 181 | if ( io ) |
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| 182 | { |
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| 183 | nb_direct_initiators = nb_procs + 2; |
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| 184 | nb_direct_targets = 7; |
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| 185 | } |
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| 186 | std::ostringstream sd; |
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| 187 | sd << "xbard_" << x_id << "_" << y_id; |
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| 188 | xbard = new VciLocalCrossbar<vci_param>( |
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[249] | 189 | sd.str().c_str(), |
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| 190 | mtd, |
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[255] | 191 | IntTab(cluster_id), // cluster initiator index |
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| 192 | IntTab(cluster_id), // cluster target index |
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| 193 | nb_direct_initiators, // number of initiators |
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| 194 | nb_direct_targets); // number of targets |
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[189] | 195 | |
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[255] | 196 | std::cout << " - building xbarc_" << x_id << "_" << y_id << std::endl; |
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[189] | 197 | |
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[255] | 198 | std::ostringstream sc; |
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| 199 | sc << "xbarc_" << x_id << "_" << y_id; |
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| 200 | xbarc = new VciLocalCrossbar<vci_param>( |
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[249] | 201 | sc.str().c_str(), |
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| 202 | mtc, |
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[255] | 203 | IntTab(cluster_id), // cluster initiator index |
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| 204 | IntTab(cluster_id), // cluster target index |
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| 205 | nb_procs + 1, // number of initiators |
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| 206 | nb_procs + 1); // number of targets |
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[189] | 207 | |
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[255] | 208 | std::cout << " - building wrappers in cluster_" << x_id << "_" << y_id << std::endl; |
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[189] | 209 | |
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[255] | 210 | // direct initiator wrapper |
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| 211 | std::ostringstream wid; |
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| 212 | wid << "iniwrapperd_" << x_id << "_" << y_id; |
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| 213 | iniwrapperd = new VciVdspinInitiatorWrapper<vci_param,cmd_width,rsp_width>( |
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[249] | 214 | wid.str().c_str(), |
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| 215 | 4, // cmd fifo depth |
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| 216 | 4); // rsp fifo depth |
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[189] | 217 | |
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[255] | 218 | // direct target wrapper |
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| 219 | std::ostringstream wtd; |
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| 220 | wtd << "tgtwrapperd_" << x_id << "_" << y_id; |
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| 221 | tgtwrapperd = new VciVdspinTargetWrapper<vci_param,cmd_width,rsp_width>( |
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[249] | 222 | wtd.str().c_str(), |
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| 223 | 4, // cmd fifo depth |
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| 224 | 4); // rsp fifo depth |
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[189] | 225 | |
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[255] | 226 | // coherence initiator wrapper |
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| 227 | std::ostringstream wic; |
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| 228 | wic << "iniwrapperc_" << x_id << "_" << y_id; |
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| 229 | iniwrapperc = new VciVdspinInitiatorWrapper<vci_param,cmd_width,rsp_width>( |
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[249] | 230 | wic.str().c_str(), |
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| 231 | 4, // cmd fifo depth |
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| 232 | 4); // rsp fifo depth |
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[189] | 233 | |
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[255] | 234 | // coherence target wrapper |
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| 235 | std::ostringstream wtc; |
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| 236 | wtc << "tgtwrapperc_" << x_id << "_" << y_id; |
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| 237 | tgtwrapperc = new VciVdspinTargetWrapper<vci_param,cmd_width,rsp_width>( |
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| 238 | wtc.str().c_str(), |
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[249] | 239 | 4, // cmd fifo depth |
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| 240 | 4); // rsp fifo depth |
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[189] | 241 | |
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[255] | 242 | std::cout << " - building cmdrouter_" << x_id << "_" << y_id << std::endl; |
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[189] | 243 | |
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[255] | 244 | std::ostringstream scmd; |
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| 245 | scmd << "cmdrouter_" << x_id << "_" << y_id; |
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| 246 | cmdrouter = new VirtualDspinRouter<cmd_width>( |
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[249] | 247 | scmd.str().c_str(), |
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| 248 | x_id,y_id, // coordinate in the mesh |
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| 249 | x_width, y_width, // x & y fields width |
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| 250 | 4,4); // input & output fifo depths |
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[189] | 251 | |
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[255] | 252 | std::cout << " - building rsprouter_" << x_id << "_" << y_id << std::endl; |
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[189] | 253 | |
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[255] | 254 | // RSP router |
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| 255 | std::ostringstream srsp; |
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| 256 | srsp << "rsprouter_" << x_id << "_" << y_id; |
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| 257 | rsprouter = new VirtualDspinRouter<rsp_width>( |
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[249] | 258 | srsp.str().c_str(), |
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| 259 | x_id,y_id, // coordinates in mesh |
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| 260 | x_width, y_width, // x & y fields width |
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| 261 | 4,4); // input & output fifo depths |
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[189] | 262 | |
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[255] | 263 | // IO cluster components |
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| 264 | if ( io ) |
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| 265 | { |
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| 266 | std::cout << " - building brom" << std::endl; |
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| 267 | |
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| 268 | brom = new VciSimpleRam<vci_param>( |
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[249] | 269 | "brom", |
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| 270 | IntTab(cluster_id, tgtid_brom), |
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| 271 | mtd, |
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| 272 | loader); |
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[189] | 273 | |
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[255] | 274 | std::cout << " - building fbuf" << std::endl; |
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| 275 | |
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| 276 | fbuf = new VciFrameBuffer<vci_param>( |
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[249] | 277 | "fbuf", |
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| 278 | IntTab(cluster_id, tgtid_fbuf), |
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| 279 | mtd, |
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| 280 | xfb, yfb); |
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[189] | 281 | |
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[255] | 282 | std::cout << " - building fbuf" << std::endl; |
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| 283 | |
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| 284 | bdev = new VciBlockDeviceTsarV4<vci_param>( |
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[249] | 285 | "bdev", |
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| 286 | mtd, |
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[255] | 287 | IntTab(cluster_id, nb_procs+1), |
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[249] | 288 | IntTab(cluster_id, tgtid_bdev), |
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| 289 | disk_name, |
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[255] | 290 | block_size, |
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| 291 | 4); // burst size |
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[189] | 292 | |
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[255] | 293 | std::cout << " - building mtty" << std::endl; |
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| 294 | |
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| 295 | std::vector<std::string> vect_names; |
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| 296 | for( size_t tid = 0 ; tid < (nb_ttys) ; tid++ ) |
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| 297 | { |
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| 298 | std::ostringstream term_name; |
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| 299 | term_name << "term" << tid; |
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| 300 | vect_names.push_back(term_name.str().c_str()); |
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| 301 | } |
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| 302 | mtty = new VciMultiTty<vci_param>( |
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[249] | 303 | "mtty", |
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| 304 | IntTab(cluster_id, tgtid_mtty), |
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| 305 | mtd, |
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[255] | 306 | vect_names); |
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| 307 | } |
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[189] | 308 | |
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[255] | 309 | std::cout << std::endl; |
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[189] | 310 | |
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[255] | 311 | //////////////////////////////////// |
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| 312 | // Connections are defined here |
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| 313 | //////////////////////////////////// |
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[189] | 314 | |
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[255] | 315 | // CMDROUTER and RSPROUTER |
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| 316 | cmdrouter->p_clk (this->p_clk); |
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| 317 | cmdrouter->p_resetn (this->p_resetn); |
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| 318 | rsprouter->p_clk (this->p_clk); |
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| 319 | rsprouter->p_resetn (this->p_resetn); |
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| 320 | for (int x = 0; x < 2; x++) |
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| 321 | { |
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| 322 | for(int y = 0; y < 4; y++) |
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| 323 | { |
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| 324 | cmdrouter->p_out[x][y] (this->p_cmd_out[x][y]); |
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| 325 | cmdrouter->p_in[x][y] (this->p_cmd_in[x][y]); |
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| 326 | rsprouter->p_out[x][y] (this->p_rsp_out[x][y]); |
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| 327 | rsprouter->p_in[x][y] (this->p_rsp_in[x][y]); |
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| 328 | } |
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| 329 | } |
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[189] | 330 | |
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[255] | 331 | cmdrouter->p_out[0][4] (signal_dspin_cmd_g2l_d); |
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| 332 | cmdrouter->p_out[1][4] (signal_dspin_cmd_g2l_c); |
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| 333 | cmdrouter->p_in[0][4] (signal_dspin_cmd_l2g_d); |
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| 334 | cmdrouter->p_in[1][4] (signal_dspin_cmd_l2g_c); |
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[189] | 335 | |
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[255] | 336 | rsprouter->p_out[0][4] (signal_dspin_rsp_g2l_d); |
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| 337 | rsprouter->p_out[1][4] (signal_dspin_rsp_g2l_c); |
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| 338 | rsprouter->p_in[0][4] (signal_dspin_rsp_l2g_d); |
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| 339 | rsprouter->p_in[1][4] (signal_dspin_rsp_l2g_c); |
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[189] | 340 | |
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[255] | 341 | std::cout << " - CMD & RSP routers connected" << std::endl; |
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[189] | 342 | |
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[255] | 343 | // VCI/DSPIN WRAPPERS |
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| 344 | iniwrapperd->p_clk (this->p_clk); |
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| 345 | iniwrapperd->p_resetn (this->p_resetn); |
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| 346 | iniwrapperd->p_vci (signal_vci_l2g_d); |
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| 347 | iniwrapperd->p_dspin_out (signal_dspin_cmd_l2g_d); |
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| 348 | iniwrapperd->p_dspin_in (signal_dspin_rsp_g2l_d); |
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[189] | 349 | |
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[255] | 350 | tgtwrapperd->p_clk (this->p_clk); |
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| 351 | tgtwrapperd->p_resetn (this->p_resetn); |
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| 352 | tgtwrapperd->p_vci (signal_vci_g2l_d); |
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| 353 | tgtwrapperd->p_dspin_out (signal_dspin_rsp_l2g_d); |
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| 354 | tgtwrapperd->p_dspin_in (signal_dspin_cmd_g2l_d); |
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[189] | 355 | |
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[255] | 356 | iniwrapperc->p_clk (this->p_clk); |
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| 357 | iniwrapperc->p_resetn (this->p_resetn); |
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| 358 | iniwrapperc->p_vci (signal_vci_l2g_c); |
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| 359 | iniwrapperc->p_dspin_out (signal_dspin_cmd_l2g_c); |
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| 360 | iniwrapperc->p_dspin_in (signal_dspin_rsp_g2l_c); |
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[189] | 361 | |
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[255] | 362 | tgtwrapperc->p_clk (this->p_clk); |
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| 363 | tgtwrapperc->p_resetn (this->p_resetn); |
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| 364 | tgtwrapperc->p_vci (signal_vci_g2l_c); |
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| 365 | tgtwrapperc->p_dspin_out (signal_dspin_rsp_l2g_c); |
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| 366 | tgtwrapperc->p_dspin_in (signal_dspin_cmd_g2l_c); |
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[189] | 367 | |
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[255] | 368 | std::cout << " - VCI/DSPIN wrappers connected" << std::endl; |
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[189] | 369 | |
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[255] | 370 | // CROSSBAR direct |
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| 371 | xbard->p_clk (this->p_clk); |
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| 372 | xbard->p_resetn (this->p_resetn); |
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| 373 | xbard->p_initiator_to_up (signal_vci_l2g_d); |
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| 374 | xbard->p_target_to_up (signal_vci_g2l_d); |
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[189] | 375 | |
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[255] | 376 | xbard->p_to_target[tgtid_memc] (signal_vci_tgt_d_memc); |
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| 377 | xbard->p_to_target[tgtid_xicu] (signal_vci_tgt_d_xicu); |
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| 378 | xbard->p_to_target[tgtid_mdma] (signal_vci_tgt_d_mdma); |
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[189] | 379 | |
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[255] | 380 | xbard->p_to_initiator[nb_procs] (signal_vci_ini_d_mdma); |
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[189] | 381 | |
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[255] | 382 | for (size_t p = 0; p < nb_procs; p++) |
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| 383 | { |
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| 384 | xbard->p_to_initiator[p] (signal_vci_ini_d_proc[p]); |
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| 385 | } |
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[189] | 386 | |
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[255] | 387 | if ( io ) |
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| 388 | { |
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| 389 | xbard->p_to_target[tgtid_mtty] (signal_vci_tgt_d_mtty); |
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| 390 | xbard->p_to_target[tgtid_brom] (signal_vci_tgt_d_brom); |
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| 391 | xbard->p_to_target[tgtid_bdev] (signal_vci_tgt_d_bdev); |
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| 392 | xbard->p_to_target[tgtid_fbuf] (signal_vci_tgt_d_fbuf); |
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[249] | 393 | |
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[255] | 394 | xbard->p_to_initiator[nb_procs+1] (signal_vci_ini_d_bdev); |
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| 395 | } |
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[249] | 396 | |
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[255] | 397 | std::cout << " - Direct crossbar connected" << std::endl; |
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[249] | 398 | |
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[255] | 399 | // CROSSBAR coherence |
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| 400 | xbarc->p_clk (this->p_clk); |
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| 401 | xbarc->p_resetn (this->p_resetn); |
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| 402 | xbarc->p_initiator_to_up (signal_vci_l2g_c); |
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| 403 | xbarc->p_target_to_up (signal_vci_g2l_c); |
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| 404 | xbarc->p_to_initiator[nb_procs] (signal_vci_ini_c_memc); |
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| 405 | xbarc->p_to_target[nb_procs] (signal_vci_tgt_c_memc); |
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| 406 | for (size_t p = 0; p < nb_procs; p++) |
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| 407 | { |
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| 408 | xbarc->p_to_target[p] (signal_vci_tgt_c_proc[p]); |
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| 409 | xbarc->p_to_initiator[p] (signal_vci_ini_c_proc[p]); |
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| 410 | } |
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[249] | 411 | |
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[255] | 412 | std::cout << " - Coherence crossbar connected" << std::endl; |
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[249] | 413 | |
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[255] | 414 | // Processors |
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| 415 | for (size_t p = 0; p < nb_procs; p++) |
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| 416 | { |
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| 417 | proc[p]->p_clk (this->p_clk); |
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| 418 | proc[p]->p_resetn (this->p_resetn); |
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| 419 | proc[p]->p_vci_ini_d (signal_vci_ini_d_proc[p]); |
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| 420 | proc[p]->p_vci_ini_c (signal_vci_ini_c_proc[p]); |
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| 421 | proc[p]->p_vci_tgt_c (signal_vci_tgt_c_proc[p]); |
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| 422 | proc[p]->p_irq[0] (signal_proc_it[p]); |
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| 423 | for ( size_t j = 1 ; j < 6 ; j++) |
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| 424 | { |
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| 425 | proc[p]->p_irq[j] (signal_false); |
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| 426 | } |
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| 427 | } |
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[249] | 428 | |
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[255] | 429 | std::cout << " - Processors connected" << std::endl; |
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[249] | 430 | |
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[255] | 431 | // XICU |
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| 432 | xicu->p_clk (this->p_clk); |
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| 433 | xicu->p_resetn (this->p_resetn); |
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| 434 | xicu->p_vci (signal_vci_tgt_d_xicu); |
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| 435 | for ( size_t p=0 ; p<nb_procs ; p++) |
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| 436 | { |
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| 437 | xicu->p_irq[p] (signal_proc_it[p]); |
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| 438 | } |
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| 439 | for ( size_t i=0 ; i<32 ; i++) |
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| 440 | { |
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| 441 | if ( io ) // I/O cluster |
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| 442 | { |
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| 443 | if (i < 8) xicu->p_hwi[i] (signal_false); |
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| 444 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); |
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| 445 | else if (i < 16) xicu->p_hwi[i] (signal_false); |
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| 446 | else if (i < (16 + nb_ttys)) xicu->p_hwi[i] (signal_irq_mtty[i-16]); |
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| 447 | else if (i < 31) xicu->p_hwi[i] (signal_false); |
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| 448 | else xicu->p_hwi[i] (signal_irq_bdev); |
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| 449 | } |
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| 450 | else // other clusters |
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| 451 | { |
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| 452 | if (i < 8) xicu->p_hwi[i] (signal_false); |
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| 453 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); |
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| 454 | else xicu->p_hwi[i] (signal_false); |
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| 455 | } |
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| 456 | } |
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[249] | 457 | |
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[255] | 458 | std::cout << " - XICU connected" << std::endl; |
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[249] | 459 | |
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[255] | 460 | // MEMC |
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| 461 | memc->p_clk (this->p_clk); |
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| 462 | memc->p_resetn (this->p_resetn); |
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| 463 | memc->p_vci_ixr (signal_vci_xram); |
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| 464 | memc->p_vci_tgt (signal_vci_tgt_d_memc); |
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| 465 | memc->p_vci_ini (signal_vci_ini_c_memc); |
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| 466 | memc->p_vci_tgt_cleanup (signal_vci_tgt_c_memc); |
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[249] | 467 | |
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[255] | 468 | std::cout << " - MEMC connected" << std::endl; |
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[249] | 469 | |
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[255] | 470 | // XRAM |
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| 471 | xram->p_clk (this->p_clk); |
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| 472 | xram->p_resetn (this->p_resetn); |
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| 473 | xram->p_vci (signal_vci_xram); |
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[249] | 474 | |
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[255] | 475 | std::cout << " - XRAM connected" << std::endl; |
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[249] | 476 | |
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[255] | 477 | // CDMA |
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| 478 | mdma->p_clk (this->p_clk); |
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| 479 | mdma->p_resetn (this->p_resetn); |
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| 480 | mdma->p_vci_target (signal_vci_tgt_d_mdma); |
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| 481 | mdma->p_vci_initiator (signal_vci_ini_d_mdma); |
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| 482 | for (size_t i=0 ; i<nb_dmas ; i++) |
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| 483 | { |
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| 484 | mdma->p_irq[i] (signal_irq_mdma[i]); |
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| 485 | } |
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| 486 | |
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| 487 | std::cout << " - MDMA connected" << std::endl; |
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| 488 | |
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| 489 | // Components in I/O cluster |
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| 490 | |
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| 491 | if ( io ) |
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| 492 | { |
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| 493 | // BDEV |
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| 494 | bdev->p_clk (this->p_clk); |
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| 495 | bdev->p_resetn (this->p_resetn); |
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| 496 | bdev->p_irq (signal_irq_bdev); |
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| 497 | bdev->p_vci_target (signal_vci_tgt_d_bdev); |
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| 498 | bdev->p_vci_initiator (signal_vci_ini_d_bdev); |
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| 499 | |
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| 500 | std::cout << " - BDEV connected" << std::endl; |
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| 501 | |
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| 502 | // FBUF |
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| 503 | fbuf->p_clk (this->p_clk); |
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| 504 | fbuf->p_resetn (this->p_resetn); |
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| 505 | fbuf->p_vci (signal_vci_tgt_d_fbuf); |
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| 506 | |
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| 507 | std::cout << " - FBUF connected" << std::endl; |
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| 508 | |
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| 509 | // BROM |
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| 510 | brom->p_clk (this->p_clk); |
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| 511 | brom->p_resetn (this->p_resetn); |
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| 512 | brom->p_vci (signal_vci_tgt_d_brom); |
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| 513 | |
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| 514 | std::cout << " - BROM connected" << std::endl; |
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| 515 | |
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| 516 | // MTTY |
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| 517 | mtty->p_clk (this->p_clk); |
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| 518 | mtty->p_resetn (this->p_resetn); |
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| 519 | mtty->p_vci (signal_vci_tgt_d_mtty); |
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| 520 | for ( size_t i=0 ; i<nb_ttys ; i++ ) |
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| 521 | { |
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| 522 | mtty->p_irq[i] (signal_irq_mtty[i]); |
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| 523 | } |
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| 524 | |
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| 525 | std::cout << " - MTTY connected" << std::endl; |
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| 526 | } |
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| 527 | } // end constructor |
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| 528 | |
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[189] | 529 | /////////////////////////////////////////////////////////////////////////// |
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| 530 | // destructor |
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| 531 | /////////////////////////////////////////////////////////////////////////// |
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| 532 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
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[255] | 533 | TsarV4ClusterMmu<vci_param, iss_t, cmd_width, rsp_width>::~TsarV4ClusterMmu() {} |
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[189] | 534 | |
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[249] | 535 | } |
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| 536 | } |
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| 537 | |
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| 538 | |
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| 539 | // Local Variables: |
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| 540 | // tab-width: 3 |
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| 541 | // c-basic-offset: 3 |
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| 542 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 543 | // indent-tabs-mode: nil |
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| 544 | // End: |
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| 545 | |
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| 546 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
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| 547 | |
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| 548 | |
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| 549 | |
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