source: trunk/platforms @ 168

Name Size Rev Age Author Last Change
../
caba-new_vdspin-test 137   14 years simerabe replacing old ring versions with new one
caba-ring-ccxcachev1_memcachev1-mipsel 137   14 years simerabe replacing old ring versions with new one
caba-ring-ccxcachev1_memcachev3-mipsel 137   14 years simerabe replacing old ring versions with new one
caba-ring-ccxcachev4_memcachev4-mips32el 167   14 years kane delete all timeout reference (multi write buffer)
caba-ring-vcache2_memcache-mipsel 137   14 years simerabe replacing old ring versions with new one
caba-tsar-v0 3   15 years nipo Import platforms
caba-vdspin-vci_synthetic_initiator 133   14 years choichil Platform with more parameters
caba-vgmn-ccxcachev1_memcachev3-mipsel 3   15 years nipo Import platforms
caba-vgmn-memcache-mipsel 3   15 years nipo Import platforms
caba-vgmn-vcache2_memcache-mipsel 3   15 years nipo Import platforms
caba-xxx-ccxcachemulti-mipsel 85   14 years simerabe removing duplicate ring_signals_2
dsx 100   14 years choichil Deleting modelsim files
fpga_3_tsar_v1 137   14 years simerabe replacing old ring versions with new one
tsarv2_mutekh 137   14 years simerabe replacing old ring versions with new one
tsarv4_dspin_generic_32 167   14 years kane delete all timeout reference (multi write buffer)
tsarv4_generic_ring 167   14 years kane delete all timeout reference (multi write buffer)
tsarv4_generic_xbar 168   14 years alain Moving to the vci_cc_xcache_wrapper_v4 implementing the multicores …
tsarv4_vgmn_generic_32 167   14 years kane delete all timeout reference (multi write buffer)
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