1 | /**************************************************************************************** |
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2 | File : drivers.c |
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3 | Written by Alain Greiner & Nicolas Pouillon |
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4 | Date : december 2010 |
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5 | |
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6 | Basic drivers used by the GIET, that is running |
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7 | on the MIPS32 processor architecture. |
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8 | |
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9 | The supported peripherals are: |
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10 | - the SoClib pibus_multi_tty |
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11 | - the SocLib pibus_timer |
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12 | - the SocLib pibus_dma |
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13 | - The SoCLib pibus_icu |
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14 | - The SoCLib pibus_gcd |
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15 | - The SoCLib pibus_frame_buffer |
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16 | - The SoCLib pibus_block_device |
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17 | |
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18 | The following global parameters must be defined in the ldscript. |
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19 | - NB_CLUSTERS : number of clusters |
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20 | - NB_PROCS : number of processor per cluster |
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21 | - NB_NTASKS : max number of tasks per processor |
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22 | - NB_LOCKS : max number of supported spin_locks |
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23 | - NB_TIMERS : max number of timers per processor |
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24 | |
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25 | The follobing base addresses must be defined in the ldscript |
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26 | - seg_icu_base |
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27 | - seg_timer_base |
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28 | - seg_tty_base |
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29 | - seg_gcd_base |
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30 | - seg_dma_base |
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31 | - seg_locks_base |
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32 | - seg_fb_base |
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33 | - seg_ioc_base |
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34 | ****************************************************************************************/ |
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35 | |
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36 | #include "drivers.h" |
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37 | #include "icu.h" |
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38 | #include "block_device.h" |
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39 | #include "dma.h" |
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40 | |
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41 | struct plouf; |
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42 | |
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43 | ////////////////////////////////////////////////////////////// |
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44 | // various informations that must be defined in ldscript |
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45 | ////////////////////////////////////////////////////////////// |
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46 | extern struct plouf seg_icu_base; |
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47 | extern struct plouf seg_timer_base; |
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48 | extern struct plouf seg_tty_base; |
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49 | extern struct plouf seg_gcd_base; |
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50 | extern struct plouf seg_dma_base; |
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51 | extern struct plouf seg_locks_base; |
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52 | extern struct plouf seg_fb_base; |
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53 | extern struct plouf seg_ioc_base; |
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54 | |
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55 | extern struct plouf NB_CLUSTERS; |
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56 | extern struct plouf NB_PROCS; |
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57 | extern struct plouf NB_TASKS; |
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58 | extern struct plouf NB_TIMERS; |
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59 | extern struct plouf NB_LOCKS; |
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60 | |
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61 | #define in_drivers __attribute__((section (".drivers"))) |
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62 | #define in_unckdata __attribute__((section (".unckdata"))) |
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63 | |
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64 | //////////////////////////////////////////////////////////////////////////////////////// |
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65 | // Global uncachable variables for synchronization between drivers and ISRs |
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66 | //////////////////////////////////////////////////////////////////////////////////////// |
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67 | |
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68 | in_unckdata int volatile _dma_status[256]; |
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69 | in_unckdata int volatile _dma_busy[256] = { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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70 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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71 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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72 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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73 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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74 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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75 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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76 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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77 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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78 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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79 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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80 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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81 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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82 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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83 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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84 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }; |
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85 | |
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86 | in_unckdata int volatile _ioc_lock = 0; |
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87 | in_unckdata int volatile _ioc_done = 0; |
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88 | in_unckdata int volatile _ioc_status; |
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89 | |
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90 | in_unckdata char volatile _tty_get_buf[256]; |
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91 | in_unckdata int volatile _tty_get_full[256] = { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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92 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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93 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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94 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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95 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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96 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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97 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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98 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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99 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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100 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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101 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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102 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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103 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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104 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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105 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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106 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }; |
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107 | |
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108 | in_unckdata char volatile _tty_put_buf[256]; |
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109 | in_unckdata int volatile _tty_put_full[256] = { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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110 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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111 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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112 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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113 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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114 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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115 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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116 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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117 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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118 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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119 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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120 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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121 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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122 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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123 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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124 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }; |
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125 | |
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126 | //////////////////////////////////////////////////////////////////////////////////////// |
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127 | // Global uncachable variables for inter-task barriers |
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128 | //////////////////////////////////////////////////////////////////////////////////////// |
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129 | |
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130 | in_unckdata int volatile _barrier_initial_value[8] = { 0,0,0,0,0,0,0,0 }; |
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131 | in_unckdata int volatile _barrier_count[8] = { 0,0,0,0,0,0,0,0 }; |
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132 | |
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133 | //////////////////////////////////////////////////////////////////////////////////////// |
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134 | // Global uncachable variables for spin_locks using LL/C instructions |
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135 | //////////////////////////////////////////////////////////////////////////////////////// |
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136 | |
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137 | in_unckdata int volatile _spin_lock[256] = { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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138 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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139 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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140 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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141 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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142 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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143 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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144 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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145 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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146 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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147 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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148 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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149 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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150 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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151 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, |
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152 | 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }; |
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153 | |
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154 | //////////////////////////////////////////////////////////////////////////////////////// |
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155 | // mempcy() |
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156 | // GCC requires this function. Taken from MutekH. |
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157 | //////////////////////////////////////////////////////////////////////////////////////// |
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158 | __attribute((used)) |
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159 | in_drivers static void *memcpy(void *_dst, const void *_src, unsigned int size) |
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160 | { |
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161 | unsigned int *dst = _dst; |
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162 | const unsigned int *src = _src; |
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163 | if ( ! ((unsigned int)dst & 3) && ! ((unsigned int)src & 3) ) |
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164 | while (size > 3) { |
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165 | *dst++ = *src++; |
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166 | size -= 4; |
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167 | } |
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168 | |
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169 | unsigned char *cdst = (unsigned char*)dst; |
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170 | unsigned char *csrc = (unsigned char*)src; |
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171 | |
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172 | while (size--) { |
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173 | *cdst++ = *csrc++; |
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174 | } |
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175 | return _dst; |
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176 | } |
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177 | |
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178 | //////////////////////////////////////////////////////////////////////////////////////// |
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179 | // _procid() |
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180 | // Access CP0 and returns processor ident |
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181 | //////////////////////////////////////////////////////////////////////////////////////// |
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182 | in_drivers unsigned int _procid() |
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183 | { |
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184 | unsigned int ret; |
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185 | asm volatile( "mfc0 %0, $15, 1": "=r"(ret) ); |
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186 | return (ret & 0xFF); |
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187 | } |
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188 | //////////////////////////////////////////////////////////////////////////////////////// |
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189 | // _segment_increment() |
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190 | // Access CP0 to get the procid, and returns the address increment to access |
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191 | // various peripherals (TTY, TIMER, ICU, DMA), in case of multiprocessors architectures. |
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192 | // It uses the NB_PROCS and NB_CLUSTERS parameters to compute this increment: |
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193 | // - increment = cluster_id*cluster_increment + local_id*local_increment |
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194 | // - cluster_id = procid / NB_PROCS |
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195 | // - local_id = procid % NB_PROCS |
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196 | // - cluster_increment = 4G / NB_CLUSTERS |
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197 | //////////////////////////////////////////////////////////////////////////////////////// |
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198 | in_drivers unsigned int _segment_increment(unsigned int local_increment) |
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199 | { |
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200 | unsigned int nprocs = (unsigned int)&NB_PROCS; |
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201 | unsigned int nclusters = (unsigned int)&NB_CLUSTERS; |
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202 | unsigned int cluster_increment = (0x80000000/nclusters)*2; |
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203 | unsigned int pid = _procid(); |
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204 | return (pid / nprocs)*cluster_increment + (pid % nprocs)*local_increment; |
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205 | } |
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206 | //////////////////////////////////////////////////////////////////////////////////////// |
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207 | // _proctime() |
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208 | // Access CP0 and returns processor time |
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209 | //////////////////////////////////////////////////////////////////////////////////////// |
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210 | in_drivers unsigned int _proctime() |
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211 | { |
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212 | unsigned int ret; |
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213 | asm volatile( "mfc0 %0, $9": "=r"(ret) ); |
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214 | return ret; |
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215 | } |
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216 | //////////////////////////////////////////////////////////////////////////////////////// |
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217 | // _procnumber() |
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218 | // Returns the number of processsors controled by the GIET |
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219 | //////////////////////////////////////////////////////////////////////////////////////// |
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220 | in_drivers unsigned int _procnumber() |
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221 | { |
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222 | return (unsigned int)&NB_PROCS * (unsigned int)&NB_CLUSTERS; |
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223 | } |
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224 | //////////////////////////////////////////////////////////////////////////////////////// |
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225 | // _it_mask() |
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226 | // Access CP0 and mask IRQs |
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227 | //////////////////////////////////////////////////////////////////////////////////////// |
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228 | in_drivers void _it_mask() |
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229 | { |
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230 | int tmp; |
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231 | asm volatile("mfc0 %0, $12" : "=r" (tmp) ); |
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232 | asm volatile("ori %0, %0, 1" : "=r" (tmp) ); |
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233 | asm volatile("mtc0 %0, $12" : "=r" (tmp) ); |
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234 | } |
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235 | //////////////////////////////////////////////////////////////////////////////////////// |
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236 | // _it_enable() |
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237 | // Access CP0 and enable IRQs |
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238 | //////////////////////////////////////////////////////////////////////////////////////// |
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239 | in_drivers void _it_enable() |
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240 | { |
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241 | int tmp; |
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242 | asm volatile("mfc0 %0, $12" : "=r" (tmp) ); |
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243 | asm volatile("addi %0, %0, -1" : "=r" (tmp) ); |
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244 | asm volatile("mtc0 %0, $12" : "=r" (tmp) ); |
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245 | } |
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246 | ////////////////////////////////////////////////////////////////////// |
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247 | // _dcache_buf_invalidate() |
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248 | // Invalidate all cache lines corresponding to a memory buffer. |
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249 | // This is used by the block_device driver. |
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250 | ///////////////////////////////////////////////////////////////////////// |
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251 | in_drivers void _dcache_buf_invalidate(const void * buffer, size_t size) |
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252 | { |
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253 | size_t i; |
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254 | size_t dcache_line_size; |
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255 | |
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256 | // retrieve dcache line size from config register (bits 12:10) |
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257 | asm volatile("mfc0 %0, $16, 1" : "=r" (dcache_line_size)); |
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258 | |
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259 | dcache_line_size = 2 << ((dcache_line_size>>10) & 0x7); |
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260 | |
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261 | // iterate on lines to invalidate each one of them |
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262 | for ( i=0; i<size; i+=dcache_line_size ) |
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263 | asm volatile(" cache %0, %1" |
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264 | : |
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265 | :"i" (0x11), "R" (*((char*)buffer+i))); |
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266 | } |
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267 | |
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268 | ///////////////////////////////////////////////////////////////////////// |
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269 | // _itoa_dec() |
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270 | // convert a 32 bits unsigned int to a string of 10 decimal characters. |
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271 | ///////////////////////////////////////////////////////////////////////// |
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272 | in_drivers void _itoa_dec(unsigned val, char* buf) |
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273 | { |
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274 | const char DecTab[] = "0123456789"; |
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275 | unsigned int i; |
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276 | for( i=0 ; i<10 ; i++ ) |
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277 | { |
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278 | if( (val!=0) || (i==0) ) buf[9-i] = DecTab[val % 10]; |
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279 | else buf[9-i] = 0x20; |
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280 | val /= 10; |
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281 | } |
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282 | } |
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283 | ////////////////////////////////////////////////////////////////////////// |
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284 | // _itoa_hex() |
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285 | // convert a 32 bits unsigned int to a string of 8 hexadecimal characters. |
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286 | /////////////////////////////////////////////////////////////////////////// |
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287 | in_drivers void _itoa_hex(int val, char* buf) |
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288 | { |
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289 | const char HexaTab[] = "0123456789ABCD"; |
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290 | unsigned int i; |
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291 | for( i=0 ; i<8 ; i++ ) |
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292 | { |
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293 | buf[7-i] = HexaTab[val % 16]; |
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294 | val /= 16; |
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295 | } |
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296 | } |
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297 | /////////////////////////////////////////////////////////////////////////////////////// |
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298 | // MULTI_TIMER component |
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299 | // Each processor can handle up to NB_TIMERS independant timers. |
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300 | // The segment base address is defined as |
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301 | // seg_timer_base + segment_increment(NB_TIMERS*16) + index*16 |
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302 | /////////////////////////////////////////////////////////////////////////////////////// |
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303 | // _timer_write() |
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304 | // Write a 32 bits word in a memory mapped register of the MULTI_TIMER |
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305 | /////////////////////////////////////////////////////////////////////////////////////// |
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306 | in_drivers int _timer_write(size_t timer_index, size_t register_index, int value) |
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307 | { |
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308 | int* timer_address; |
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309 | size_t ntimers = (size_t)&NB_TIMERS; |
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310 | unsigned int base = (unsigned int)&seg_timer_base; |
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311 | unsigned int increment = _segment_increment(ntimers*TIMER_SPAN*4); |
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312 | |
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313 | if( timer_index >= ntimers) return -1; |
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314 | if( register_index >= TIMER_SPAN ) return -1; |
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315 | |
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316 | timer_address = (int*)(base + increment + timer_index*TIMER_SPAN*4); |
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317 | timer_address[register_index] = value; // write word |
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318 | return 0; |
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319 | } |
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320 | /////////////////////////////////////////////////////////////////////////////////////// |
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321 | // _timer_read() |
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322 | // Read a 32 bits word in a memory mapped register of the MULTI_TIMER |
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323 | /////////////////////////////////////////////////////////////////////////////////////// |
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324 | in_drivers int _timer_read(size_t timer_index, size_t register_index, int* buffer) |
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325 | { |
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326 | int* timer_address; |
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327 | size_t ntimers = (size_t)&NB_TIMERS; |
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328 | unsigned int base = (unsigned int)&seg_timer_base; |
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329 | unsigned int increment = _segment_increment(ntimers*TIMER_SPAN*4); |
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330 | |
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331 | if( timer_index >= ntimers) return -1; |
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332 | if( register_index >= TIMER_SPAN ) return -1; |
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333 | |
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334 | if( timer_index >= ntimers) return -1; |
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335 | if( register_index >= TIMER_SPAN ) return -1; |
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336 | |
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337 | timer_address = (int*)(base + increment + timer_index*TIMER_SPAN*4); |
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338 | *buffer = timer_address[register_index]; // read word |
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339 | return 0; |
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340 | } |
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341 | /////////////////////////////////////////////////////////////////////////////////////// |
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342 | // MULTI_TTY COMPONENT |
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343 | // The total number of TTYs is equal to NB_CLUSTERS * NB_PROCS * NB_TASKS. |
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344 | // - tty_address = seg_tty_base + _segment_increment(NB_TASKS*16) + task_id*16 |
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345 | // - tty_index = proc_id*NB_TASKS + task_id |
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346 | /////////////////////////////////////////////////////////////////////////////////////// |
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347 | // _tty_write() |
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348 | // Write one or several characters directly from a fixed length user buffer |
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349 | // to the TTY_WRITE register of the TTY controler. |
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350 | // It doesn't use the TTY_PUT_IRQ interrupt and the associated kernel buffer. |
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351 | // This is a non blocking call : it test the TTY_STATUS register. |
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352 | // If the TTY_STATUS_WRITE bit is set, the transfer stops and the function |
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353 | // returns the number of characters that have been actually written. |
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354 | // It returns -1 in case of error (proc_id or task index too large) |
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355 | /////////////////////////////////////////////////////////////////////////////////////// |
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356 | in_drivers int _tty_write(char* buffer, int length) |
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357 | { |
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358 | char* tty_address; |
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359 | size_t ntasks = (size_t)&NB_TASKS; |
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360 | size_t nprocs = (size_t)&NB_PROCS; |
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361 | size_t nclusters = (size_t)&NB_CLUSTERS; |
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362 | unsigned int base = (unsigned int)&seg_tty_base; |
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363 | unsigned int increment = _segment_increment(ntasks*TTY_SPAN*4); |
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364 | size_t pid = _procid(); |
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365 | size_t tid = _current_task_array[pid]; |
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366 | int nwritten = 0; |
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367 | int i; |
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368 | |
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369 | if( tid >= ntasks ) return -1; |
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370 | if( pid >= nprocs*nclusters ) return -1; |
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371 | |
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372 | tty_address = (char*)(base + increment + tid*TTY_SPAN*4); |
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373 | |
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374 | for ( i=0 ; i < length ; i++ ) |
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375 | { |
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376 | if((tty_address[TTY_STATUS*4] & 0x2) == 0x2) break; |
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377 | else |
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378 | { |
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379 | tty_address[TTY_WRITE*4] = buffer[i]; // write character |
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380 | nwritten++; |
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381 | } |
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382 | } |
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383 | return nwritten; |
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384 | } |
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385 | /////////////////////////////////////////////////////////////////////////////////////// |
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386 | // _tty_read() |
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387 | // Fetch one character directly from the TTY_READ register of the TTY controler, |
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388 | // and writes this character to the user buffer. |
---|
389 | // It doesn't use the TTY_GET_IRQ interrupt and the associated kernel buffer. |
---|
390 | // This is a non blocking call : it returns 0 if the register is empty, |
---|
391 | // and returns 1 if the register is full. |
---|
392 | // It returns -1 in case of error (proc_id or task_id too large or length != 1) |
---|
393 | // The length argument is not used in this implementation, and has been |
---|
394 | // introduced for future implementations. |
---|
395 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
396 | in_drivers int _tty_read(char* buffer, int length) |
---|
397 | { |
---|
398 | char* tty_address; |
---|
399 | size_t ntasks = (size_t)&NB_TASKS; |
---|
400 | size_t nprocs = (size_t)&NB_PROCS; |
---|
401 | size_t nclusters = (size_t)&NB_CLUSTERS; |
---|
402 | unsigned int base = (unsigned int)&seg_tty_base; |
---|
403 | unsigned int increment = _segment_increment(ntasks*TTY_SPAN*4); |
---|
404 | size_t pid = _procid(); |
---|
405 | size_t tid = _current_task_array[pid]; |
---|
406 | |
---|
407 | if( length != 1) return -1; |
---|
408 | if( pid >= nprocs*nclusters ) return -1; |
---|
409 | if( tid >= ntasks ) return -1; |
---|
410 | |
---|
411 | tty_address = (char*)(base + increment + tid*TTY_SPAN*4); |
---|
412 | |
---|
413 | if((tty_address[TTY_STATUS*4] & 0x1) == 0x1) |
---|
414 | { |
---|
415 | buffer[0] = tty_address[TTY_READ*4]; |
---|
416 | return 1; |
---|
417 | } |
---|
418 | else |
---|
419 | { |
---|
420 | return 0; |
---|
421 | } |
---|
422 | } |
---|
423 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
424 | // _tty_read_irq() |
---|
425 | // iAS it uses the TTY_GET_IRQ interrupt and the associated kernel buffer, |
---|
426 | // that has been written by the ISR, this function does not access the TTY registers. |
---|
427 | // It fetch one single character from the _tty_get_buf[tty_index] kernel buffer, writes |
---|
428 | // this character to the user buffer, and reset the _tty_get_full[tty_index] buffer. |
---|
429 | // This is a non blocking call : it returns 0 if the kernel buffer is empty, |
---|
430 | // and returns 1 if the buffer is full. |
---|
431 | // It returns -1 in case of error (proc_id or task_id too large, or length != 1) |
---|
432 | // The length argument is not used in this implementation, and has been |
---|
433 | // introduced for future implementations. |
---|
434 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
435 | in_drivers int _tty_read_irq(char* buffer, int length) |
---|
436 | { |
---|
437 | int pid = _procid(); |
---|
438 | int tid = _current_task_array[pid]; |
---|
439 | int ntasks = (int)&NB_TASKS; |
---|
440 | int nprocs = (int)&NB_PROCS; |
---|
441 | int nclusters = (int)&NB_CLUSTERS; |
---|
442 | int tty_index; |
---|
443 | |
---|
444 | if( length != 1) return -1; |
---|
445 | if( pid >= nprocs*nclusters ) return -1; |
---|
446 | if( tid >= ntasks ) return -1; |
---|
447 | |
---|
448 | tty_index = pid*ntasks + tid; |
---|
449 | if( _tty_get_full[tty_index] == 0 ) return 0; |
---|
450 | |
---|
451 | *buffer = _tty_get_buf[tty_index]; |
---|
452 | _tty_get_full[tty_index] = 0; |
---|
453 | return 1; |
---|
454 | } |
---|
455 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
456 | // _exit() |
---|
457 | // Exit (suicide) after printing message on a TTY terminal. |
---|
458 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
459 | in_drivers int _exit() |
---|
460 | { |
---|
461 | char buf[] = "\n\n!!! Exit Processor !!!\n"; |
---|
462 | int pid = _procid(); |
---|
463 | |
---|
464 | buf[24] = '0'; |
---|
465 | buf[25] = 'x'; |
---|
466 | buf[26] = (char)((pid>>8) & 0xF) + 0x30; |
---|
467 | buf[27] = (char)((pid>>4) & 0xF) + 0x30; |
---|
468 | buf[28] = (char)(pid & 0xF) + 0x30; |
---|
469 | _tty_write(buf, 36); |
---|
470 | |
---|
471 | while(1) asm volatile("nop"); // infinite loop... |
---|
472 | } |
---|
473 | |
---|
474 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
475 | // _icu_write() |
---|
476 | // Write a 32 bits word in a memory mapped register of the ICU peripheral |
---|
477 | // The base address is defined by the processor ID |
---|
478 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
479 | in_drivers int _icu_write(size_t register_index, int value) |
---|
480 | { |
---|
481 | int* icu_address; |
---|
482 | unsigned int base = (int)&seg_icu_base; |
---|
483 | unsigned int increment = _segment_increment(ICU_SPAN*4); |
---|
484 | |
---|
485 | if( register_index >= ICU_SPAN ) return -1; |
---|
486 | |
---|
487 | icu_address = (int*)(base + increment); |
---|
488 | icu_address[register_index] = value; // write word |
---|
489 | return 0; |
---|
490 | } |
---|
491 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
492 | // _icu_read() |
---|
493 | // Read a 32 bits word in a memory mapped register of the ICU peripheral |
---|
494 | // The ICU base address is defined by the processor ID |
---|
495 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
496 | in_drivers int _icu_read(size_t register_index, int* buffer) |
---|
497 | { |
---|
498 | int* icu_address; |
---|
499 | unsigned int base = (int)&seg_icu_base; |
---|
500 | unsigned int increment = _segment_increment(ICU_SPAN*4); |
---|
501 | |
---|
502 | if( register_index >= ICU_SPAN ) return -1; |
---|
503 | |
---|
504 | icu_address = (int*)(base + increment); |
---|
505 | *buffer = icu_address[register_index]; // read word |
---|
506 | return 0; |
---|
507 | } |
---|
508 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
509 | // _gcd_write() |
---|
510 | // Write a 32 bits word in a memory mapped register of the GCD coprocessor |
---|
511 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
512 | in_drivers int _gcd_write(size_t register_index, int value) |
---|
513 | { |
---|
514 | int* gcd_address; |
---|
515 | if( register_index >= 4 ) return -1; |
---|
516 | |
---|
517 | gcd_address = (int*)&seg_gcd_base; |
---|
518 | gcd_address[register_index] = value; // write word |
---|
519 | return 0; |
---|
520 | } |
---|
521 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
522 | // _gcd_read() |
---|
523 | // Read a 32 bits word in a memory mapped register of the GCD coprocessor |
---|
524 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
525 | in_drivers int _gcd_read(size_t register_index, int* buffer) |
---|
526 | { |
---|
527 | int* gcd_address; |
---|
528 | if( register_index >= 4 ) return -1; |
---|
529 | |
---|
530 | gcd_address = (int*)&seg_gcd_base; |
---|
531 | *buffer = gcd_address[register_index]; // read word |
---|
532 | return 0; |
---|
533 | } |
---|
534 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
535 | // _locks_write() |
---|
536 | // Release a software spin-lock |
---|
537 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
538 | in_drivers int _locks_write(size_t index) |
---|
539 | |
---|
540 | { |
---|
541 | int max = (int)&NB_LOCKS; |
---|
542 | if( index >= max ) return -1; |
---|
543 | |
---|
544 | _spin_lock[index] = 0; |
---|
545 | return 0; |
---|
546 | } |
---|
547 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
548 | // _locks_read() |
---|
549 | // Try to take a software spin-lock. |
---|
550 | // This is a blocking call, as there is a busy-waiting loop, |
---|
551 | // until the lock is granted to the requester. |
---|
552 | // There is an internal delay of about 100 cycles between |
---|
553 | // two successive lock read, to avoid bus saturation. |
---|
554 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
555 | in_drivers int _locks_read(size_t index) |
---|
556 | { |
---|
557 | int max = (int)&NB_LOCKS; |
---|
558 | if( index >= max ) return -1; |
---|
559 | |
---|
560 | register int delay = ( (_proctime() + _procid() ) & 0xF) << 4; |
---|
561 | register int* plock = (int*)&_spin_lock[index]; |
---|
562 | |
---|
563 | asm volatile ("_locks_llsc: \n" |
---|
564 | "ll $2, 0(%0) \n" // $2 <= _locks_lock |
---|
565 | "bnez $2, _locks_delay \n" // random delay if busy |
---|
566 | "li $3, 1 \n" // prepare argument for sc |
---|
567 | "sc $3, 0(%0) \n" // try to set _locks_busy |
---|
568 | "bnez $3, _locks_ok \n" // exit if atomic |
---|
569 | "_locks_delay: \n" |
---|
570 | "move $4, %1 \n" // $4 <= delay |
---|
571 | "_locks_loop: \n" |
---|
572 | "addi $4, $4, -1 \n" // $4 <= $4 - 1 |
---|
573 | "beqz $4, _locks_loop \n" // test end delay |
---|
574 | "j _locks_llsc \n" // retry |
---|
575 | "_locks_ok: \n" |
---|
576 | ::"r"(plock),"r"(delay):"$2","$3","$4"); |
---|
577 | return 0; |
---|
578 | } |
---|
579 | ////////////////////////////////////////////////////////////////////////////////////////// |
---|
580 | // I/O BLOCK_DEVICE |
---|
581 | // The three functions below use the three variables _ioc_lock _ioc_done, |
---|
582 | // and _ioc_status for synchronsation. |
---|
583 | // - As the IOC component can be used by several programs running in parallel, |
---|
584 | // the _ioc_lock variable guaranties exclusive access to the device. |
---|
585 | // The _ioc_read() and _ioc_write() functions use atomic LL/SC to get the lock. |
---|
586 | // and set _ioc_lock to a non zero value. |
---|
587 | // The _ioc_write() and _ioc_read() functions are blocking, polling the _ioc_lock |
---|
588 | // variable until the device is available. |
---|
589 | // - When the tranfer is completed, the ISR routine activated by the IOC IRQ |
---|
590 | // set the _ioc_done variable to a non-zero value. Possible address errors detected |
---|
591 | // by the IOC peripheral are reported by the ISR in the _ioc_status variable. |
---|
592 | // The _ioc_completed() function is polling the _ioc_done variable, waiting for |
---|
593 | // tranfer conpletion. When the completion is signaled, the _ioc_completed() function |
---|
594 | // reset the _ioc_done variable to zero, and releases the _ioc_lock variable. |
---|
595 | // |
---|
596 | // In a multi-tasks environment, this polling policy must be replaced by a |
---|
597 | // descheduling policy for the requesting process. |
---|
598 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
599 | // _ioc_get_lock() |
---|
600 | // This blocking function is used by the _ioc_read() and _ioc_write() functions |
---|
601 | // to get _ioc_lock using LL/SC. |
---|
602 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
603 | in_drivers void _ioc_get_lock() |
---|
604 | { |
---|
605 | register unsigned int delay = (_proctime() & 0xF) << 4; |
---|
606 | register unsigned int* plock = (unsigned int*)&_ioc_lock; |
---|
607 | |
---|
608 | asm volatile ("_ioc_llsc: \n" |
---|
609 | "ll $2, 0(%0) \n" // $2 <= _ioc_lock |
---|
610 | "bnez $2, _ioc_delay \n" // random delay if busy |
---|
611 | "li $3, 1 \n" // prepare argument for sc |
---|
612 | "sc $3, 0(%0) \n" // try to set _ioc_busy |
---|
613 | "bnez $3, _ioc_ok \n" // exit if atomic |
---|
614 | "_ioc_delay: \n" |
---|
615 | "move $4, %1 \n" // $4 <= delay |
---|
616 | "_ioc_loop: \n" |
---|
617 | "addi $4, $4, -1 \n" // $4 <= $4 - 1 |
---|
618 | "beqz $4, _ioc_loop \n" // test end delay |
---|
619 | "j _ioc_llsc \n" // retry |
---|
620 | "_ioc_ok: \n" |
---|
621 | ::"r"(plock),"r"(delay):"$2","$3","$4"); |
---|
622 | } |
---|
623 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
624 | // _ioc_write() |
---|
625 | // Transfer data from a memory buffer to a file on the block_device. |
---|
626 | // - lba : first block index on the disk |
---|
627 | // - buffer : base address of the memory buffer |
---|
628 | // - count : number of blocks to be transfered |
---|
629 | // The source buffer must be in user address space. |
---|
630 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
631 | in_drivers int _ioc_write(size_t lba, void* buffer, size_t count) |
---|
632 | { |
---|
633 | volatile unsigned int* ioc_address = (unsigned int*)&seg_ioc_base; |
---|
634 | |
---|
635 | // buffer must be in user space |
---|
636 | // size_t block_size = ioc_address[BLOCK_DEVICE_BLOCK_SIZE]; |
---|
637 | // if( ( (size_t)buffer + block_size*count ) >= 0x80000000 ) return -1; |
---|
638 | // if( ( (size_t)buffer ) >= 0x80000000 ) return -1; |
---|
639 | |
---|
640 | // get the lock |
---|
641 | _ioc_get_lock(); |
---|
642 | |
---|
643 | // block_device configuration |
---|
644 | ioc_address[BLOCK_DEVICE_BUFFER] = (int)buffer; |
---|
645 | ioc_address[BLOCK_DEVICE_COUNT] = count; |
---|
646 | ioc_address[BLOCK_DEVICE_LBA] = lba; |
---|
647 | ioc_address[BLOCK_DEVICE_IRQ_ENABLE] = 1; |
---|
648 | ioc_address[BLOCK_DEVICE_OP] = BLOCK_DEVICE_WRITE; |
---|
649 | return 0; |
---|
650 | } |
---|
651 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
652 | // _ioc_read() |
---|
653 | // Transfer data from a file on the block device to a memory buffer. |
---|
654 | // - lba : first block index on the disk |
---|
655 | // - buffer : base address of the memory buffer |
---|
656 | // - count : number of blocks to be transfered |
---|
657 | // The destination buffer must be in user address space. |
---|
658 | // All cache lines corresponding to the the target buffer must be invalidated |
---|
659 | // for cache coherence. |
---|
660 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
661 | in_drivers int _ioc_read(size_t lba, void* buffer, size_t count) |
---|
662 | { |
---|
663 | volatile unsigned int* ioc_address = (unsigned int*)&seg_ioc_base; |
---|
664 | |
---|
665 | // buffer must be in user space |
---|
666 | // size_t block_size = ioc_address[BLOCK_DEVICE_BLOCK_SIZE]; |
---|
667 | // if( ( (size_t)buffer + block_size*count ) >= 0x80000000 ) return -1; |
---|
668 | // if( ( (size_t)buffer ) >= 0x80000000 ) return -1; |
---|
669 | |
---|
670 | // get the lock |
---|
671 | _ioc_get_lock(); |
---|
672 | |
---|
673 | // block_device configuration |
---|
674 | ioc_address[BLOCK_DEVICE_BUFFER] = (int)buffer; |
---|
675 | ioc_address[BLOCK_DEVICE_COUNT] = count; |
---|
676 | ioc_address[BLOCK_DEVICE_LBA] = lba; |
---|
677 | ioc_address[BLOCK_DEVICE_IRQ_ENABLE] = 1; |
---|
678 | ioc_address[BLOCK_DEVICE_OP] = BLOCK_DEVICE_READ; |
---|
679 | |
---|
680 | return 0; |
---|
681 | } |
---|
682 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
683 | // _ioc_completed() |
---|
684 | // This blocking function cheks completion of an I/O transfer and reports errors. |
---|
685 | // It returns 0 if the transfer is successfully completed. |
---|
686 | // It returns -1 if an error has been reported. |
---|
687 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
688 | in_drivers int _ioc_completed() |
---|
689 | { |
---|
690 | // waiting for completion |
---|
691 | while (_ioc_done == 0) { asm volatile("nop"); } |
---|
692 | |
---|
693 | // reset synchronisation variables |
---|
694 | _ioc_done = 0; |
---|
695 | _ioc_lock = 0; |
---|
696 | |
---|
697 | // return errors |
---|
698 | if((_ioc_status != BLOCK_DEVICE_READ_SUCCESS) && |
---|
699 | (_ioc_status != BLOCK_DEVICE_WRITE_SUCCESS)) return -1; |
---|
700 | else return 0; |
---|
701 | } |
---|
702 | |
---|
703 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
704 | // FRAME_BUFFER |
---|
705 | // The _fb_sync_write & _fb_sync_read functions use a memcpy strategy to implement |
---|
706 | // the transfer between a data buffer (user space) and the frame buffer (kernel space). |
---|
707 | // They are blocking until completion of the transfer. |
---|
708 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
709 | // _fb_sync_write() |
---|
710 | // Transfer data from an user buffer to the frame_buffer device with a memcpy. |
---|
711 | // - offset : offset (in bytes) in the frame buffer |
---|
712 | // - buffer : base address of the memory buffer |
---|
713 | // - length : number of bytes to be transfered |
---|
714 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
715 | in_drivers int _fb_sync_write(size_t offset, void* buffer, size_t length) |
---|
716 | { |
---|
717 | volatile char* fb = (char*)(void*)&seg_fb_base + offset; |
---|
718 | char* ub = buffer; |
---|
719 | size_t i; |
---|
720 | |
---|
721 | // buffer must be in user space |
---|
722 | // if( ( (size_t)buffer + length ) >= 0x80000000 ) return -1; |
---|
723 | // if( ( (size_t)buffer ) >= 0x80000000 ) return -1; |
---|
724 | |
---|
725 | // memory copy |
---|
726 | for(i=0 ; i<length ; i++) fb[i] = ub[i]; |
---|
727 | return 0; |
---|
728 | } |
---|
729 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
730 | // _fb_sync_read() |
---|
731 | // Transfer data from the frame_buffer device to an user buffer with a memcpy. |
---|
732 | // - offset : offset (in bytes) in the frame buffer |
---|
733 | // - buffer : base address of the memory buffer |
---|
734 | // - length : number of bytes to be transfered |
---|
735 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
736 | in_drivers int _fb_sync_read(size_t offset, void* buffer, size_t length) |
---|
737 | { |
---|
738 | volatile char* fb = (char*)(void*)&seg_fb_base + offset; |
---|
739 | char* ub = buffer; |
---|
740 | size_t i; |
---|
741 | |
---|
742 | // buffer must be in user space |
---|
743 | // if( ( (size_t)buffer + length ) >= 0x80000000 ) return -1; |
---|
744 | // if( ( (size_t)buffer ) >= 0x80000000 ) return -1; |
---|
745 | |
---|
746 | // memory copy |
---|
747 | for(i=0 ; i<length ; i++) ub[i] = fb[i]; |
---|
748 | return 0; |
---|
749 | } |
---|
750 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
751 | // The _fb_write() and _fb_read() functions use the MULTI_DMA |
---|
752 | // coprocessor to transfer data between the user buffer and the frame buffer. |
---|
753 | // The _fb_completed() function, use a polling policy to test |
---|
754 | // the global variables _dma_busy[i] and detect the transfer completion. |
---|
755 | // As each processor can have it's private DMA, there is up to 256 _dma_busy[i] |
---|
756 | // set/reset variables that are indexed by the proc_id. |
---|
757 | // The _dma_busy variable is reset by the ISR associated to the DMA IRQ. |
---|
758 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
759 | // _fb_write() |
---|
760 | // Transfer data from an user buffer to the frame_buffer device using DMA. |
---|
761 | // - offset : offset (in bytes) in the frame buffer |
---|
762 | // - buffer : base address of the memory buffer |
---|
763 | // - length : number of bytes to be transfered |
---|
764 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
765 | in_drivers int _fb_write(size_t offset, void* buffer, size_t length) |
---|
766 | { |
---|
767 | int* dma_address; |
---|
768 | unsigned int base = (unsigned int)&seg_dma_base; |
---|
769 | unsigned int increment = _segment_increment(DMA_SPAN*4); |
---|
770 | char* fb = (char*)&seg_fb_base + offset; |
---|
771 | unsigned int delay = (_proctime() & 0xF) << 4; |
---|
772 | unsigned int pid = _procid(); |
---|
773 | unsigned int i; |
---|
774 | |
---|
775 | |
---|
776 | // checking buffer boundaries (bytes) |
---|
777 | // if( ( (size_t)buffer + length ) >= 0x80000000 ) return -1; |
---|
778 | // if( ( (size_t)buffer ) >= 0x80000000 ) return -1; |
---|
779 | |
---|
780 | // waiting until DMA device is available |
---|
781 | while (_dma_busy[pid] != 0) |
---|
782 | { |
---|
783 | for( i=0 ; i<delay ; i++) // busy waiting |
---|
784 | { // with a pseudo random |
---|
785 | asm volatile("nop"); // delay between bus accesses |
---|
786 | } |
---|
787 | } |
---|
788 | _dma_busy[pid] = 1; |
---|
789 | |
---|
790 | dma_address = (int*)(base + increment); |
---|
791 | |
---|
792 | // DMA configuration |
---|
793 | dma_address[DMA_IRQ_DISABLE] = 0; |
---|
794 | dma_address[DMA_SRC] = (int)buffer; |
---|
795 | dma_address[DMA_DST] = (int)fb; |
---|
796 | dma_address[DMA_LEN] = (int)length; |
---|
797 | return 0; |
---|
798 | } |
---|
799 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
800 | // _fb_read() |
---|
801 | // Transfer data from the frame_buffer device to an user buffer using DMA. |
---|
802 | // - offset : offset (in bytes) in the frame buffer |
---|
803 | // - buffer : base address of the memory buffer |
---|
804 | // - length : number of bytes to be transfered |
---|
805 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
806 | in_drivers int _fb_read(size_t offset, void* buffer, size_t length) |
---|
807 | { |
---|
808 | int* dma_address; |
---|
809 | unsigned int base = (unsigned int)&seg_dma_base; |
---|
810 | unsigned int increment = _segment_increment(DMA_SPAN*4); |
---|
811 | char* fb = (char*)&seg_fb_base + offset; |
---|
812 | unsigned int delay = (_proctime() & 0xF) << 4; |
---|
813 | unsigned int pid = _procid(); |
---|
814 | unsigned int i; |
---|
815 | |
---|
816 | // checking buffer boundaries (bytes) |
---|
817 | // if( ( (size_t)buffer + length ) >= 0x80000000 ) return -1; |
---|
818 | // if( ( (size_t)buffer ) >= 0x80000000 ) return -1; |
---|
819 | |
---|
820 | // waiting until DMA device is available |
---|
821 | while (_dma_busy[pid] != 0) |
---|
822 | { |
---|
823 | for( i=0 ; i<delay ; i++) // busy waiting |
---|
824 | { // with a pseudo random |
---|
825 | asm volatile("nop"); // delay between bus accesses |
---|
826 | } |
---|
827 | } |
---|
828 | _dma_busy[pid] = 1; |
---|
829 | |
---|
830 | dma_address = (int*)(base + increment); |
---|
831 | |
---|
832 | // DMA configuration |
---|
833 | dma_address[DMA_IRQ_DISABLE] = 0; |
---|
834 | dma_address[DMA_SRC] = (int)fb; |
---|
835 | dma_address[DMA_DST] = (int)buffer; |
---|
836 | dma_address[DMA_LEN] = (int)length; |
---|
837 | return 0; |
---|
838 | } |
---|
839 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
840 | // _fb_completed() |
---|
841 | // This blocking function cheks completion of a DMA transfer to or fom the frame buffer. |
---|
842 | // The MIPS32 wait instruction stall the processor until the next interrupt. |
---|
843 | // It returns 0 if the transfer is successfully completed |
---|
844 | // It returns -1 if an error has been reported. |
---|
845 | /////////////////////////////////////////////////////////////////////////////////////// |
---|
846 | in_drivers int _fb_completed() |
---|
847 | { |
---|
848 | unsigned int pid = _procid(); |
---|
849 | |
---|
850 | while (_dma_busy[pid] != 0) |
---|
851 | { |
---|
852 | asm volatile("nop"); |
---|
853 | } |
---|
854 | if(_dma_status[pid] == DMA_SUCCESS) return 0; |
---|
855 | else return _dma_status[pid]; |
---|
856 | } |
---|
857 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
858 | // _barrier_init() |
---|
859 | // This function makes a cooperative initialisation of the barrier: |
---|
860 | // Several tasks can try to initialize the barrier, but the initialisation |
---|
861 | // is done by only one task, using LL/SC instructions. |
---|
862 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
863 | in_drivers int _barrier_init(unsigned int index, unsigned int value) |
---|
864 | { |
---|
865 | |
---|
866 | register int* pinit = (int*)&_barrier_initial_value[index]; |
---|
867 | register int* pcount = (int*)&_barrier_count[index]; |
---|
868 | |
---|
869 | if ( index > 7 ) return 1; |
---|
870 | |
---|
871 | // parallel initialisation using atomic instructions LL/SC |
---|
872 | asm volatile ("_barrier_init_test: \n" |
---|
873 | "ll $2, 0(%0) \n" // read initial value |
---|
874 | "bnez $2, _barrier_init_done \n" |
---|
875 | "move $3, %2 \n" |
---|
876 | "sc $3, 0(%0) \n" // try to write initial value |
---|
877 | "beqz $3, _barrier_init_test \n" |
---|
878 | "move $3, %2 \n" |
---|
879 | "sw $3, 0(%1) \n" // write count |
---|
880 | "_barrier_init_done: \n" |
---|
881 | ::"r"(pinit),"r"(pcount),"r"(value):"$2","$3"); |
---|
882 | return 0 ; |
---|
883 | } |
---|
884 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
885 | // _barrier_wait() |
---|
886 | // This blocking function uses a busy_wait technics (on the counter value), |
---|
887 | // because the GIET does not support dynamic scheduling/descheduling of tasks. |
---|
888 | // In the busy waiting state, each task uses a pseudo-random delay between |
---|
889 | // two successive read of the barrier counter in order to avoid bus saturation. |
---|
890 | // the average delay is about 1000 cycles. |
---|
891 | // There is at most 8 independant barriers, and an error is returned |
---|
892 | // if the barrier index is larger than 7. |
---|
893 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
894 | in_drivers int _barrier_wait(unsigned int index) |
---|
895 | { |
---|
896 | register int* pcount = (int*)&_barrier_count[index]; |
---|
897 | register int maxcount = _barrier_initial_value[index]; |
---|
898 | register int count; |
---|
899 | |
---|
900 | if ( index > 7 ) return 1; |
---|
901 | |
---|
902 | // parallel decrement barrier counter using atomic instructions LL/SC |
---|
903 | // input : pointer on the barrier counter |
---|
904 | // output : counter value |
---|
905 | asm volatile ("_barrier_decrement: \n" |
---|
906 | "ll %0, 0(%1) \n" |
---|
907 | "addi $3, %0, -1 \n" |
---|
908 | "sc $3, 0(%1) \n" |
---|
909 | "beqz $3, _barrier_decrement \n" |
---|
910 | :"=r"(count):"r"(pcount):"$2","$3"); |
---|
911 | |
---|
912 | // the last task re-initializes the barrier counter |
---|
913 | // to the max value, waking up all other waiting tasks |
---|
914 | |
---|
915 | if ( count == 1 ) // last task |
---|
916 | { |
---|
917 | *pcount = maxcount; |
---|
918 | return 0; |
---|
919 | } |
---|
920 | else // other tasks |
---|
921 | { |
---|
922 | while ( *pcount != maxcount ) { } // busy waiting |
---|
923 | return 0 ; |
---|
924 | } |
---|
925 | } |
---|
926 | ////////////////////////////////////////////////////////////////////////////////////// |
---|
927 | |
---|
928 | |
---|
929 | // Local Variables: |
---|
930 | // tab-width: 4; |
---|
931 | // c-basic-offset: 4; |
---|
932 | // c-file-offsets:((innamespace . 0)(inline-open . 0)); |
---|
933 | // indent-tabs-mode: nil; |
---|
934 | // End: |
---|
935 | // |
---|
936 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|
937 | |
---|