source: trunk/softs/test_llsc/scripts/tsarch.py @ 545

Last change on this file since 545 was 536, checked in by meunier, 11 years ago

Added a tool which generates tests for the LL/SC table, in the soft/ directory.

  • Property svn:executable set to *
File size: 1.6 KB
Line 
1#!/usr/bin/env python
2
3from dsx.hard.hard import *
4
5
6def TSArch(cluster_x, cluster_y, nb_proc = 1, nb_tty = 8, wcoproc = False):
7 
8    nb_cluster = cluster_x * cluster_y
9
10    hd = Hardware(cluster_x, cluster_y , addr_size = 40, nb_proc = nb_proc, ccoherence = True) #nb_proc : proc by cluster
11
12
13    ######### peripherals ##########
14    hd.add(Tty('PSEG_TTY', pbase = 0xB4000000, channel_size = 16, nb_channel = nb_tty))
15    hd.add(Fbf('PSEG_FBF', pbase = 0xB2000000, channel_size = 352 * 288 * 2, nb_channel = 1))
16    hd.add(Ioc('PSEG_IOC', pbase = 0xB3000000, channel_size = 32, nb_channel = 1))
17
18    hd.add(Xicu('PSEG_XICU', pbase = 0xB0000000, channel_size = 32, nb_channel = nb_proc, replicated = True)) # name suffixed with "_<num_cluster>"
19    hd.add(Dma('PSEG_DMA', pbase = 0xB1000000, channel_size = 32, nb_channel = nb_proc, replicated = True))
20   
21    ############## MEMORY ###########
22    for cl in range(nb_cluster):
23        hd.add(RAM('PSEG_RAM_%d'%cl, pbase = 0x00000000 + (cl * hd.cluster_span), size = 0x00C00000))
24
25    ############## IRQ ############
26    hd.add(Irq(cluster_id = 0, proc_id = 0, icu_irq_id = 31, peri = Ioc, channel_id = 0))
27    for j in range(16, 31):
28        hd.add(Irq(cluster_id = 0, proc_id = 0, icu_irq_id = j, peri = Tty, channel_id = j - 16))
29
30    for cl in range(nb_cluster):
31        for p in xrange(nb_proc):
32            hd.add(Irq(cluster_id = cl, proc_id = p, icu_irq_id = p + 8, peri = Dma,  channel_id = p))
33            hd.add(Irq(cluster_id = cl, proc_id = p, icu_irq_id = p,     peri = Xicu, channel_id = p)) 
34
35
36    ############# ROM ############
37    hd.add(ROM("PSEG_ROM", pbase = 0xbfc00000, size = 0x00100000)) 
38
39    return hd
40
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