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Last change
on this file was 836, checked in by meunier, 12 years ago |
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Trunk:
- Cosmetic in mem_cache_directory.h and xram_transaction.h
- Renamed mem_cache param dspin_in_width and dspin_out_width to memc_dspin_in_width
and memc_dspin_out_width (because of a bug in soclib-cc ?). Should have updated these
names in the .sd or .py files of all platforms
- Updated the scripts for tsar_generic_xbar to take into account the ideal write-through +
added a graph in create_graphs.py
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-
Property svn:executable
set to
*
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File size:
1.2 KB
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| 1 | #!/bin/sh
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| 2 |
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| 3 | SOCLIB_TTY=TERM
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| 4 | export SOCLIB_TTY
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| 5 |
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| 6 | for dir in test_sanity test_exceptions test_mmu_basic \
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| 7 | test_excep_ls test_excep_ls_delayslot test_excep_ls_llsc \
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| 8 | test_excep_if test_excep_if_delayslot test_excep_if_llsc \
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| 9 | test_exception_epc_modify \
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| 10 | test_dtlb_inval test_dtlb_inval2 test_dtlb_inval3 \
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| 11 | test_itlb_inval test_itlb_inval2 \
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| 12 | test_idtlb_inval test_idtlb_inval2 test_idtlb_inval3 test_idtlb_inval4 \
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| 13 | test_dtlb_ptprinval test_itlb_ptprinval test_idtlb_ptprinval \
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| 14 | test_sync \
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| 15 | test_llsc test_sc_no_ll test_sc_update_cache test_pte_llsc \
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| 16 | test_interrupt \
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| 17 | test_interrupt_epc_modify \
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| 18 | test_xicu_timer \
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| 19 | test_interrupt_delayslot \
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| 20 | test_interrupt_mask \
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| 21 | test_interrupt_external_mask \
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| 22 | test_excep_cop test_excep_cop_delayslot test_excep_cop1 \
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| 23 | test_syscall test_syscall_delayslot \
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| 24 | test_breakpoint test_breakpoint_delayslot \
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| 25 | test_ri test_ri_delayslot \
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| 26 | test_ao test_ao_delayslot \
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| 27 | test_trap test_trap_delayslot \
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| 28 | test_dcache_inval_pa test_icache_inval_pa \
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| 29 | test_pte2i_ref test_pte2lw_ref test_pte2ll_ref test_pte2sw_dirty test_pte2sc_dirty \
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| 30 | test_dma_basic test_dma_unaligned \
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| 31 | ; do
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| 32 | echo -n ${dir}": "
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| 33 | (cd $dir && ./run)
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| 34 | done
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