| 1 | /* |
|---|
| 2 | * ifetch bus fault exception test: we can restart the faulting instruction |
|---|
| 3 | * We use the MMU to cause fault. |
|---|
| 4 | */ |
|---|
| 5 | #include <registers.h> |
|---|
| 6 | #include <misc.h> |
|---|
| 7 | #include <vcache.h> |
|---|
| 8 | |
|---|
| 9 | .text |
|---|
| 10 | .globl _start |
|---|
| 11 | _start: |
|---|
| 12 | .set noreorder |
|---|
| 13 | la k0, TTY_BASE |
|---|
| 14 | la k1, EXIT_BASE |
|---|
| 15 | la sp, 0x00200000 - 16 |
|---|
| 16 | |
|---|
| 17 | PRINT(startstr) |
|---|
| 18 | |
|---|
| 19 | /* reset cop0 status (keep BEV) */ |
|---|
| 20 | lui a0, 0x0040; |
|---|
| 21 | mtc0 a0, COP0_STATUS |
|---|
| 22 | |
|---|
| 23 | la a0, pte1 |
|---|
| 24 | srl a0, a0, 13 |
|---|
| 25 | mtc2 a0, VC_PTPR |
|---|
| 26 | nop |
|---|
| 27 | |
|---|
| 28 | li a0, VC_TLB_EN_ITLB | VC_TLB_EN_DTLB | VC_TLB_EN_ICACHE | VC_TLB_EN_DCACHE |
|---|
| 29 | mtc2 a0, VC_TLB_EN |
|---|
| 30 | |
|---|
| 31 | PRINT(mmustr) |
|---|
| 32 | |
|---|
| 33 | move a1, zero |
|---|
| 34 | la s0, testval |
|---|
| 35 | jal doload |
|---|
| 36 | move a0, s0 |
|---|
| 37 | PRINTX |
|---|
| 38 | PUTCHAR(':') |
|---|
| 39 | PUTCHAR(' ') |
|---|
| 40 | move a0, a1 |
|---|
| 41 | PRINTX |
|---|
| 42 | PUTCHAR('\n') |
|---|
| 43 | |
|---|
| 44 | /* we should get there */ |
|---|
| 45 | EXIT(0) |
|---|
| 46 | |
|---|
| 47 | .globl excep |
|---|
| 48 | excep: |
|---|
| 49 | .set noreorder |
|---|
| 50 | /* don't clobber a0 and ra */ |
|---|
| 51 | addiu sp, sp, -8 |
|---|
| 52 | sw a0, 4(sp) |
|---|
| 53 | sw ra, 8(sp) |
|---|
| 54 | |
|---|
| 55 | PRINT(statusstr) |
|---|
| 56 | mfc0 a0, COP0_STATUS |
|---|
| 57 | PRINTX |
|---|
| 58 | |
|---|
| 59 | PRINT(causestr) |
|---|
| 60 | mfc0 a0, COP0_CAUSE |
|---|
| 61 | PRINTX |
|---|
| 62 | |
|---|
| 63 | PRINT(pcstr) |
|---|
| 64 | mfc0 a0, COP0_EXPC |
|---|
| 65 | PRINTX |
|---|
| 66 | |
|---|
| 67 | PRINT(badvastr) |
|---|
| 68 | mfc0 a0, COP_0_BADVADDR |
|---|
| 69 | PRINTX |
|---|
| 70 | |
|---|
| 71 | PUTCHAR('\n') |
|---|
| 72 | /* map VA 0xbfc01000 at PA 0xbfc01000 */ |
|---|
| 73 | la t0, pte2 + VADDR_TO_PTE2I(0xbfc01000) * 8 |
|---|
| 74 | la a0, (0xbfc01000 >> PTE2_SHIFT) |
|---|
| 75 | sw a0, 4(t0) |
|---|
| 76 | la a0, (PTE2_V | PTE2_C | PTE2_X) |
|---|
| 77 | sw a0, 0(t0) |
|---|
| 78 | /* la a0, 0xbfc01000 |
|---|
| 79 | mtc2 a0, VC_ITLB_INVAL */ |
|---|
| 80 | |
|---|
| 81 | lw a0, 4(sp) |
|---|
| 82 | lw ra, 8(sp) |
|---|
| 83 | addiu sp, sp, 8 |
|---|
| 84 | eret |
|---|
| 85 | |
|---|
| 86 | .rodata: |
|---|
| 87 | statusstr: .ascii "status \0" |
|---|
| 88 | causestr: .ascii " cause \0" |
|---|
| 89 | pcstr: .ascii " pc \0" |
|---|
| 90 | badvastr: .ascii " badva \0" |
|---|
| 91 | mmustr: .ascii "mmu started\n\0" |
|---|
| 92 | startstr: .ascii "start\n\0" |
|---|
| 93 | |
|---|
| 94 | .org EXCEP_ADDRESS - BOOT_ADDRESS |
|---|
| 95 | .globl evect |
|---|
| 96 | evect: |
|---|
| 97 | j excep |
|---|
| 98 | nop |
|---|
| 99 | /* |
|---|
| 100 | * we use a ldscript trick here, to load this function at |
|---|
| 101 | * the appropriate address |
|---|
| 102 | */ |
|---|
| 103 | .section .text2, "ax" |
|---|
| 104 | .globl doload |
|---|
| 105 | doload: |
|---|
| 106 | jr ra |
|---|
| 107 | lw a1, 0(s0) /* this should trigger the exception */ |
|---|
| 108 | |
|---|
| 109 | /* we should not get there */ |
|---|
| 110 | nop |
|---|
| 111 | nop |
|---|
| 112 | EXIT(1) |
|---|
| 113 | |
|---|
| 114 | .data |
|---|
| 115 | .word MAGIC1 |
|---|
| 116 | testval: |
|---|
| 117 | .word MAGIC2 |
|---|
| 118 | .globl pte2 |
|---|
| 119 | pte2: |
|---|
| 120 | .align 12 |
|---|
| 121 | .word PTE2_V | PTE2_C | PTE2_X |
|---|
| 122 | .word BOOT_ADDRESS >> 12 |
|---|
| 123 | .org pte2 + 4092 |
|---|
| 124 | .globl pte1 |
|---|
| 125 | pte1: |
|---|
| 126 | .align 13 |
|---|
| 127 | .word PTE1_V | PTE1_C | PTE1_W | 0x0 /* map PA 0 at VA 0 */ |
|---|
| 128 | .word 0x0 |
|---|
| 129 | .org pte1 + (BOOT_ADDRESS >> 21) * 4 |
|---|
| 130 | .word PTE1_V | PTE1_T | (0x1000 >> 12) /* map PA 0xbfc00000 at VA 0xbfc00000 with 4k page: check real address of PTE2 !!! */ |
|---|
| 131 | .org pte1 + (TTY_BASE >> 21) * 4 |
|---|
| 132 | .word PTE1_V | PTE1_W | (TTY_BASE >> 21) /* map PA 0xd0200000 at VA 0xd0200000 */ |
|---|
| 133 | .org pte1 + (EXIT_BASE >> 21) * 4 |
|---|
| 134 | .word PTE1_V | PTE1_W | (EXIT_BASE >> 21) /* map PA 0xe0000000 at VA 0xe0000000 */ |
|---|
| 135 | .org pte1 + 8192 |
|---|