[520] | 1 | /* |
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| 2 | * ifetch bus fault exception test: we can restart the faulting instruction |
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| 3 | * when the fault occurs in the branch delay slot. |
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| 4 | * We use the MMU to cause fault. |
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| 5 | */ |
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| 6 | #include <registers.h> |
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| 7 | #include <misc.h> |
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| 8 | #include <vcache.h> |
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| 9 | .text |
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| 10 | .globl _start |
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| 11 | _start: |
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| 12 | .set noreorder |
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| 13 | la k0, TTY_BASE |
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| 14 | la k1, EXIT_BASE |
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| 15 | la sp, 0x00200000 - 16 |
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| 16 | |
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| 17 | PRINT(startstr) |
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| 18 | |
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| 19 | /* reset cop0 status (keep BEV) */ |
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| 20 | lui a0, 0x0040; |
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| 21 | mtc0 a0, COP0_STATUS |
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| 22 | |
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| 23 | la a0, pte1 |
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| 24 | srl a0, a0, 13 |
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| 25 | mtc2 a0, VC_PTPR |
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| 26 | nop |
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| 27 | |
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| 28 | li a0, VC_TLB_EN_ITLB | VC_TLB_EN_DTLB | VC_TLB_EN_ICACHE | VC_TLB_EN_DCACHE |
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| 29 | mtc2 a0, VC_TLB_EN |
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| 30 | |
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| 31 | PRINT(mmustr) |
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| 32 | |
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| 33 | move a1, zero |
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| 34 | la s0, testval |
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| 35 | jal doload |
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| 36 | move a0, s0 |
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| 37 | PRINTX |
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| 38 | PUTCHAR(':') |
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| 39 | PUTCHAR(' ') |
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| 40 | move a0, a1 |
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| 41 | PRINTX |
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| 42 | PUTCHAR('\n') |
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| 43 | |
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| 44 | /* we should get there */ |
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| 45 | EXIT(0) |
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| 46 | |
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| 47 | .globl excep |
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| 48 | excep: |
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| 49 | .set noreorder |
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| 50 | /* don't clobber a0 and ra */ |
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| 51 | addiu sp, sp, -8 |
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| 52 | sw a0, 4(sp) |
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| 53 | sw ra, 8(sp) |
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| 54 | |
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| 55 | PRINT(statusstr) |
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| 56 | mfc0 a0, COP0_STATUS |
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| 57 | PRINTX |
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| 58 | |
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| 59 | PRINT(causestr) |
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| 60 | mfc0 a0, COP0_CAUSE |
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| 61 | PRINTX |
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| 62 | |
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| 63 | PRINT(pcstr) |
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| 64 | mfc0 a0, COP0_EXPC |
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| 65 | PRINTX |
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| 66 | |
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| 67 | PRINT(badvastr) |
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| 68 | mfc0 a0, COP_0_BADVADDR |
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| 69 | PRINTX |
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| 70 | |
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| 71 | PUTCHAR('\n') |
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| 72 | /* map VA 0xbfc01000 at PA 0xbfc01000 */ |
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| 73 | la t0, pte2 + VADDR_TO_PTE2I(0xbfc01000) * 8 |
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| 74 | la a0, (0xbfc01000 >> PTE2_SHIFT) |
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| 75 | sw a0, 4(t0) |
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| 76 | la a0, (PTE2_V | PTE2_C | PTE2_X) |
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| 77 | sw a0, 0(t0) |
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| 78 | /* la a0, 0xbfc01000 |
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| 79 | mtc2 a0, VC_ITLB_INVAL */ |
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| 80 | |
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| 81 | lw a0, 4(sp) |
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| 82 | lw ra, 8(sp) |
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| 83 | addiu sp, sp, 8 |
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| 84 | eret |
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| 85 | |
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| 86 | .rodata: |
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| 87 | statusstr: .ascii "status \0" |
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| 88 | causestr: .ascii " cause \0" |
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| 89 | pcstr: .ascii " pc \0" |
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| 90 | badvastr: .ascii " badva \0" |
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| 91 | mmustr: .ascii "mmu started\n\0" |
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| 92 | startstr: .ascii "start\n\0" |
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| 93 | |
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| 94 | .org EXCEP_ADDRESS - BOOT_ADDRESS |
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| 95 | .globl evect |
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| 96 | evect: |
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| 97 | j excep |
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| 98 | nop |
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| 99 | /* |
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| 100 | * we use a ldscript trick here, to load this function at |
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| 101 | * the appropriate address |
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| 102 | */ |
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| 103 | .section .text2, "ax" |
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| 104 | .globl doload |
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| 105 | doload: |
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| 106 | jr ra |
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| 107 | lw a1, 0(s0) /* this should trigger the exception */ |
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| 108 | |
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| 109 | /* we should not get there */ |
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| 110 | nop |
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| 111 | nop |
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| 112 | EXIT(1) |
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| 113 | |
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| 114 | .data |
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| 115 | .word MAGIC1 |
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| 116 | testval: |
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| 117 | .word MAGIC2 |
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| 118 | .globl pte2 |
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| 119 | pte2: |
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| 120 | .align 12 |
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| 121 | .word PTE2_V | PTE2_C | PTE2_X |
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| 122 | .word BOOT_ADDRESS >> 12 |
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| 123 | .org pte2 + 4092 |
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| 124 | .globl pte1 |
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| 125 | pte1: |
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| 126 | .align 13 |
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| 127 | .word PTE1_V | PTE1_C | PTE1_W | 0x0 /* map PA 0 at VA 0 */ |
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| 128 | .word 0x0 |
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| 129 | .org pte1 + (BOOT_ADDRESS >> 21) * 4 |
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| 130 | .word PTE1_V | PTE1_T | (0x1000 >> 12) /* map PA 0xbfc00000 at VA 0xbfc00000 with 4k page: check real address of PTE2 !!! */ |
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| 131 | .org pte1 + (TTY_BASE >> 21) * 4 |
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| 132 | .word PTE1_V | PTE1_W | (TTY_BASE >> 21) /* map PA 0xd0200000 at VA 0xd0200000 */ |
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| 133 | .org pte1 + (EXIT_BASE >> 21) * 4 |
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| 134 | .word PTE1_V | PTE1_W | (EXIT_BASE >> 21) /* map PA 0xe0000000 at VA 0xe0000000 */ |
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| 135 | .org pte1 + 8192 |
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