Last change
on this file since 393 was
232,
checked in by alain, 12 years ago
|
Introducing the elementary tests for a TSAR mono-cluster
mono-processor platform with MMU using the vci_cc_vcache_v4
such as the "tsarv4_mono_mmu".
(assemby level tests written by Manuel Bouyer)
|
File size:
1.6 KB
|
Line | |
---|
1 | /* |
---|
2 | * Check that we can mask an external interrupt |
---|
3 | */ |
---|
4 | #include <registers.h> |
---|
5 | #include <misc.h> |
---|
6 | #include <xicu.h> |
---|
7 | |
---|
8 | .text |
---|
9 | .globl _start |
---|
10 | _start: |
---|
11 | .set noreorder |
---|
12 | la k0, TTY_BASE |
---|
13 | la k1, EXIT_BASE |
---|
14 | |
---|
15 | /* reset cop0 status (keep BEV), enable interrupt 0 */ |
---|
16 | lui a0, 0x0040; |
---|
17 | ori a0, 0xc801; |
---|
18 | mtc0 a0, COP0_STATUS |
---|
19 | |
---|
20 | /* reset cause, make sure IV is off */ |
---|
21 | mtc0 zero, COP0_CAUSE |
---|
22 | |
---|
23 | PRINT(startstr) |
---|
24 | |
---|
25 | /* program xicu */ |
---|
26 | la t0, XICU_BASE |
---|
27 | /* clear pending interrupt */ |
---|
28 | lw a0, XICU_PTI_ACK(0)(t0) |
---|
29 | /* route PTI0 to irq 0 */ |
---|
30 | li a0, 1 << 0 |
---|
31 | sw a0, XICU_MSK_PTI_E(0)(t0) |
---|
32 | /* interrupt in 10 cycles */ |
---|
33 | li a0, 10 |
---|
34 | sw a0, XICU_PTI_PER(0)(t0) |
---|
35 | /* interrupts still disabled at the MIPS level */ |
---|
36 | li a0, MAGIC1 |
---|
37 | PRINTX |
---|
38 | PUTCHAR('\n') |
---|
39 | nop |
---|
40 | nop |
---|
41 | nop |
---|
42 | nop |
---|
43 | nop |
---|
44 | nop |
---|
45 | nop |
---|
46 | nop |
---|
47 | nop |
---|
48 | nop |
---|
49 | /* enable interrupt from timer0 */ |
---|
50 | mfc0 a0, COP0_STATUS |
---|
51 | ori a0, 0x0400 |
---|
52 | mtc0 a0, COP0_STATUS |
---|
53 | |
---|
54 | nop |
---|
55 | nop |
---|
56 | |
---|
57 | 1: j 1b |
---|
58 | nop |
---|
59 | /* we should not end there */ |
---|
60 | EXIT(1) |
---|
61 | |
---|
62 | .globl excep |
---|
63 | excep: |
---|
64 | .set noreorder |
---|
65 | PRINT(statusstr) |
---|
66 | mfc0 a0, COP0_STATUS |
---|
67 | PRINTX |
---|
68 | |
---|
69 | PRINT(causestr) |
---|
70 | mfc0 a0, COP0_CAUSE |
---|
71 | PRINTX |
---|
72 | |
---|
73 | PRINT(pcstr) |
---|
74 | mfc0 a0, COP0_EXPC |
---|
75 | PRINTX |
---|
76 | |
---|
77 | PRINT(badvastr) |
---|
78 | mfc0 a0, COP_0_BADVADDR |
---|
79 | PRINTX |
---|
80 | |
---|
81 | PRINT(xicustr) |
---|
82 | la t0, XICU_BASE |
---|
83 | lw a0, XICU_PRIO(0)(t0) |
---|
84 | PRINTX |
---|
85 | |
---|
86 | PUTCHAR('\n') |
---|
87 | /* clear interrupt */ |
---|
88 | mfc0 a0, COP0_CAUSE |
---|
89 | andi t0, a0, 0xff00 |
---|
90 | xor a0, a0, t0 |
---|
91 | mtc0 a0, COP0_CAUSE |
---|
92 | /* we should end there */ |
---|
93 | EXIT(0) |
---|
94 | |
---|
95 | .rodata: |
---|
96 | statusstr: .ascii "status \0" |
---|
97 | causestr: .ascii " cause \0" |
---|
98 | pcstr: .ascii " pc \0" |
---|
99 | badvastr: .ascii " badva \0" |
---|
100 | xicustr: .ascii " xicu \0" |
---|
101 | startstr: .ascii "start\n\0" |
---|
102 | eretstr: .ascii "eret\n\0" |
---|
103 | |
---|
104 | .org EXCEP_ADDRESS - BOOT_ADDRESS |
---|
105 | .globl evect |
---|
106 | evect: |
---|
107 | j excep |
---|
108 | nop |
---|
109 | .data |
---|
110 | myvar: .word 0 |
---|
Note: See
TracBrowser
for help on using the repository browser.