Last change
on this file since 312 was
232,
checked in by alain, 12 years ago
|
Introducing the elementary tests for a TSAR mono-cluster
mono-processor platform with MMU using the vci_cc_vcache_v4
such as the "tsarv4_mono_mmu".
(assemby level tests written by Manuel Bouyer)
|
File size:
1.9 KB
|
Rev | Line | |
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[232] | 1 | -n test_sanity: |
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| 2 | test passsed |
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| 3 | -n test_exceptions: |
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| 4 | test passsed |
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| 5 | -n test_mmu_basic: |
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| 6 | test passsed |
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| 7 | -n test_excep_ls: |
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| 8 | test passsed |
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| 9 | -n test_excep_ls_delayslot: |
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| 10 | test passsed |
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| 11 | -n test_excep_ls_llsc: |
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| 12 | test passsed |
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| 13 | -n test_excep_if: |
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| 14 | test passsed |
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| 15 | -n test_excep_if_delayslot: |
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| 16 | test passsed |
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| 17 | -n test_excep_if_llsc: |
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| 18 | test passsed |
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| 19 | -n test_exception_epc_modify: |
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| 20 | test passsed |
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| 21 | -n test_dtlb_inval: |
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| 22 | test passsed |
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| 23 | -n test_dtlb_inval2: |
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| 24 | test passsed |
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| 25 | -n test_dtlb_inval3: |
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| 26 | test passsed |
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| 27 | -n test_itlb_inval: |
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| 28 | test passsed |
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| 29 | -n test_itlb_inval2: |
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| 30 | test passsed |
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| 31 | -n test_idtlb_inval: |
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| 32 | test passsed |
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| 33 | -n test_idtlb_inval2: |
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| 34 | test passsed |
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| 35 | -n test_idtlb_inval3: |
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| 36 | test passsed |
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| 37 | -n test_idtlb_inval4: |
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| 38 | test passsed |
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| 39 | -n test_dtlb_ptprinval: |
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| 40 | test passsed |
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| 41 | -n test_itlb_ptprinval: |
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| 42 | test passsed |
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| 43 | -n test_idtlb_ptprinval: |
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| 44 | test passsed |
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| 45 | -n test_sync: |
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| 46 | test passsed |
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| 47 | -n test_sc_update_cache: |
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| 48 | test passsed |
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| 49 | -n test_pte_llsc: |
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| 50 | test passsed |
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| 51 | -n test_interrupt: |
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| 52 | test passsed |
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| 53 | -n test_interrupt_epc_modify: |
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| 54 | test passsed |
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| 55 | -n test_xicu_timer: |
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| 56 | test passsed |
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| 57 | -n test_interrupt_delayslot: |
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| 58 | test FAILED |
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| 59 | -n test_interrupt_mask: |
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| 60 | test passsed |
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| 61 | -n test_interrupt_external_mask: |
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| 62 | test passsed |
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| 63 | -n test_excep_cop: |
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| 64 | test passsed |
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| 65 | -n test_excep_cop_delayslot: |
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| 66 | test passsed |
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| 67 | -n test_excep_cop1: |
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| 68 | test passsed |
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| 69 | -n test_syscall: |
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| 70 | test passsed |
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| 71 | -n test_syscall_delayslot: |
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| 72 | test passsed |
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| 73 | -n test_breakpoint: |
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| 74 | test passsed |
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| 75 | -n test_breakpoint_delayslot: |
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| 76 | test passsed |
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| 77 | -n test_ri: |
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| 78 | test passsed |
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| 79 | -n test_ri_delayslot: |
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| 80 | test passsed |
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| 81 | -n test_ao: |
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| 82 | test passsed |
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| 83 | -n test_ao_delayslot: |
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| 84 | test passsed |
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| 85 | -n test_trap: |
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| 86 | test passsed |
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| 87 | -n test_trap_delayslot: |
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| 88 | test passsed |
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| 89 | -n test_fpediv: |
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| 90 | test FAILED |
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| 91 | -n test_fpe_delayslot: |
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| 92 | test FAILED |
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| 93 | -n test_dcache_inval_pa: |
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| 94 | test passsed |
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| 95 | -n test_icache_inval_pa: |
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| 96 | test passsed |
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| 97 | -n test_pte2i_ref: |
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| 98 | test passsed |
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| 99 | -n test_pte2lw_ref: |
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| 100 | test passsed |
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| 101 | -n test_pte2ll_ref: |
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| 102 | test passsed |
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| 103 | -n test_pte2sw_dirty: |
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| 104 | test passsed |
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| 105 | -n test_pte2sc_dirty: |
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| 106 | test passsed |
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