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Last change
on this file since 345 was
232,
checked in by alain, 12 years ago
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Introducing the elementary tests for a TSAR mono-cluster
mono-processor platform with MMU using the vci_cc_vcache_v4
such as the "tsarv4_mono_mmu".
(assemby level tests written by Manuel Bouyer)
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File size:
2.0 KB
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| 1 | /* |
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| 2 | * load/store bus fault exception test: we can restart the faulting instruction |
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| 3 | * We use the MMU to cause fault |
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| 4 | */ |
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| 5 | #include <registers.h> |
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| 6 | #include <misc.h> |
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| 7 | #include <vcache.h> |
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| 8 | .text |
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| 9 | .globl _start |
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| 10 | _start: |
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| 11 | .set noreorder |
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| 12 | la k0, TTY_BASE |
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| 13 | la k1, EXIT_BASE |
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| 14 | |
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| 15 | PRINT(startstr) |
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| 16 | |
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| 17 | /* reset cop0 status (keep BEV) */ |
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| 18 | lui a0, 0x0040; |
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| 19 | mtc0 a0, COP0_STATUS |
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| 20 | |
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| 21 | la a0, pte1 |
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| 22 | srl a0, a0, 13 |
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| 23 | mtc2 a0, VC_PTPR |
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| 24 | nop |
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| 25 | |
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| 26 | li a0, VC_TLB_EN_ITLB | VC_TLB_EN_DTLB | VC_TLB_EN_ICACHE | VC_TLB_EN_DCACHE |
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| 27 | mtc2 a0, VC_TLB_EN |
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| 28 | |
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| 29 | PRINT(mmustr) |
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| 30 | |
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| 31 | /* 0x00000000 not mapped yet: we fault, load the MMU and retry */ |
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| 32 | move a1, zero |
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| 33 | la s0, testval |
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| 34 | lw a1, 0(s0) /* this should trigger the exception */ |
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| 35 | move a0, s0 |
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| 36 | PRINTX |
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| 37 | PUTCHAR(':') |
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| 38 | PUTCHAR(' ') |
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| 39 | move a0, a1 |
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| 40 | PRINTX |
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| 41 | PUTCHAR('\n') |
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| 42 | |
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| 43 | /* we should get there */ |
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| 44 | EXIT(0) |
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| 45 | |
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| 46 | .globl excep |
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| 47 | excep: |
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| 48 | .set noreorder |
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| 49 | PRINT(statusstr) |
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| 50 | mfc0 a0, COP0_STATUS |
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| 51 | PRINTX |
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| 52 | |
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| 53 | PRINT(causestr) |
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| 54 | mfc0 a0, COP0_CAUSE |
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| 55 | PRINTX |
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| 56 | |
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| 57 | PRINT(pcstr) |
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| 58 | mfc0 a0, COP0_EXPC |
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| 59 | PRINTX |
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| 60 | |
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| 61 | PRINT(badvastr) |
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| 62 | mfc0 a0, COP_0_BADVADDR |
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| 63 | PRINTX |
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| 64 | |
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| 65 | PUTCHAR('\n') |
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| 66 | /* map VA 0 at PA 0: just copy entry for 0x00200000 */ |
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| 67 | la t0, pte1 + 0x00200000 |
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| 68 | lw a0, 4(t0) |
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| 69 | sw a0, 0(t0) |
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| 70 | /* mtc2 zero, VC_DTLB_INVAL */ |
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| 71 | eret |
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| 72 | |
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| 73 | .rodata: |
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| 74 | statusstr: .ascii "status \0" |
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| 75 | causestr: .ascii " cause \0" |
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| 76 | pcstr: .ascii " pc \0" |
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| 77 | badvastr: .ascii " badva \0" |
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| 78 | mmustr: .ascii "mmu started\n\0" |
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| 79 | startstr: .ascii "start\n\0" |
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| 80 | |
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| 81 | .org EXCEP_ADDRESS - BOOT_ADDRESS |
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| 82 | .globl evect |
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| 83 | evect: |
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| 84 | j excep |
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| 85 | nop |
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| 86 | .data |
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| 87 | .word MAGIC1 |
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| 88 | testval: |
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| 89 | .word MAGIC2 |
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| 90 | .globl pte1 |
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| 91 | pte1: |
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| 92 | .align 13 |
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| 93 | .word 0x0 /* map PA 0 at VA 0 */ |
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| 94 | .word PTE1_V | PTE1_C | PTE1_W | 0x0 /* map PA 0 at VA 0x00200000 */ |
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| 95 | .org pte1 + (BOOT_ADDRESS >> 21) * 4 |
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| 96 | .word PTE1_V | PTE1_C | PTE1_X | (BOOT_ADDRESS >> 21) /* map PA 0xbfc00000 at VA 0xbfc00000 */ |
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| 97 | .org pte1 + (TTY_BASE >> 21) * 4 |
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| 98 | .word PTE1_V | PTE1_W | (TTY_BASE >> 21) /* map PA 0xd0200000 at VA 0xd0200000 */ |
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| 99 | .org pte1 + (EXIT_BASE >> 21) * 4 |
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| 100 | .word PTE1_V | PTE1_W | (EXIT_BASE >> 21) /* map PA 0xe0000000 at VA 0xe0000000 */ |
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| 101 | .org pte1 + 8192 |
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| 102 | .word 0 |
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| 103 | |
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