Last change
on this file since 237 was
232,
checked in by alain, 12 years ago
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Introducing the elementary tests for a TSAR mono-cluster
mono-processor platform with MMU using the vci_cc_vcache_v4
such as the "tsarv4_mono_mmu".
(assemby level tests written by Manuel Bouyer)
|
File size:
1.8 KB
|
Line | |
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1 | /* |
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2 | * Check interraction between cached read/write and ll/sc |
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3 | */ |
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4 | #include <registers.h> |
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5 | #include <misc.h> |
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6 | #include <vcache.h> |
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7 | |
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8 | .text |
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9 | .globl _start |
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10 | _start: |
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11 | .set noreorder |
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12 | la k0, TTY_BASE |
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13 | la k1, EXIT_BASE |
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14 | |
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15 | /* reset cop0 status (keep BEV) */ |
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16 | lui a0, 0x0040; |
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17 | mtc0 a0, COP0_STATUS |
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18 | |
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19 | la a0, pte1 |
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20 | srl a0, a0, 13 |
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21 | mtc2 a0, VC_PTPR |
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22 | nop |
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23 | |
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24 | li a0, VC_TLB_EN_ITLB | VC_TLB_EN_DTLB | VC_TLB_EN_ICACHE | VC_TLB_EN_DCACHE |
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25 | mtc2 a0, VC_TLB_EN |
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26 | |
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27 | /* make sure myvar is in cache */ |
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28 | la s1, myvar |
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29 | lw a0, 0(s1) |
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30 | PRINTX |
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31 | PUTCHAR(' ') |
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32 | |
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33 | /* now write to myvar via ll/sc |
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34 | la s1, myvar |
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35 | 1: |
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36 | ll a0, 0(s1) |
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37 | li a1, MAGIC2 |
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38 | sc a1, 0(s1) |
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39 | beqz a1, 2b |
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40 | nop |
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41 | |
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42 | /* restore myvar value via normal write */ |
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43 | li a1, MAGIC1 |
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44 | sw a1, 0(s1) |
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45 | |
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46 | /* read myvar */ |
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47 | lw a0, 0(s1) |
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48 | PRINTX |
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49 | PUTCHAR('\n'); |
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50 | |
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51 | EXIT(0) |
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52 | |
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53 | .globl excep |
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54 | excep: |
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55 | .set noreorder |
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56 | PRINT(statusstr) |
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57 | mfc0 a0, COP0_STATUS |
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58 | PRINTX |
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59 | |
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60 | PRINT(causestr) |
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61 | mfc0 a0, COP0_CAUSE |
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62 | PRINTX |
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63 | |
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64 | PRINT(pcstr) |
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65 | mfc0 a0, COP0_EXPC |
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66 | PRINTX |
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67 | |
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68 | PRINT(badvastr) |
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69 | mfc0 a0, COP_0_BADVADDR |
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70 | PRINTX |
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71 | |
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72 | PUTCHAR('\n') |
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73 | /* we should not get there */ |
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74 | EXIT(1) |
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75 | |
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76 | .rodata: |
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77 | statusstr: .ascii "status \0" |
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78 | causestr: .ascii " cause \0" |
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79 | pcstr: .ascii " pc \0" |
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80 | badvastr: .ascii " badva \0" |
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81 | value: .word 0x1234abcd |
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82 | string: .ascii "hello world \0" |
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83 | |
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84 | .org EXCEP_ADDRESS - BOOT_ADDRESS |
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85 | .globl evect |
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86 | evect: |
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87 | j excep |
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88 | nop |
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89 | |
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90 | .data |
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91 | myvar: .word MAGIC1 |
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92 | .globl pte1 |
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93 | pte1: |
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94 | .align 13 |
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95 | .word PTE1_V | PTE1_C | PTE1_W | 0x0 /* map PA 0 at VA 0 */ |
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96 | .org pte1 + (BOOT_ADDRESS >> 21) * 4 |
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97 | .word PTE1_V | PTE1_C | PTE1_X | (BOOT_ADDRESS >> 21) /* map PA 0xbfc00000 at VA 0xbfc00000 */ |
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98 | .org pte1 + (TTY_BASE >> 21) * 4 |
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99 | .word PTE1_V | PTE1_W | (TTY_BASE >> 21) /* map PA 0xd0200000 at VA 0xd0200000 */ |
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100 | .org pte1 + (EXIT_BASE >> 21) * 4 |
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101 | .word PTE1_V | PTE1_W | (EXIT_BASE >> 21) /* map PA 0xe0000000 at VA 0xe0000000 */ |
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102 | .org pte1 + 8192 |
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103 | .word 0 |
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104 | |
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