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Last change
on this file since 570 was
570,
checked in by cfuguet, 10 years ago
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Modifications in tsar_boot:
- Aligning the boot loader block buffer to a cache line. This is
required by the memory cache invalidation mechanism.
- Introducing a new platform in the configuration directory:
tsar_generic_iob
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File size:
360 bytes
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| Rev | Line | |
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| [570] | 1 | #define NB_PROCS 1 |
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| 2 | #define NB_CLUSTERS 4 |
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| 3 | |
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| 4 | #define IRQ_PER_PROC 1 |
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| 5 | |
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| 6 | #define USE_IOB 1 |
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| 7 | #define CACHE_COHERENCE 1 |
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| 8 | #define CACHE_LINE_SIZE 64//bytes |
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| 9 | |
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| 10 | #define BOOT_DEBUG 1 |
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| 11 | #define BOOT_DEBUG_IOC 0 |
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| 12 | |
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| 13 | #define ICU_BASE 0xB0000000 |
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| 14 | #define MCC_BASE 0xB2000000 |
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| 15 | #define IOC_BASE 0xB3000000 |
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| 16 | #define TTY_BASE 0xB4000000 |
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