source: trunk/softs/tsar_boot/conf/platform_vgsb_xicu_mmu/defs_platform.h @ 568

Last change on this file since 568 was 568, checked in by cfuguet, 11 years ago

Adding support for TSAR platforms using the vci_io_bridge component.

In this case (USE_IOB=1), when a block is read from the disk controller,
the buffer containing the read data must be invalidated in the Memory
Cache as the transfer is done between the disk controller and the RAM.

File size: 371 bytes
Line 
1#define NB_PROCS        4
2#define NB_CLUSTERS     1
3
4#define IRQ_PER_PROC    1
5
6#define USE_IOB         0
7#define CACHE_COHERENCE 0
8#define CACHE_LINE_SIZE 16//bytes
9
10#define BOOT_DEBUG      1
11#define BOOT_DEBUG_IOC  0
12
13#define ICU_BASE        0x00F00000
14#define IOC_BASE        0x00F10000
15#define TTY_BASE        0x00F20000
16#define MCC_BASE        0xFFFFFFFF //not used
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