[992] | 1 | /** |
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| 2 | * \File : reset_ioc_hba.c |
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| 3 | * \Date : 23/11/2013 |
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| 4 | * \Author : alain greiner |
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| 5 | * \Copyright (c) UPMC-LIP6 |
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| 6 | */ |
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| 7 | |
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| 8 | #include <reset_ioc_hba.h> |
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| 9 | #include <reset_tty.h> |
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| 10 | #include <reset_inval.h> |
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| 11 | #include <io.h> |
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| 12 | #include <defs.h> |
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| 13 | |
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| 14 | #define HBA_POLLING_TIMEOUT 1000000 |
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| 15 | |
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| 16 | /////////////////////////////////////////////////////////////////////////////// |
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| 17 | // Global variables |
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| 18 | /////////////////////////////////////////////////////////////////////////////// |
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| 19 | |
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| 20 | // command descriptor (one single command) |
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| 21 | static hba_cmd_desc_t hba_cmd_desc __attribute__((aligned(64))); |
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| 22 | |
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| 23 | // command table (one single command) |
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| 24 | static hba_cmd_table_t hba_cmd_table __attribute__((aligned(64))); |
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| 25 | |
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| 26 | // IOC/HBA device base address |
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| 27 | static int* const ioc_address = (int* const)SEG_IOC_BASE; |
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| 28 | |
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| 29 | /////////////////////////////////////////////////////////////////////////////// |
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| 30 | // Extern functions |
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| 31 | /////////////////////////////////////////////////////////////////////////////// |
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| 32 | |
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| 33 | /////////////////////////////////////////////////////////////////////////////// |
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| 34 | // This function register one command in both the command descriptor |
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| 35 | // and the command data, and updates the HBA_PXCI register. |
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| 36 | // The addresses are supposed to be identity mapping (vaddr == paddr). |
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| 37 | // return 0 if success, -1 if error |
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| 38 | /////////////////////////////////////////////////////////////////////////////// |
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| 39 | int reset_hba_read( unsigned int lba, |
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| 40 | void* buffer, |
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| 41 | unsigned int count ) |
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| 42 | { |
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| 43 | unsigned int pxci; // HBA_PXCI register value |
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| 44 | unsigned int pxis; // HBA_PXIS register value |
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| 45 | |
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| 46 | #if RESET_DEBUG |
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| 47 | reset_puts("\n[DEBUG HBA] reset_hba_read() : buffer = "); |
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| 48 | reset_putx( (unsigned int)buffer ); |
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| 49 | reset_puts(" / nblocks = "); |
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| 50 | reset_putd( count ); |
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| 51 | reset_puts(" / lba = "); |
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| 52 | reset_putd( lba ); |
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| 53 | reset_puts("\n"); |
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| 54 | #endif |
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| 55 | |
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| 56 | // check buffer alignment |
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| 57 | if( (unsigned int)buffer & 0x3F ) |
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| 58 | { |
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| 59 | reset_puts("\n[RESET ERROR] in reset_hba_read() "); |
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| 60 | reset_puts("buffer not aligned on 64 bytes: base = "); |
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| 61 | reset_putx( (unsigned int)buffer ); |
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| 62 | reset_puts("\n"); |
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| 63 | return -1; |
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| 64 | } |
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| 65 | |
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| 66 | // set command data header: lba value |
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| 67 | hba_cmd_table.header.lba0 = (char)lba; |
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| 68 | hba_cmd_table.header.lba1 = (char)(lba>>8); |
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| 69 | hba_cmd_table.header.lba2 = (char)(lba>>16); |
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| 70 | hba_cmd_table.header.lba3 = (char)(lba>>24); |
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| 71 | hba_cmd_table.header.lba4 = 0; |
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| 72 | hba_cmd_table.header.lba5 = 0; |
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| 73 | |
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| 74 | // set command data buffer: address and size) |
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| 75 | hba_cmd_table.buffer.dba = (unsigned int)(buffer); |
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| 76 | hba_cmd_table.buffer.dbau = 0; |
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| 77 | hba_cmd_table.buffer.dbc = count*512; |
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| 78 | |
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| 79 | // set command descriptor: one single buffer / read access |
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| 80 | hba_cmd_desc.prdtl[0] = 1; |
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| 81 | hba_cmd_desc.prdtl[1] = 0; |
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| 82 | hba_cmd_desc.flag[0] = 0; // read |
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| 83 | |
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| 84 | #if RESET_DEBUG |
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| 85 | reset_puts("\n[DEBUG HBA] reset_hba_read() : command registered\n"); |
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| 86 | #endif |
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| 87 | |
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| 88 | #if USE_IOB |
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| 89 | // update external memory for command table |
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| 90 | reset_L2_sync( &hba_cmd_table , 32 ); |
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| 91 | |
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| 92 | // update external memory for command descriptor |
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| 93 | reset_L2_sync( &hba_cmd_desc , 16 ); |
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| 94 | #endif |
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| 95 | |
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| 96 | // start transfer |
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| 97 | iowrite32( &ioc_address[HBA_PXCI] , 1 ); |
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| 98 | |
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| 99 | #if RESET_DEBUG |
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| 100 | reset_puts("\n[DEBUG HBA] reset_hba_read() : MULTI_AHCI controler activated\n"); |
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| 101 | #endif |
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| 102 | |
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| 103 | #if (RESET_HARD_CC == 0) || USE_IOB |
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| 104 | // inval buffer in L1 cache |
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| 105 | reset_L1_inval( buffer , count * 512 ); |
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| 106 | #endif |
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| 107 | |
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| 108 | #if USE_IOB |
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| 109 | // inval buffer in L2 cache |
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| 110 | reset_L2_inval( buffer , count * 512 ); |
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| 111 | #endif |
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| 112 | |
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| 113 | // poll PXCI until command completed by HBA |
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| 114 | unsigned int iter = HBA_POLLING_TIMEOUT; |
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| 115 | do |
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| 116 | { |
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| 117 | pxci = ioread32( &ioc_address[HBA_PXCI] ); |
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| 118 | iter--; |
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| 119 | if (iter == 0 ) |
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| 120 | { |
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| 121 | reset_puts("\n[SDC ERROR] in reset_sdc_read() : polling timeout\n"); |
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| 122 | return 1; |
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| 123 | } |
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| 124 | } |
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| 125 | while( pxci ); |
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| 126 | |
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| 127 | // get PXIS register |
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| 128 | pxis = ioread32( &ioc_address[HBA_PXIS] ); |
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| 129 | |
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| 130 | // reset PXIS register |
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| 131 | iowrite32( &ioc_address[HBA_PXIS] , 0 ); |
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| 132 | |
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| 133 | // reset PXCI register : we use only command slot[0] in PXCI |
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| 134 | iowrite32( &ioc_address[HBA_PXCI] , 0 ); |
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| 135 | |
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| 136 | // check error status |
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| 137 | if ( pxis & 0x40000000 ) |
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| 138 | { |
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| 139 | reset_puts("[RESET ERROR] in reset_hba_read() : " |
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| 140 | " status error returned by HBA\n"); |
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| 141 | return 1; |
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| 142 | } |
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| 143 | |
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| 144 | return 0; |
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| 145 | } // end reset_hba_read() |
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| 146 | |
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| 147 | |
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| 148 | /////////////////////////////////////////////////////////////////////////////// |
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| 149 | // This function initialises both the HBA registers and the |
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| 150 | // memory structures used by the AHCI peripheral (one single command). |
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| 151 | /////////////////////////////////////////////////////////////////////////////// |
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| 152 | int reset_hba_init() |
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| 153 | { |
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| 154 | // initialise the command descriptor |
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| 155 | hba_cmd_desc.ctba = (unsigned int)&hba_cmd_table; |
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| 156 | hba_cmd_desc.ctbau = 0; |
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| 157 | |
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| 158 | #if USE_IOB |
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| 159 | // update external memory for the commande descriptor |
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| 160 | reset_L2_sync( &hba_cmd_desc , sizeof( hba_cmd_desc_t ) ); |
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| 161 | #endif |
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| 162 | // initialise HBA registers |
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| 163 | iowrite32( &ioc_address[HBA_PXCLB] , (unsigned int)&hba_cmd_desc ); |
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| 164 | iowrite32( &ioc_address[HBA_PXCLBU] , 0 ); |
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| 165 | iowrite32( &ioc_address[HBA_PXIE] , 0 ); |
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| 166 | iowrite32( &ioc_address[HBA_PXIS] , 0 ); |
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| 167 | iowrite32( &ioc_address[HBA_PXCI] , 0 ); |
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| 168 | iowrite32( &ioc_address[HBA_PXCMD] , 1 ); |
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| 169 | |
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| 170 | #if RESET_DEBUG |
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| 171 | reset_puts("\n[DEBUG HBA] reset_hba_init() : AHCI init done\n"); |
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| 172 | #endif |
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| 173 | |
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| 174 | return 0; |
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| 175 | } |
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| 176 | |
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| 177 | |
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| 178 | // Local Variables: |
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| 179 | // tab-width: 4 |
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| 180 | // c-basic-offset: 4 |
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| 181 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 182 | // indent-tabs-mode: nil |
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| 183 | // End: |
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| 184 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 185 | |
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