1 | /** |
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2 | * \file spi.c |
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3 | * \date 31 August 2012 |
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4 | * \author Cesar Fuguet <cesar.fuguet-tortolero@lip6.fr> |
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5 | */ |
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6 | #include <spi.h> |
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7 | #include <reset_ioc.h> |
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8 | #include <reset_utils.h> |
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9 | |
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10 | /** |
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11 | * \param x: input value |
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12 | * |
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13 | * \return byte-swapped value |
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14 | * |
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15 | * \brief byte-swap a 32bit word |
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16 | */ |
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17 | static unsigned int bswap32(unsigned int x) |
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18 | { |
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19 | unsigned int y; |
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20 | y = (x & 0x000000ff) << 24; |
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21 | y |= (x & 0x0000ff00) << 8; |
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22 | y |= (x & 0x00ff0000) >> 8; |
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23 | y |= (x & 0xff000000) >> 24; |
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24 | return y; |
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25 | } |
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26 | |
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27 | /** |
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28 | * \param spi : Initialized pointer to the SPI controller |
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29 | * |
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30 | * \brief Wait until the SPI controller has finished a transfer |
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31 | * |
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32 | * Wait until the GO_BUSY bit of the SPI controller be deasserted |
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33 | */ |
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34 | static void _spi_wait_if_busy(struct spi_dev * spi) |
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35 | { |
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36 | register int delay; |
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37 | |
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38 | while(SPI_IS_BUSY(spi)) |
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39 | { |
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40 | for (delay = 0; delay < 100; delay++); |
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41 | } |
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42 | } |
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43 | |
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44 | /** |
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45 | * \param spi : Initialized pointer to the SPI controller |
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46 | * |
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47 | * \return void |
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48 | * |
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49 | * \brief Init transfer of the tx registers to the selected slaves |
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50 | */ |
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51 | static void _spi_init_transfer(struct spi_dev * spi) |
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52 | { |
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53 | unsigned int spi_ctrl = ioread32(&spi->ctrl); |
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54 | |
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55 | iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); |
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56 | } |
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57 | |
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58 | /** |
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59 | * \param spi_freq : Desired frequency for the generated clock from the SPI |
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60 | * controller |
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61 | * \param sys_freq : System clock frequency |
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62 | * |
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63 | * \brief Calculated the value for the divider register in order to obtain the SPI |
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64 | * desired clock frequency |
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65 | */ |
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66 | static unsigned int _spi_calc_divider_value ( |
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67 | unsigned int spi_freq , |
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68 | unsigned int sys_freq ) |
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69 | { |
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70 | return ((sys_freq / (spi_freq * 2)) - 1); |
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71 | } |
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72 | |
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73 | void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index) |
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74 | { |
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75 | _spi_wait_if_busy(spi); |
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76 | { |
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77 | iowrite8(&spi->rx_tx[index % 4], byte); |
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78 | _spi_init_transfer(spi); |
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79 | } |
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80 | _spi_wait_if_busy(spi); |
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81 | } |
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82 | |
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83 | volatile unsigned char spi_get_rx(struct spi_dev * spi, int index) |
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84 | { |
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85 | return ioread8(&spi->rx_tx[index % 4]); |
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86 | } |
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87 | |
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88 | void spi_get_data(struct spi_dev * spi, void *buf, unsigned int count) |
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89 | { |
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90 | unsigned int *data = buf; |
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91 | unsigned char *data8; |
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92 | unsigned int spi_ctrl0, spi_ctrl; |
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93 | int i; |
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94 | |
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95 | _spi_wait_if_busy(spi); |
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96 | |
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97 | spi_ctrl0 = ioread32(&spi->ctrl); |
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98 | #ifdef IOC_USE_DMA |
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99 | if (count == 512 && ((int)buf & 0x3f) == 0) { |
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100 | /* use DMA */ |
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101 | spi->dma_base = (int)buf; |
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102 | spi->dma_baseh = 0; |
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103 | spi->dma_count = count | SPI_DMA_COUNT_READ; |
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104 | _spi_wait_if_busy(spi); |
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105 | i = count / 4; |
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106 | } else |
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107 | #endif /* IOC_USE_DMA */ |
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108 | { |
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109 | /* switch to 128 bits words */ |
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110 | spi_ctrl = (spi_ctrl0 & ~SPI_CTRL_CHAR_LEN_MASK) | 128; |
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111 | iowrite32(&spi->ctrl, spi_ctrl); |
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112 | |
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113 | /* read data */ |
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114 | for (i = 0; i + 3 < count / 4; i += 4) { |
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115 | iowrite32(&spi->rx_tx[0], 0xffffffff); |
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116 | iowrite32(&spi->rx_tx[1], 0xffffffff); |
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117 | iowrite32(&spi->rx_tx[2], 0xffffffff); |
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118 | iowrite32(&spi->rx_tx[3], 0xffffffff); |
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119 | iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); |
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120 | |
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121 | _spi_wait_if_busy(spi); |
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122 | |
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123 | *data = bswap32(ioread32(&spi->rx_tx[3])); |
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124 | data++; |
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125 | *data = bswap32(ioread32(&spi->rx_tx[2])); |
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126 | data++; |
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127 | *data = bswap32(ioread32(&spi->rx_tx[1])); |
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128 | data++; |
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129 | *data = bswap32(ioread32(&spi->rx_tx[0])); |
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130 | data++; |
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131 | } |
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132 | } |
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133 | |
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134 | /* switch back to original word size */ |
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135 | iowrite32(&spi->ctrl, spi_ctrl0); |
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136 | |
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137 | /* read missing bits */ |
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138 | data8 = (void *)data; |
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139 | i = i * 4; |
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140 | for (; i < count; i++) |
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141 | { |
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142 | iowrite32(&spi->rx_tx[0], 0xffffffff); |
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143 | iowrite32(&spi->ctrl, spi_ctrl0 | SPI_CTRL_GO_BSY); |
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144 | |
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145 | _spi_wait_if_busy(spi); |
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146 | |
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147 | *data8 = spi_get_rx(spi, 0); |
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148 | data8++; |
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149 | } |
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150 | return; |
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151 | } |
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152 | |
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153 | void spi_ss_assert(struct spi_dev * spi, int index) |
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154 | { |
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155 | unsigned int spi_ss = ioread32(&spi->ss); |
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156 | |
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157 | iowrite32(&spi->ss, spi_ss | (1 << index)); |
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158 | } |
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159 | |
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160 | void spi_ss_deassert(struct spi_dev * spi, int index) |
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161 | { |
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162 | unsigned int spi_ss = ioread32(&spi->ss); |
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163 | |
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164 | iowrite32(&spi->ss, spi_ss & ~(1 << index)); |
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165 | } |
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166 | |
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167 | void spi_dev_config ( |
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168 | struct spi_dev * spi, |
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169 | int spi_freq , |
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170 | int sys_freq , |
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171 | int char_len , |
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172 | int tx_edge , |
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173 | int rx_edge ) |
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174 | { |
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175 | unsigned int spi_ctrl = ioread32(&spi->ctrl); |
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176 | |
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177 | if ( tx_edge == 0 ) spi_ctrl |= SPI_CTRL_TXN_EN; |
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178 | else if ( tx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_TXN_EN; |
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179 | if ( rx_edge == 0 ) spi_ctrl |= SPI_CTRL_RXN_EN; |
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180 | else if ( rx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_RXN_EN; |
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181 | if ( char_len > 0 ) spi_ctrl = (spi_ctrl & ~SPI_CTRL_CHAR_LEN_MASK) | |
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182 | (char_len & SPI_CTRL_CHAR_LEN_MASK); |
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183 | |
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184 | iowrite32(&spi->ctrl, spi_ctrl); |
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185 | |
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186 | if (spi_freq > 0 && sys_freq > 0) |
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187 | iowrite32(&spi->divider, _spi_calc_divider_value(spi_freq, sys_freq)); |
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188 | } |
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189 | |
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190 | /* |
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191 | * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 |
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192 | */ |
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