source: trunk/softs/tsar_boot/drivers/spi.h @ 847

Last change on this file since 847 was 758, checked in by cfuguet, 10 years ago

tsar_boot: improving configuration infrastructure

  • Using hard_config.h which respects the same sintax that the hard_config.h file of all TSAR platforms. This file can be then generated by the GIET-VM genmap tool or written manually.
  • All peripheral drivers have been moved to a drivers directory and they are compiled as a static library. This allows GCC to only include in the final .ELF the object files of used peripherals and not all of them.
  • Example hard_config.h and ldscripts have been introduced in the conf directory.
  • Improving comments in all files
File size: 4.8 KB
Line 
1/**
2 * \file  : spi.h
3 * \date  : 30 August 2012
4 * \author: Cesar Fuguet <cesar.fuguet-tortolero@lip6.fr>
5 *
6 * This file contains the definition of a driver for the SPI controller
7 */
8
9#ifndef SPI_H
10#define SPI_H
11
12#include <io.h>
13
14/**
15 * SPI type definition
16 */
17struct spi_dev
18{
19    /**
20     * RX/TX registers of the SPI controller
21     */
22    unsigned int rx_tx[4];
23
24    /**
25     * Control register of the SPI controller
26     */
27    unsigned int ctrl;
28
29    /**
30     * Divider register for the SPI controller generated clock signal
31     */
32    unsigned int divider;
33
34    /**
35     * Slave select register of the SPI controller
36     */
37    unsigned int ss;
38    unsigned int dma_base;
39    unsigned int dma_baseh;
40    unsigned int dma_count;
41};
42
43/**
44 * \param   spi     : initialized pointer to a SPI controller.
45 * \param   byte    : Byte to send to the SPI controller
46 * \param   index   : index of the TX register in the SPI (TX[index])
47 *
48 * \return  void
49 *
50 * \brief   Send a byte to one of the tx buffer registers of the
51 *          SPI controller
52 */
53void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index);
54
55/**
56 * \param   spi     : initialized pointer to a SPI controller.
57 * \param   index   : index of the RX register in the SPI (RX[index])
58 *
59 * \return  byte from the RX[index] register
60 *
61 * \brief   Get a byte from one of the rx buffer registers of the
62 *          SPI controller
63 */
64inline volatile unsigned char spi_get_rx(struct spi_dev * spi, int index);
65
66/**
67 * \param   spi     : initialized pointer to a SPI controller.
68 * \param   buf     : buffer to store data read
69 * \param   count   : byte count to read
70 *
71 * \return  void
72 *
73 * \brief   get a data block from the SPI controller using 128bits
74 *          reads if possible
75 */
76void spi_get_data(struct spi_dev * spi, void *buf, unsigned int count);
77
78/**
79 * \param   spi     : initialized pointer to a SPI controller.
80 * \param   index   : index of the slave select signal to assert
81 *
82 * \return  void
83 *
84 * \brief   Set the index selected slave select signal (ss[index] <= '0')
85 */
86inline void spi_ss_assert(struct spi_dev * spi, int index);
87
88/**
89 * \param   spi     : initialized pointer to a SPI controller.
90 * \param   index   : index of the slave select signal to deassert
91 *
92 * \return  void
93 *
94 * \brief   Unset the index selected slave select signal (ss[index] <= '0')
95 */
96inline void spi_ss_deassert(struct spi_dev * spi, int index);
97
98/**
99 * \param   spi         : initialized pointer to a SPI controller.
100 * \param   spi_freq    : SPI Master to Slave clock frequency (in Hz)
101 * \param   sys_freq    : System clock frequency (in Hz)
102 * \param   char_len    : number to bits to transmit in one transfer
103 * \param   tx_edge     : when 0, the Master Out Slave In signal is changed
104 *                        on the falling edge of the clock
105 * \param   rx_edge     : when 0, the Master In Slave Out signal is latched
106 *                        on the falling edge of the clock
107 *
108 * \return  void
109 *
110 * \brief   Configure the SPI controller
111 * \note    Any of the arguments can be less than 0 if you want to keep the old value
112 */
113void spi_dev_config (
114        struct spi_dev * spi,
115        int spi_freq        ,
116        int sys_freq        ,
117        int char_len        ,
118        int tx_edge         ,
119        int rx_edge         );
120
121/**
122 * SPI macros and constants
123 */
124#define SPI_TX_POSEDGE         1           /**< MOSI is changed on neg edge   */
125#define SPI_TX_NEGEDGE         0           /**< MOSI is changed on pos edge   */
126#define SPI_RX_POSEDGE         1           /**< MISO is latched on pos edge   */
127#define SPI_RX_NEGEDGE         0           /**< MISO is latched on neg edge   */
128
129#define SPI_CTRL_ASS_EN        ( 1 << 13 ) /**< Auto Slave Sel Assertion      */
130#define SPI_CTRL_IE_EN         ( 1 << 12 ) /**< Interrupt Enable              */
131#define SPI_CTRL_LSB_EN        ( 1 << 11 ) /**< LSB are sent first            */
132#define SPI_CTRL_TXN_EN        ( 1 << 10 ) /**< MOSI is changed on neg edge   */
133#define SPI_CTRL_RXN_EN        ( 1 << 9  ) /**< MISO is latched on neg edge   */
134#define SPI_CTRL_GO_BSY        ( 1 << 8  ) /**< Start the transfer            */
135#define SPI_CTRL_DMA_BSY        (1 << 16)  /***   DMA in progress             */
136#define SPI_CTRL_CHAR_LEN_MASK (  0xFF   ) /**< Bits transmited in 1 transfer */
137#define SPI_RXTX_MASK          (  0xFF   ) /**< Mask for the an RX/TX value   */
138
139#define SPI_DMA_COUNT_READ      (1 << 0) /* operation is a read (else write) */
140
141/**
142 * \param  x : Initialized pointer to the SPI controller
143 *
144 * \return 1 if there is an unfinished transfer in the SPI controller
145 *
146 * \brief  Check the GO_BUSY bit of the SPI Controller
147 */
148#define SPI_IS_BUSY(x)         ((ioread32(&x->ctrl) & (SPI_CTRL_GO_BSY|SPI_CTRL_DMA_BSY)) != 0) ? 1 : 0
149
150#endif
151
152/*
153 * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4
154 */
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