[704] | 1 | /********************************************************************** |
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[705] | 2 | * \file io.h |
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| 3 | * \date 5 September 2012 |
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| 4 | * \author Cesar Fuguet / Alain Greiner |
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[292] | 5 | * |
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| 6 | * Utility functions to write or read memory mapped hardware registers |
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[704] | 7 | *********************************************************************/ |
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| 8 | |
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[292] | 9 | #ifndef IO_H |
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| 10 | #define IO_H |
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| 11 | |
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[704] | 12 | #include <defs.h> |
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| 13 | |
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| 14 | /********************************************************************** |
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[292] | 15 | * Read an 32 bits memory mapped hardware register |
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[704] | 16 | * with physical address extension to access cluster_io |
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| 17 | *********************************************************************/ |
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[292] | 18 | static inline unsigned int ioread32(void * addr) |
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| 19 | { |
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[704] | 20 | unsigned int value; |
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| 21 | unsigned int ext = CLUSTER_IO; |
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| 22 | |
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| 23 | asm volatile( |
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| 24 | "mtc2 %2, $24 \n" /* PADDR_EXT <= cluster_io */ |
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| 25 | "lw %0, 0(%1) \n" /* value <= *(ext\addr) */ |
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| 26 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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| 27 | : "=r" (value) |
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[705] | 28 | : "r" (addr), "r" (ext) |
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| 29 | : "memory" ); |
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[704] | 30 | |
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[705] | 31 | return (volatile unsigned int)value; |
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[292] | 32 | } |
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| 33 | |
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[704] | 34 | /********************************************************************** |
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[292] | 35 | * Read an 16 bits memory mapped hardware register |
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[704] | 36 | *********************************************************************/ |
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[292] | 37 | static inline unsigned short ioread16(void * addr) |
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| 38 | { |
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[705] | 39 | unsigned short value; |
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| 40 | unsigned int ext = CLUSTER_IO; |
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| 41 | |
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| 42 | asm volatile( |
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| 43 | "mtc2 %2, $24 \n" /* PADDR_EXT <= cluster_io */ |
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| 44 | "lhu %0, 0(%1) \n" /* value <= *(ext\addr) */ |
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| 45 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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| 46 | : "=r" (value) |
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| 47 | : "r" (addr), "r" (ext) |
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| 48 | : "memory" ); |
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| 49 | |
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| 50 | return (volatile unsigned short)value; |
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[292] | 51 | } |
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| 52 | |
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[704] | 53 | /********************************************************************** |
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[292] | 54 | * Read an 8 bits memory mapped hardware register |
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[704] | 55 | *********************************************************************/ |
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[292] | 56 | static inline unsigned char ioread8(void * addr) |
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| 57 | { |
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[705] | 58 | unsigned char value; |
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| 59 | unsigned int ext = CLUSTER_IO; |
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| 60 | |
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| 61 | asm volatile( |
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| 62 | "mtc2 %2, $24 \n" /* PADDR_EXT <= cluster_io */ |
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| 63 | "lbu %0, 0(%1) \n" /* value <= *(ext\addr) */ |
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| 64 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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| 65 | : "=r" (value) |
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| 66 | : "r" (addr), "r" (ext) |
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| 67 | : "memory" ); |
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| 68 | |
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| 69 | return (volatile unsigned char)value; |
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[292] | 70 | } |
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| 71 | |
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[704] | 72 | /********************************************************************** |
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[292] | 73 | * Write an 32 bits memory mapped hardware register |
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[704] | 74 | * with physical address extension to access cluster_io |
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| 75 | *********************************************************************/ |
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[292] | 76 | static inline void iowrite32(void * addr, unsigned int value) |
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| 77 | { |
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[704] | 78 | unsigned int ext = CLUSTER_IO; |
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| 79 | |
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| 80 | asm volatile( |
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| 81 | "mtc2 %2, $24 \n" /* PADDR_EXT <= cluster_io */ |
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| 82 | "sw %0, 0(%1) \n" /* *(ext\addr) <= value */ |
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| 83 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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[705] | 84 | "sync \n" /* sync barrier */ |
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[704] | 85 | : |
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[705] | 86 | : "r" (value), "r" (addr), "r" (ext) |
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| 87 | : "memory" ); |
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[292] | 88 | } |
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| 89 | |
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[704] | 90 | /********************************************************************** |
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[292] | 91 | * Write an 16 bits memory mapped hardware register |
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[704] | 92 | *********************************************************************/ |
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[292] | 93 | static inline void iowrite16(void * addr, unsigned short value) |
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| 94 | { |
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[705] | 95 | unsigned int ext = CLUSTER_IO; |
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| 96 | |
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| 97 | asm volatile( |
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| 98 | "mtc2 %2, $24 \n" /* PADDR_EXT <= cluster_io */ |
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| 99 | "sh %0, 0(%1) \n" /* *(ext\addr) <= value */ |
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| 100 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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| 101 | "sync \n" /* sync barrier */ |
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| 102 | : |
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| 103 | : "r" (value), "r" (addr), "r" (ext) |
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| 104 | : "memory" ); |
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[292] | 105 | } |
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| 106 | |
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[704] | 107 | /********************************************************************** |
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[292] | 108 | * Write an 8 bits memory mapped hardware register |
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[704] | 109 | *********************************************************************/ |
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[292] | 110 | static inline void iowrite8(void * addr, unsigned char value) |
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| 111 | { |
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[705] | 112 | unsigned int ext = CLUSTER_IO; |
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| 113 | |
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| 114 | asm volatile( |
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| 115 | "mtc2 %2, $24 \n" /* PADDR_EXT <= cluster_io */ |
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| 116 | "sb %0, 0(%1) \n" /* *(ext\addr) <= value */ |
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| 117 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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| 118 | "sync \n" /* sync barrier */ |
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| 119 | : |
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| 120 | : "r" (value), "r" (addr), "r" (ext) |
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| 121 | : "memory" ); |
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[292] | 122 | } |
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| 123 | |
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| 124 | #endif |
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[705] | 125 | |
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| 126 | // vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab |
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