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Last change
on this file since 690 was
568,
checked in by cfuguet, 11 years ago
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Adding support for TSAR platforms using the vci_io_bridge component.
In this case (USE_IOB=1), when a block is read from the disk controller,
the buffer containing the read data must be invalidated in the Memory
Cache as the transfer is done between the disk controller and the RAM.
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File size:
488 bytes
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| 1 | #ifndef MCC_H |
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| 2 | #define MCC_H |
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| 3 | |
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| 4 | enum MccRegisters |
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| 5 | { |
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| 6 | MCC_LOCK = 0, |
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| 7 | MCC_ADDR_LO = 1, |
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| 8 | MCC_ADDR_HI = 2, |
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| 9 | MCC_LENGTH = 3, |
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| 10 | MCC_CMD = 4 |
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| 11 | }; |
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| 12 | |
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| 13 | enum MccConfigCmd |
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| 14 | { |
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| 15 | MCC_CMD_NOP = 0, |
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| 16 | MCC_CMD_INVAL = 1, |
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| 17 | MCC_CMD_SYNC = 2 |
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| 18 | }; |
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| 19 | |
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| 20 | #endif |
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| 21 | |
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| 22 | // Local Variables: |
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| 23 | // tab-width: 4; |
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| 24 | // c-basic-offset: 4; |
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| 25 | // c-file-offsets:((innamespace . 0)(inline-open . 0)); |
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| 26 | // indent-tabs-mode: nil; |
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| 27 | // End: |
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| 28 | // |
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| 29 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 30 | |
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