|
Last change
on this file was 623, checked in by alain, 13 years ago |
|
Introducing the soft_hello_giet application.
|
|
File size:
2.4 KB
|
| Line | |
|---|
| 1 | /********************************************************************************/
|
|---|
| 2 | /* File : mips32_registers.h */
|
|---|
| 3 | /* Author : Alain Greiner */
|
|---|
| 4 | /* Date : 26/03/2012 */
|
|---|
| 5 | /* Modified by : Cesar Fuguet 10/02/2013 */
|
|---|
| 6 | /********************************************************************************/
|
|---|
| 7 | /* We define mnemonics for MIPS32 registers */
|
|---|
| 8 | /********************************************************************************/
|
|---|
| 9 |
|
|---|
| 10 | #ifndef _MIPS32_REGISTERS_H
|
|---|
| 11 | #define _MIPS32_REGISTERS_H
|
|---|
| 12 |
|
|---|
| 13 | /* processor registers */
|
|---|
| 14 |
|
|---|
| 15 | #define zero $0
|
|---|
| 16 | #define at $at
|
|---|
| 17 | #define v0 $2
|
|---|
| 18 | #define v1 $3
|
|---|
| 19 | #define a0 $4
|
|---|
| 20 | #define a1 $5
|
|---|
| 21 | #define a2 $6
|
|---|
| 22 | #define a3 $7
|
|---|
| 23 | #define t0 $8
|
|---|
| 24 | #define t1 $9
|
|---|
| 25 | #define t2 $10
|
|---|
| 26 | #define t3 $11
|
|---|
| 27 | #define t4 $12
|
|---|
| 28 | #define t5 $13
|
|---|
| 29 | #define t6 $14
|
|---|
| 30 | #define t7 $15
|
|---|
| 31 | #define s0 $16
|
|---|
| 32 | #define s1 $17
|
|---|
| 33 | #define s2 $18
|
|---|
| 34 | #define s3 $19
|
|---|
| 35 | #define s4 $20
|
|---|
| 36 | #define s5 $21
|
|---|
| 37 | #define s6 $22
|
|---|
| 38 | #define s7 $23
|
|---|
| 39 | #define t8 $24
|
|---|
| 40 | #define t9 $25
|
|---|
| 41 | #define k0 $26
|
|---|
| 42 | #define k1 $27
|
|---|
| 43 | #define gp $28
|
|---|
| 44 | #define sp $29
|
|---|
| 45 | #define fp $30
|
|---|
| 46 | #define ra $31
|
|---|
| 47 |
|
|---|
| 48 | /* CP0 registers */
|
|---|
| 49 |
|
|---|
| 50 | #define CP0_COUNT $9
|
|---|
| 51 | #define CP0_STATUS $12,0
|
|---|
| 52 | #define CP0_CAUSE $13,0
|
|---|
| 53 | #define CP0_EPC $14,0
|
|---|
| 54 | #define CP0_EBASE $15,1
|
|---|
| 55 | #define CP0_PROCID $15,1
|
|---|
| 56 |
|
|---|
| 57 | /* CP2 registers */
|
|---|
| 58 |
|
|---|
| 59 | #define CP2_PTPR $0
|
|---|
| 60 | #define CP2_MODE $1
|
|---|
| 61 | #define CP2_ICACHE_FLUSH $2
|
|---|
| 62 | #define CP2_DCACHE_FLUSH $3
|
|---|
| 63 | #define CP2_ITLB_INVAL $4
|
|---|
| 64 | #define CP2_DTLB_INVAL $5
|
|---|
| 65 | #define CP2_ICACHE_INVAL $6
|
|---|
| 66 | #define CP2_DCACHE_INVAL $7
|
|---|
| 67 | #define CP2_ICACHE_PREFETCH $8
|
|---|
| 68 | #define CP2_DCACHE_PREFETCH $9
|
|---|
| 69 | #define CP2_SYNC $10
|
|---|
| 70 | #define CP2_IETR $11
|
|---|
| 71 | #define CP2_DETR $12
|
|---|
| 72 | #define CP2_IBVAR $13
|
|---|
| 73 | #define CP2_DBVAR $14
|
|---|
| 74 | #define CP2_PARAMS $15
|
|---|
| 75 | #define CP2_RELEASE $16
|
|---|
| 76 | #define CP2_DATA_LO $17
|
|---|
| 77 | #define CP2_DATA_HI $18
|
|---|
| 78 | #define CP2_ICACHE_INVAL_PA $19
|
|---|
| 79 | #define CP2_DCACHE_INVAL_PA $20
|
|---|
| 80 | #define CP2_PADDR_EXT $24
|
|---|
| 81 |
|
|---|
| 82 | #endif
|
|---|
Note:
See
TracBrowser
for help on using the repository browser.