[292] | 1 | /** |
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| 2 | * \file : spi.h |
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| 3 | * \date : 30 August 2012 |
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| 4 | * \author: Cesar Fuguet <cesar.fuguet-tortolero@lip6.fr> |
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| 5 | * |
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| 6 | * This file contains the definition of a driver for the SPI controller |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef SPI_H |
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| 10 | #define SPI_H |
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| 11 | |
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| 12 | #include <io.h> |
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| 13 | |
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| 14 | /** |
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| 15 | * SPI type definition |
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| 16 | */ |
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| 17 | struct spi_dev |
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| 18 | { |
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| 19 | /** |
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| 20 | * RX/TX registers of the SPI controller |
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| 21 | */ |
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| 22 | unsigned int rx_tx[4]; |
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| 23 | |
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| 24 | /** |
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| 25 | * Control register of the SPI controller |
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| 26 | */ |
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| 27 | unsigned int ctrl; |
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| 28 | |
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| 29 | /** |
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| 30 | * Divider register for the SPI controller generated clock signal |
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| 31 | */ |
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| 32 | unsigned int divider; |
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| 33 | |
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| 34 | /** |
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| 35 | * Slave select register of the SPI controller |
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| 36 | */ |
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| 37 | unsigned int ss; |
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| 38 | }; |
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| 39 | |
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| 40 | /** |
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| 41 | * \param spi : initialized pointer to a SPI controller. |
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| 42 | * \param byte : Byte to send to the SPI controller |
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| 43 | * \param index : index of the TX register in the SPI (TX[index]) |
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| 44 | * |
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| 45 | * \return void |
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| 46 | * |
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| 47 | * \brief Send a byte to one of the tx buffer registers of the |
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| 48 | * SPI controller |
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| 49 | */ |
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| 50 | void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index); |
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| 51 | |
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| 52 | /** |
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| 53 | * \param spi : initialized pointer to a SPI controller. |
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| 54 | * \param index : index of the RX register in the SPI (RX[index]) |
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| 55 | * |
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| 56 | * \return byte from the RX[index] register |
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| 57 | * |
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| 58 | * \brief Get a byte from one of the rx buffer registers of the |
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| 59 | * SPI controller |
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| 60 | */ |
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| 61 | inline volatile unsigned char spi_get_rx(struct spi_dev * spi, int index); |
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| 62 | |
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| 63 | /** |
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| 64 | * \param spi : initialized pointer to a SPI controller. |
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[398] | 65 | * \param buf : buffer to store data read |
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| 66 | * \param count : byte count to read |
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| 67 | * |
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| 68 | * \return void |
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| 69 | * |
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| 70 | * \brief get a data block from the SPI controller using 128bits |
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| 71 | * reads if possible |
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| 72 | */ |
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| 73 | void spi_get_data(struct spi_dev * spi, void *buf, unsigned int count); |
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| 74 | |
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| 75 | /** |
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| 76 | * \param spi : initialized pointer to a SPI controller. |
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[292] | 77 | * \param index : index of the slave select signal to assert |
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| 78 | * |
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| 79 | * \return void |
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| 80 | * |
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| 81 | * \brief Set the index selected slave select signal (ss[index] <= '0') |
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| 82 | */ |
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| 83 | inline void spi_ss_assert(struct spi_dev * spi, int index); |
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| 84 | |
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| 85 | /** |
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| 86 | * \param spi : initialized pointer to a SPI controller. |
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| 87 | * \param index : index of the slave select signal to deassert |
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| 88 | * |
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| 89 | * \return void |
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| 90 | * |
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| 91 | * \brief Unset the index selected slave select signal (ss[index] <= '0') |
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| 92 | */ |
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| 93 | inline void spi_ss_deassert(struct spi_dev * spi, int index); |
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| 94 | |
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| 95 | /** |
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| 96 | * \param spi : initialized pointer to a SPI controller. |
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| 97 | * \param spi_freq : SPI Master to Slave clock frequency (in Hz) |
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| 98 | * \param sys_freq : System clock frequency (in Hz) |
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| 99 | * \param char_len : number to bits to transmit in one transfer |
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| 100 | * \param tx_edge : when 0, the Master Out Slave In signal is changed |
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| 101 | * on the falling edge of the clock |
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| 102 | * \param rx_edge : when 0, the Master In Slave Out signal is latched |
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| 103 | * on the falling edge of the clock |
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| 104 | * |
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| 105 | * \return void |
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| 106 | * |
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| 107 | * \brief Configure the SPI controller |
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| 108 | * \note Any of the arguments can be less than 0 if you want to keep the old value |
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| 109 | */ |
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| 110 | void spi_dev_config ( |
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| 111 | struct spi_dev * spi, |
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[388] | 112 | int spi_freq , |
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| 113 | int sys_freq , |
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| 114 | int char_len , |
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| 115 | int tx_edge , |
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| 116 | int rx_edge ); |
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[292] | 117 | |
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| 118 | /** |
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| 119 | * SPI macros and constants |
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| 120 | */ |
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| 121 | #define SPI_TX_POSEDGE 1 /**< MOSI is changed on neg edge */ |
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| 122 | #define SPI_TX_NEGEDGE 0 /**< MOSI is changed on pos edge */ |
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| 123 | #define SPI_RX_POSEDGE 1 /**< MISO is latched on pos edge */ |
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| 124 | #define SPI_RX_NEGEDGE 0 /**< MISO is latched on neg edge */ |
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| 125 | |
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| 126 | #define SPI_CTRL_ASS_EN ( 1 << 13 ) /**< Auto Slave Sel Assertion */ |
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| 127 | #define SPI_CTRL_IE_EN ( 1 << 12 ) /**< Interrupt Enable */ |
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| 128 | #define SPI_CTRL_LSB_EN ( 1 << 11 ) /**< LSB are sent first */ |
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| 129 | #define SPI_CTRL_TXN_EN ( 1 << 10 ) /**< MOSI is changed on neg edge */ |
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| 130 | #define SPI_CTRL_RXN_EN ( 1 << 9 ) /**< MISO is latched on neg edge */ |
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| 131 | #define SPI_CTRL_GO_BSY ( 1 << 8 ) /**< Start the transfer */ |
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| 132 | #define SPI_CTRL_CHAR_LEN_MASK ( 0xFF ) /**< Bits transmited in 1 transfer */ |
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| 133 | #define SPI_RXTX_MASK ( 0xFF ) /**< Mask for the an RX/TX value */ |
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| 134 | |
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[388] | 135 | /** |
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| 136 | * \param x : Initialized pointer to the SPI controller |
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| 137 | * |
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| 138 | * \return 1 if there is an unfinished transfer in the SPI controller |
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| 139 | * |
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| 140 | * \brief Check the GO_BUSY bit of the SPI Controller |
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| 141 | */ |
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[292] | 142 | #define SPI_IS_BUSY(x) ((ioread32(&x->ctrl) & SPI_CTRL_GO_BSY) != 0) ? 1 : 0 |
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| 143 | |
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| 144 | #endif |
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| 145 | |
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| 146 | /* |
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| 147 | * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 |
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| 148 | */ |
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