source: trunk/softs/tsar_boot/include/spi.h @ 471

Last change on this file since 471 was 398, checked in by bouyer, 11 years ago

Use 128bits transfers at the SPI controller level when possible;
this speeds up the boot

File size: 4.5 KB
Line 
1/**
2 * \file  : spi.h
3 * \date  : 30 August 2012
4 * \author: Cesar Fuguet <cesar.fuguet-tortolero@lip6.fr>
5 *
6 * This file contains the definition of a driver for the SPI controller
7 */
8
9#ifndef SPI_H
10#define SPI_H
11
12#include <io.h>
13
14/**
15 * SPI type definition
16 */
17struct spi_dev
18{
19    /**
20     * RX/TX registers of the SPI controller
21     */
22    unsigned int rx_tx[4];
23
24    /**
25     * Control register of the SPI controller
26     */
27    unsigned int ctrl;
28
29    /**
30     * Divider register for the SPI controller generated clock signal
31     */
32    unsigned int divider;
33
34    /**
35     * Slave select register of the SPI controller
36     */
37    unsigned int ss;
38};
39
40/**
41 * \param   spi     : initialized pointer to a SPI controller.
42 * \param   byte    : Byte to send to the SPI controller
43 * \param   index   : index of the TX register in the SPI (TX[index])
44 *
45 * \return  void
46 *
47 * \brief   Send a byte to one of the tx buffer registers of the
48 *          SPI controller
49 */
50void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index);
51
52/**
53 * \param   spi     : initialized pointer to a SPI controller.
54 * \param   index   : index of the RX register in the SPI (RX[index])
55 *
56 * \return  byte from the RX[index] register
57 *
58 * \brief   Get a byte from one of the rx buffer registers of the
59 *          SPI controller
60 */
61inline volatile unsigned char spi_get_rx(struct spi_dev * spi, int index);
62
63/**
64 * \param   spi     : initialized pointer to a SPI controller.
65 * \param   buf     : buffer to store data read
66 * \param   count   : byte count to read
67 *
68 * \return  void
69 *
70 * \brief   get a data block from the SPI controller using 128bits
71 *          reads if possible
72 */
73void spi_get_data(struct spi_dev * spi, void *buf, unsigned int count);
74
75/**
76 * \param   spi     : initialized pointer to a SPI controller.
77 * \param   index   : index of the slave select signal to assert
78 *
79 * \return  void
80 *
81 * \brief   Set the index selected slave select signal (ss[index] <= '0')
82 */
83inline void spi_ss_assert(struct spi_dev * spi, int index);
84
85/**
86 * \param   spi     : initialized pointer to a SPI controller.
87 * \param   index   : index of the slave select signal to deassert
88 *
89 * \return  void
90 *
91 * \brief   Unset the index selected slave select signal (ss[index] <= '0')
92 */
93inline void spi_ss_deassert(struct spi_dev * spi, int index);
94
95/**
96 * \param   spi         : initialized pointer to a SPI controller.
97 * \param   spi_freq    : SPI Master to Slave clock frequency (in Hz)
98 * \param   sys_freq    : System clock frequency (in Hz)
99 * \param   char_len    : number to bits to transmit in one transfer
100 * \param   tx_edge     : when 0, the Master Out Slave In signal is changed
101 *                        on the falling edge of the clock
102 * \param   rx_edge     : when 0, the Master In Slave Out signal is latched
103 *                        on the falling edge of the clock
104 *
105 * \return  void
106 *
107 * \brief   Configure the SPI controller
108 * \note    Any of the arguments can be less than 0 if you want to keep the old value
109 */
110void spi_dev_config (
111        struct spi_dev * spi,
112        int spi_freq        ,
113        int sys_freq        ,
114        int char_len        ,
115        int tx_edge         ,
116        int rx_edge         );
117
118/**
119 * SPI macros and constants
120 */
121#define SPI_TX_POSEDGE         1           /**< MOSI is changed on neg edge   */
122#define SPI_TX_NEGEDGE         0           /**< MOSI is changed on pos edge   */
123#define SPI_RX_POSEDGE         1           /**< MISO is latched on pos edge   */
124#define SPI_RX_NEGEDGE         0           /**< MISO is latched on neg edge   */
125
126#define SPI_CTRL_ASS_EN        ( 1 << 13 ) /**< Auto Slave Sel Assertion      */
127#define SPI_CTRL_IE_EN         ( 1 << 12 ) /**< Interrupt Enable              */
128#define SPI_CTRL_LSB_EN        ( 1 << 11 ) /**< LSB are sent first            */
129#define SPI_CTRL_TXN_EN        ( 1 << 10 ) /**< MOSI is changed on neg edge   */
130#define SPI_CTRL_RXN_EN        ( 1 << 9  ) /**< MISO is latched on neg edge   */
131#define SPI_CTRL_GO_BSY        ( 1 << 8  ) /**< Start the transfer            */
132#define SPI_CTRL_CHAR_LEN_MASK (  0xFF   ) /**< Bits transmited in 1 transfer */
133#define SPI_RXTX_MASK          (  0xFF   ) /**< Mask for the an RX/TX value   */
134
135/**
136 * \param  x : Initialized pointer to the SPI controller
137 *
138 * \return 1 if there is an unfinished transfer in the SPI controller
139 *
140 * \brief  Check the GO_BUSY bit of the SPI Controller
141 */
142#define SPI_IS_BUSY(x)         ((ioread32(&x->ctrl) & SPI_CTRL_GO_BSY) != 0) ? 1 : 0
143
144#endif
145
146/*
147 * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4
148 */
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