1 | /** |
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2 | * \file : reset.S |
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3 | * \date : 01/12/2012 |
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4 | * \author: Cesar FUGUET & Manuel BOUYER & Alain Greiner |
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5 | * |
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6 | * This is a boot code for a generic multi-clusters / multi-processors |
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7 | * TSAR architecture (up to 256 clusters / up to 4 processors per cluster). |
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8 | * There is one XICU, one TTY, one DMA and one stack segment per cluster. |
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9 | * segment base adresses = base + cluster_segment_increment*cluster_id |
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10 | * |
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11 | * - Each processor initializes the Status Register (SR) to disable interrupts. |
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12 | * - Each processor initializes the Count Register. |
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13 | * - Each processor initialises its private XICU Write Triggered Interruption |
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14 | * mask register. |
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15 | * - Only processor 0 initializes the stack pointer ($29). |
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16 | * - Only processor 0 (boot processor) executes the boot_load_elf function to |
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17 | * load in memory the boot loader stored in the block BOOT_LOADER_LBA of |
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18 | * the disk. |
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19 | * - All non-boot processors wait in a low power consumption mode that the |
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20 | * processor 0 wakes them using the IPI (Inter Processor Interruption) |
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21 | * functionality of the XICU device. |
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22 | */ |
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23 | |
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24 | #include <defs.h> |
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25 | #include <mips32_registers.h> |
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26 | |
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27 | .section .boot,"ax",@progbits |
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28 | |
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29 | .extern seg_stack_base |
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30 | |
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31 | .extern dtb_addr |
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32 | .extern boot_putc |
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33 | .extern boot_getc |
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34 | .extern boot_ioc_read |
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35 | .extern boot_elf_loader |
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36 | .extern memcpy |
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37 | .extern boot_puts |
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38 | .extern boot_putx |
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39 | .extern boot_putd |
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40 | .extern boot_ioc_init |
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41 | .extern versionstr |
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42 | |
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43 | .globl boot /* Make reset an external symbol */ |
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44 | .ent boot |
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45 | |
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46 | .align 2 |
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47 | .set noreorder |
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48 | |
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49 | boot: |
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50 | b _boot /* 0xbfc0000 */ |
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51 | nop /* 0xbfc0004 */ |
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52 | |
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53 | /* Addresses of the functions provided by this pre-loader */ |
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54 | |
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55 | .word BOOT_VERSION /* 0xbfc0008 */ |
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56 | .word dtb_addr /* 0xbfc000c */ |
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57 | .word boot_putc /* 0xbfc0010 */ |
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58 | .word boot_getc /* 0xbfc0014 */ |
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59 | .word boot_ioc_read /* 0xbfc0018 */ |
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60 | .word boot_elf_loader /* 0xbfc001C */ |
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61 | .word memcpy /* 0xbfc0020 */ |
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62 | .word boot_puts /* 0xbfc0024 */ |
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63 | .word boot_putx /* 0xbfc0028 */ |
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64 | .word boot_putd /* 0xbfc002C */ |
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65 | |
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66 | _boot: |
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67 | /* Disable interruptions, keep STATUSbev enabled */ |
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68 | |
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69 | li k0, (1 << 22) |
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70 | mtc0 k0, CP0_STATUS |
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71 | |
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72 | /* Computes proc_id, local_id, cluster_id, and cluster_increment */ |
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73 | |
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74 | mfc0 k0, CP0_EBASE |
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75 | andi t0, k0, 0x3FF /* t0 <= proc_id (at most 1024 processors) */ |
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76 | |
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77 | move t3, t0 |
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78 | |
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79 | la k0, NB_PROCS /* k0 <= number of processors per cluster */ |
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80 | divu t3, k0 |
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81 | mfhi t1 /* t1 <= local_id = proc_id % NB_PROCS */ |
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82 | mflo t2 /* t2 <= cluster_id = proc_id / NB_PROCS */ |
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83 | |
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84 | la k0, NB_CLUSTERS |
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85 | li t3, 0x80000000 |
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86 | divu t3, k0 |
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87 | mflo t4 |
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88 | sll t4, 1 /* t4 <= cluster_increment = 4G / NB_CLUSTERS */ |
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89 | |
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90 | mult t4, t2 |
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91 | mflo t5 /* t5 <= cluster_id * cluster_increment */ |
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92 | |
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93 | /* Initialization of the count register in the coprocessor 0 */ |
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94 | |
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95 | mtc0 zero, CP0_COUNT |
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96 | |
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97 | /* In each cluster, the ICU base address depends on the cluster_id */ |
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98 | |
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99 | la t3, ICU_BASE |
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100 | addu t3, t3, t5 /* t3 <= ICU_BASE + */ |
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101 | /* (cluster_id * cluster_increment) */ |
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102 | |
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103 | /** |
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104 | * Compute the output index for the Write Triggered Interruption mask. |
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105 | * Each processor enable the WTI for its irq output |
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106 | * Each processor may have IRQ_PER_PROC private irq outputs from |
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107 | * the XICU |
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108 | */ |
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109 | |
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110 | move t4, t1 /* t4 <= local_id */ |
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111 | li t5, IRQ_PER_PROC /* t5 <= IRQ_PER_PROC */ |
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112 | multu t4, t5 |
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113 | mflo t6 /* t6 <= IRQ_PER_PROC * local_id */ |
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114 | sll t4, t6, 2 /* t4 <= OUT_INDEX = t6 * 4 */ |
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115 | |
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116 | li t5, (0xC << 7) /* t5 <= FUNC = XICU_MSK_WTI */ |
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117 | or t4, t4, t5 /* t4 <= FUNC | INDEX | 00 */ |
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118 | or t5, t3, t4 /* t5 <= &XICU[MSK_WTI][OUT_INDEX] */ |
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119 | |
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120 | /* Compute and set WTI mask */ |
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121 | |
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122 | li t4, 1 |
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123 | sllv t4, t4, t1 /* Set XICU[MSK_WTI][INDEX][local_id] */ |
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124 | sw t4, 0(t5) /* XICU[MSK_WTI][INDEX] <= t4 */ |
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125 | |
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126 | /** |
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127 | * We have: |
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128 | * t0: global id |
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129 | * t1: local id |
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130 | * t2: cluster id |
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131 | * t3: xicu base address |
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132 | * |
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133 | * Only processor 0 in cluster 0 executes the boot loader |
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134 | */ |
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135 | |
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136 | bne zero, t0, _reset_wait |
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137 | nop |
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138 | |
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139 | /* Initializes stack pointer */ |
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140 | |
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141 | la k1, seg_stack_base |
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142 | li k0, BOOT_STACK_SIZE |
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143 | addu sp, k1, k0 /* sp <= seg_stack_base + BOOT_STACK_SIZE */ |
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144 | |
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145 | la a0, versionstr |
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146 | la k0, boot_puts |
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147 | jalr k0 |
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148 | nop |
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149 | |
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150 | #ifndef SOCLIB_IOC |
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151 | |
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152 | /* Initialize the block device */ |
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153 | |
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154 | la k0, boot_ioc_init |
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155 | jalr k0 |
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156 | nop |
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157 | |
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158 | #endif |
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159 | |
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160 | /** |
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161 | * Jump to the boot elf loader routine |
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162 | * Passing as argument the block number in which it must be |
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163 | * the executable elf file to load |
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164 | */ |
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165 | |
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166 | la k0, boot_elf_loader |
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167 | li a0, BOOT_LOADER_LBA |
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168 | jalr k0 |
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169 | nop |
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170 | |
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171 | /** |
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172 | * We jump to the entry point address defined in the |
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173 | * ELF file. This address is returned by boot_elf_loader function. |
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174 | * All function arguments are 0 |
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175 | */ |
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176 | |
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177 | move a0, zero |
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178 | move a1, zero |
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179 | move a2, zero |
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180 | move a3, zero |
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181 | jr v0 |
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182 | nop |
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183 | |
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184 | /** |
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185 | * Wait in low power consumption mode until the application wakes us. |
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186 | * The application wakes up the non-boot CPUs using a IPI with a non-0 |
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187 | * value in the mailbox. This non-0 value is the address to jump to. |
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188 | */ |
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189 | |
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190 | _reset_wait: |
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191 | /** |
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192 | * We have: |
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193 | * t0: global id |
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194 | * t1: local id |
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195 | * t2: cluster id |
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196 | * t3: xicu base address |
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197 | */ |
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198 | |
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199 | sll t4, t1, 2 /* t4 <= local_id * 4 */ |
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200 | addu t5, t4, t3 /* t5 <= &XICU[WTI_REG][local_id] */ |
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201 | |
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202 | wait |
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203 | |
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204 | lw k0, 0(t5) /* k0 <= XICU[WTI_REG][local_id] */ |
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205 | jr k0 |
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206 | nop |
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207 | |
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208 | /* Exception entry point */ |
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209 | .org 0x0380 |
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210 | _excep: |
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211 | mfc0 a0, CP0_STATUS /* first arg is status */ |
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212 | mfc0 a1, CP0_CAUSE /* second arg is cause */ |
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213 | mfc0 a2, CP0_EPC /* third argc is epc */ |
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214 | nop |
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215 | j handle_except |
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216 | nop |
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217 | |
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218 | .end boot |
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219 | |
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220 | .set reorder |
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221 | |
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222 | /* |
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223 | * vim: tabstop=4 : shiftwidth=4 : expandtab |
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224 | */ |
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