1 | #include <reset_ioc.h> |
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2 | |
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3 | #ifndef SOCLIB_IOC |
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4 | |
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5 | static struct sdcard_dev _sdcard_device; |
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6 | static struct spi_dev *const _spi_device = ( struct spi_dev * )IOC_PADDR_BASE; |
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7 | |
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8 | #endif |
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9 | |
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10 | #define SDCARD_RESET_ITER_MAX 4 |
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11 | |
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12 | /////////////////////////////////// |
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13 | inline void reset_sleep(int cycles) |
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14 | { |
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15 | int i; |
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16 | for (i = 0; i < cycles; i++); |
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17 | } |
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18 | |
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19 | #if RESET_DEBUG |
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20 | //////////////////////////////////// |
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21 | inline unsigned int reset_proctime() |
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22 | { |
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23 | unsigned int ret; |
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24 | asm volatile ("mfc0 %0, $9":"=r" (ret)); |
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25 | return ret; |
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26 | } |
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27 | #endif |
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28 | |
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29 | #ifndef SOCLIB_IOC |
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30 | ///////////////////////////////////////////////////////////////////////////////// |
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31 | // reset_ioc_init |
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32 | // This function initializes the SDCARD / required for FPGA. |
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33 | ///////////////////////////////////////////////////////////////////////////////// |
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34 | int reset_ioc_init() |
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35 | { |
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36 | unsigned char sdcard_rsp; |
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37 | |
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38 | reset_puts("Initializing block device\n\r"); |
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39 | |
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40 | /** |
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41 | * Initializing the SPI controller |
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42 | */ |
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43 | spi_dev_config ( |
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44 | _spi_device , |
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45 | 200000 , /**< SPI_clk: 200 Khz */ |
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46 | SYSCLK_FREQ , /**< Sys_clk */ |
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47 | 8 , /**< Charlen: 8 */ |
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48 | SPI_TX_NEGEDGE, |
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49 | SPI_RX_POSEDGE |
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50 | ); |
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51 | |
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52 | /** |
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53 | * Initializing the SD Card |
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54 | */ |
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55 | unsigned int iter = 0; |
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56 | while(1) |
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57 | { |
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58 | reset_puts("Trying to initialize SD card... "); |
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59 | |
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60 | sdcard_rsp = sdcard_dev_open(&_sdcard_device, _spi_device, 0); |
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61 | if (sdcard_rsp == 0) |
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62 | { |
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63 | reset_puts("OK\n"); |
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64 | break; |
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65 | } |
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66 | |
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67 | reset_puts("KO\n"); |
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68 | reset_sleep(1000); |
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69 | if (++iter >= SDCARD_RESET_ITER_MAX) |
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70 | { |
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71 | reset_puts("\nERROR: During SD card reset to IDLE state\n" |
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72 | "/ card response = "); |
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73 | reset_putx(sdcard_rsp); |
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74 | reset_puts("\n"); |
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75 | reset_exit(); |
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76 | } |
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77 | } |
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78 | |
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79 | /** |
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80 | * Set the block length of the SD Card |
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81 | */ |
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82 | sdcard_rsp = sdcard_dev_set_blocklen(&_sdcard_device, 512); |
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83 | if (sdcard_rsp) |
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84 | { |
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85 | reset_puts("ERROR: During SD card blocklen initialization\n"); |
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86 | reset_exit(); |
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87 | } |
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88 | |
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89 | /** |
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90 | * Incrementing SDCARD clock frequency for normal function |
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91 | */ |
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92 | spi_dev_config ( |
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93 | _spi_device , |
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94 | 10000000 , /**< SPI_clk 10 Mhz */ |
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95 | SYSCLK_FREQ , /**< Sys_clk */ |
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96 | -1 , /**< Charlen: 8 */ |
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97 | -1 , |
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98 | -1 |
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99 | ); |
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100 | |
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101 | reset_puts("Finish block device initialization\n\r"); |
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102 | |
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103 | return 0; |
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104 | } // end reset_ioc_init() |
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105 | #endif |
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106 | |
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107 | #ifdef SOCLIB_IOC |
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108 | ///////////////////////////////////////////////////////////////////////////////////// |
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109 | // reset_ioc_completed() |
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110 | // This blocking function checks completion of an I/O transfer and reports errors. |
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111 | // It returns 0 if the transfer is successfully completed. |
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112 | // It returns -1 if an error has been reported. |
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113 | ///////////////////////////////////////////////////////////////////////////////////// |
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114 | int reset_ioc_completed() |
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115 | { |
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116 | unsigned int status = 0; |
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117 | |
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118 | unsigned int * ioc_address = ( unsigned int * )IOC_PADDR_BASE; |
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119 | |
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120 | while ( 1 ) |
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121 | { |
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122 | status = ioread32(&ioc_address[BLOCK_DEVICE_STATUS]); |
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123 | |
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124 | if (( status == BLOCK_DEVICE_READ_SUCCESS ) || |
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125 | ( status == BLOCK_DEVICE_READ_ERROR )) |
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126 | break; |
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127 | } |
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128 | |
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129 | return status; |
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130 | } // end reset_ioc_completed() |
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131 | #endif |
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132 | |
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133 | #ifdef SOCLIB_IOC |
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134 | ///////////////////////////////////////////////////////////////////////////////////// |
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135 | // reset_ioc_read() |
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136 | // Transfer data the block device to a memory buffer: SOCLIB version |
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137 | // - param lba : first block index on the disk |
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138 | // - param buffer : base address of the memory buffer |
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139 | // - param count : number of blocks to be transfered |
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140 | // This is a blocking function. The function returns once the transfer is completed. |
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141 | ///////////////////////////////////////////////////////////////////////////////////// |
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142 | int reset_ioc_read( unsigned int lba, |
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143 | void* buffer, |
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144 | unsigned int count ) |
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145 | { |
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146 | |
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147 | unsigned int * ioc_address = (unsigned int*)IOC_PADDR_BASE; |
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148 | |
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149 | #if RESET_DEBUG |
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150 | unsigned int start_time; |
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151 | unsigned int end_time; |
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152 | reset_puts("[RESET DEBUG] Reading blocks "); |
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153 | reset_putd(lba); |
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154 | reset_puts(" to "); |
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155 | reset_putd(lba + count - 1); |
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156 | |
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157 | start_time = reset_proctime(); |
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158 | #endif |
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159 | |
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160 | // block_device configuration |
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161 | iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], |
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162 | ( unsigned int ) buffer ); |
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163 | |
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164 | iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], |
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165 | ( unsigned int ) count ); |
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166 | |
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167 | iowrite32( &ioc_address[BLOCK_DEVICE_LBA], |
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168 | ( unsigned int ) lba ); |
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169 | |
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170 | iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], |
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171 | ( unsigned int ) 0 ); |
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172 | |
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173 | iowrite32( &ioc_address[BLOCK_DEVICE_OP], |
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174 | ( unsigned int ) BLOCK_DEVICE_READ ); |
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175 | |
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176 | reset_ioc_completed(); |
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177 | |
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178 | #if (CACHE_COHERENCE == 0) || (USE_IOB == 1) |
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179 | reset_buf_invalidate(buffer, CACHE_LINE_SIZE, count * 512); |
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180 | #endif |
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181 | |
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182 | #if USE_IOB |
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183 | reset_mcc_invalidate(buffer, count * 512); |
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184 | #endif |
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185 | |
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186 | #if RESET_DEBUG |
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187 | end_time = reset_proctime(); |
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188 | reset_puts(" / cycles for transfert: "); |
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189 | reset_putd(end_time - start_time); |
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190 | reset_puts("\n"); |
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191 | #endif |
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192 | |
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193 | return 0; |
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194 | } // end reset_ioc_read() |
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195 | |
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196 | #else |
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197 | |
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198 | ///////////////////////////////////////////////////////////////////////////////////// |
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199 | // reset_ioc_read() |
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200 | // Transfer data the block device to a memory buffer: FPGA version |
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201 | // - param lba : first block index on the disk |
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202 | // - param buffer : base address of the memory buffer |
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203 | // - param count : number of blocks to be transfered |
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204 | // This is a blocking function. The function returns once the transfer is completed. |
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205 | ///////////////////////////////////////////////////////////////////////////////////// |
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206 | int reset_ioc_read( unsigned int lba, |
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207 | void* buffer, |
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208 | unsigned int count ) |
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209 | { |
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210 | unsigned int sdcard_rsp; |
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211 | unsigned int i; |
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212 | |
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213 | sdcard_dev_lseek(&_sdcard_device, lba); |
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214 | |
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215 | #if RESET_DEBUG |
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216 | unsigned int start_time; |
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217 | unsigned int end_time; |
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218 | reset_puts("[RESET DEBUG] Reading blocks "); |
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219 | reset_putd(lba); |
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220 | reset_puts(" to "); |
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221 | reset_putd(lba + count - 1); |
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222 | start_time = reset_proctime(); |
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223 | #endif |
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224 | |
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225 | for(i = 0; i < count; i++) |
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226 | { |
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227 | if (( sdcard_rsp = sdcard_dev_read ( |
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228 | &_sdcard_device, |
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229 | (unsigned char *) buffer + (512 * i), |
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230 | 512 |
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231 | ) |
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232 | )) |
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233 | { |
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234 | reset_puts("ERROR during read on the SDCARD device. Code: "); |
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235 | reset_putx(sdcard_rsp); |
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236 | reset_puts("\n\r"); |
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237 | |
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238 | return 1; |
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239 | } |
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240 | } |
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241 | |
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242 | #if RESET_DEBUG |
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243 | end_time = reset_proctime(); |
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244 | reset_puts(" / cycles for transfert: "); |
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245 | reset_putd(end_time - start_time); |
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246 | reset_puts("\n"); |
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247 | #endif |
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248 | |
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249 | return 0; |
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250 | } // end reset_ioc_read() |
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251 | #endif |
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252 | |
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253 | ////////////////////////////////////////////////////////////////////////////// |
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254 | // reset_dcache_buf_invalidate() |
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255 | // Invalidate all data cache lines corresponding to a memory buffer |
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256 | // (identified by an address and a size) in L1 cache. |
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257 | ///////////////////////////////////////////////////////////////////////////// |
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258 | #if (CACHE_COHERENCE == 0) || (USE_IOB == 1) |
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259 | void reset_buf_invalidate ( const void * buffer, |
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260 | unsigned int line_size, |
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261 | unsigned int size) |
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262 | { |
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263 | unsigned int i; |
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264 | |
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265 | // iterate on cache lines |
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266 | for (i = 0; i <= size; i += line_size) |
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267 | { |
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268 | asm volatile( |
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269 | " cache %0, %1" |
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270 | :// no outputs |
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271 | :"i" (0x11), "R" (*((unsigned char *) buffer + i)) |
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272 | ); |
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273 | } |
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274 | } |
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275 | #endif |
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276 | |
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277 | ////////////////////////////////////////////////////////////////////////////// |
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278 | // reset_mcc_inval() |
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279 | // Invalidate all data cache lines corresponding to a memory buffer |
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280 | // (identified by an address and a size) in L2 cache. |
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281 | ///////////////////////////////////////////////////////////////////////////// |
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282 | #if USE_IOB |
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283 | void reset_mcc_invalidate ( const void * buffer, |
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284 | unsigned int size) |
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285 | { |
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286 | unsigned int * mcc_address = (unsigned int *)MCC_PADDR_BASE; |
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287 | |
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288 | // get the hard lock assuring exclusive access to MEMC |
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289 | while (ioread32(&mcc_address[MCC_LOCK])); |
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290 | |
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291 | // write invalidate paremeters on the memory cache |
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292 | // this preloader use only the cluster 0 and then the HI bits are not used |
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293 | |
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294 | iowrite32(&mcc_address[MCC_ADDR_LO], (unsigned int) buffer); |
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295 | iowrite32(&mcc_address[MCC_ADDR_HI], (unsigned int) 0); |
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296 | iowrite32(&mcc_address[MCC_LENGTH] , (unsigned int) size); |
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297 | iowrite32(&mcc_address[MCC_CMD] , (unsigned int) MCC_CMD_INVAL); |
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298 | |
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299 | // release the lock protecting MEMC |
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300 | iowrite32(&mcc_address[MCC_LOCK], (unsigned int) 0); |
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301 | } |
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302 | #endif |
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303 | |
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304 | /* |
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305 | * vim: tabstop=4 : shiftwidth=4 : expandtab |
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306 | */ |
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