- Timestamp:
- Jun 16, 2015, 9:24:36 PM (10 years ago)
- Location:
- branches/reconfiguration
- Files:
-
- 9 edited
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- Unmodified
- Added
- Removed
-
branches/reconfiguration/modules/dspin_local_crossbar/caba/source/include/dspin_local_crossbar.h
r977 r1001 70 70 DspinOutput<flit_width>* p_local_out; 71 71 72 sc_in<uint32_t> *p_barrier_enable; 73 72 74 void print_trace(); 73 75 … … 86 88 const bool is_cmd, 87 89 const bool use_routing_table, 88 const bool broadcast_supported ); 90 const bool broadcast_supported, 91 const bool hardware_barrier = false ); 89 92 90 93 ~DspinLocalCrossbar(); -
branches/reconfiguration/modules/dspin_local_crossbar/caba/source/src/dspin_local_crossbar.cpp
r977 r1001 52 52 const bool is_cmd, 53 53 const bool use_routing_table, 54 const bool broadcast_supported) 54 const bool broadcast_supported, 55 const bool hardware_barrier ) 55 56 : BaseModule(name), 56 57 … … 141 142 } 142 143 144 if ( hardware_barrier ) 145 { 146 p_barrier_enable = new sc_in<uint32_t>("p_barrier_enable"); 147 } 148 else 149 { 150 p_barrier_enable = NULL; 151 } 152 143 153 assert( (flit_width >= x_width + y_width + l_width) and 144 154 "ERROR in DSPIN_LOCAL_CROSSBAR: flit_width < x_width + y_width + l_width"); … … 281 291 internal_flit_t fifo_out_wdata[m_local_outputs+1]; 282 292 293 // local-to-global and global-to-local hardware barrier enable signal 294 const bool barrier_enable = (p_barrier_enable != NULL) and 295 (p_barrier_enable->read() != 0xFFFFFFFF); 296 283 297 // reset 284 298 if ( p_resetn.read() == false ) … … 326 340 for ( size_t j = 0 ; j <= m_local_outputs ; j++ ) 327 341 { 328 if( r_alloc_out[j].read() and (r_fifo_out[j].wok()) ) 342 bool read = r_fifo_out[j].wok(); 343 if ( j == m_local_outputs ) 344 { 345 read = read or barrier_enable; 346 } 347 if( r_alloc_out[j].read() and read ) 329 348 { 330 349 get_out[j] = r_index_out[j].read(); … … 349 368 { 350 369 put_in[i] = false; 351 if ( r_fifo_in[i].rok() ) // packet available in input fifo 370 371 bool write = r_fifo_in[i].rok(); 372 if ( i == m_local_inputs ) 373 { 374 write = write and not barrier_enable; 375 } 376 if ( write ) // packet available in input fifo 352 377 { 353 378 if ( is_broadcast(r_fifo_in[i].read().data ) and … … 491 516 } 492 517 } // end loop on input ports 518 fifo_in_read[m_local_inputs] = fifo_in_read[m_local_inputs] or barrier_enable; 493 519 494 520 // loop on the output ports : … … 499 525 if( r_alloc_out[j] ) // output port allocated 500 526 { 501 fifo_out_write[j] = put_in[r_index_out[j]]; 527 bool write = put_in[r_index_out[j]]; 528 if (j == m_local_outputs) 529 { 530 write = write and not barrier_enable; 531 } 532 fifo_out_write[j] = write; 502 533 fifo_out_wdata[j] = data_in[r_index_out[j]]; 534 503 535 } 504 536 } // end loop on the output ports -
branches/reconfiguration/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp
r988 r1001 6147 6147 uint64_t header = p_dspin_m2p.data.read(); 6148 6148 uint64_t dest = DDP::dspin_get(header, DDP::TEST_M2P_DEST); 6149 assert((size_t)dest == m_cc_global_id); 6149 6150 if ((size_t)dest != m_cc_global_id) { 6151 std::cout << this->name() << ": ERROR in CC_RECEIVE_TEST_HEADER" 6152 << " / cycle: " << std::dec << m_cpt_total_cycles 6153 << " / TEST_M2P packet received but its destination (" << dest << ")" 6154 << "is not the current processor (" << m_cc_global_id << ")" 6155 << std::endl; 6156 exit(1); 6157 } 6150 6158 6151 6159 r_cc_receive_fsm = CC_RECEIVE_TEST_SIGNATURE; -
branches/reconfiguration/modules/vci_local_crossbar/caba/source/include/vci_local_crossbar.h
r932 r1001 56 56 sc_in<bool> p_resetn; 57 57 58 sc_in<uint32_t> *p_barrier_enable; 59 58 60 VciInitiator<vci_param> *p_to_target; 59 61 VciTarget<vci_param> *p_to_initiator; … … 92 94 const size_t nb_attached_initiators, 93 95 const size_t nb_attached_targets, 94 const size_t default_target_id ); 96 const size_t default_target_id, 97 const bool hardware_barrier = false ); 95 98 ~VciLocalCrossbar(); 96 99 }; -
branches/reconfiguration/modules/vci_local_crossbar/caba/source/src/vci_local_crossbar.cpp
r933 r1001 78 78 const void* m_lt; // locality table if cmd / id_locality table if rsp 79 79 const bool m_is_cmd; // cmd crossbar when true 80 bool m_barrier; // barrier in the global interface is enabled 80 81 81 82 sc_signal<bool>* r_allocated; // for each output port: allocation state … … 97 98 m_rt( rt ), 98 99 m_lt( lt ), 99 m_is_cmd( is_cmd ) 100 m_is_cmd( is_cmd ), 101 m_barrier( false ) 100 102 { 101 103 r_allocated = new sc_signal<bool>[out_size]; … … 104 106 r_bc_count = new sc_signal<size_t>[in_size]; 105 107 } // end constructor 108 109 ////////////////////////////////// 110 void setBarrier(const bool &value) 111 { 112 m_barrier = value; 113 } 106 114 107 115 //////////// … … 147 155 } 148 156 } 157 std::cout << " / barrier enable = " << m_barrier; 149 158 } // end print_trace() 150 159 … … 190 199 for( size_t in = 0 ; in < m_in_size ; in++ ) 191 200 { 192 if ( input_port[in]->getVal() ) 201 /* drop global-to-local packets when the barrier is enabled */ 202 bool write = input_port[in]->getVal(); 203 if ( in == (m_in_size - 1) ) 204 write = write && !m_barrier; 205 206 if ( write ) 193 207 { 194 208 if ( r_bc_state[in].read() ) // pending broadcast … … 237 251 { 238 252 size_t in = (_in + r_origin[out] + 1) % m_in_size; 239 if ( input_port[in]->getVal() ) 253 254 /* drop global-to-local packets when the barrier is enabled */ 255 bool write = input_port[in]->getVal(); 256 if ( in == (m_in_size - 1) ) 257 write = write && !m_barrier; 258 259 if ( write ) 240 260 { 241 261 pkt_t tmp; … … 285 305 pkt_t tmp; 286 306 tmp.readFrom(*input_port[in]); 307 308 // if the hardware barrier is activated, drop all 309 // local-to-global packets. This is done by consuming every 310 // incoming packet (send the acknowledgement to the input port) 311 // and resetting the cmdval signal to the upper network level. 312 bool read = output_port[out]->getAck(); 313 if (out == (m_out_size - 1)) { 314 read = read || m_barrier; 315 tmp.set_val(tmp.val() && !m_barrier); 316 } 317 318 ack[in] = read; 287 319 tmp.writeTo(*output_port[out]); 288 ack[in] = output_port[out]->getAck(); 320 289 321 if ( r_bc_state[in].read() ) // its a broacast 290 322 { … … 299 331 } 300 332 } 333 // Drop all global-to-local packets when the hardware barrier is enabled 334 ack[m_in_size - 1] = ack[m_in_size - 1] || m_barrier; 301 335 302 336 // Send acknowledges on input ports … … 313 347 std::cout << "LOCAL_CROSSBAR " << name() << " / "; 314 348 m_cmd_crossbar->print_trace(); 315 m_rsp_crossbar->print_trace(); 349 std::cout << " / "; 350 m_rsp_crossbar->print_trace(); 316 351 std::cout << std::endl; 317 352 } … … 327 362 } 328 363 364 if (p_barrier_enable != NULL) 365 { 366 const bool enable = (p_barrier_enable->read() != 0xFFFFFFFF); 367 m_cmd_crossbar->setBarrier(enable); 368 m_rsp_crossbar->setBarrier(enable); 369 } 329 370 m_cmd_crossbar->transition( m_ports_to_initiator, m_ports_to_target ); 330 371 m_rsp_crossbar->transition( m_ports_to_target, m_ports_to_initiator ); … … 344 385 const size_t nb_attached_initiators, 345 386 const size_t nb_attached_targets, 346 const size_t default_target_id ) 387 const size_t default_target_id, 388 const bool hardware_barrier ) 347 389 : BaseModule(name), 348 390 p_clk("clk"), … … 409 451 m_ports_to_target[i] = &p_to_target[i]; 410 452 m_ports_to_target[nb_attached_targets] = &p_initiator_to_up; 453 454 if (hardware_barrier) 455 p_barrier_enable = new sc_in<uint32_t>("p_barrier_enable"); 456 else 457 p_barrier_enable = NULL; 411 458 } 412 459 -
branches/reconfiguration/platforms/tsar_generic_iob/Makefile
r986 r1001 3 3 SOCLIB_CC_ARGS := $(SOCLIB_CC_MODE) 4 4 SOCLIB_CC_ARGS += -v 5 #SOCLIB_CC_ARGS += -t envsystemc 5 6 #SOCLIB_CC_ARGS += -bcaba:reconf:vci_xicu 6 7 #SOCLIB_CC_ARGS += -bcaba:vci_iopic -
branches/reconfiguration/platforms/tsar_generic_iob/top.cpp
r1000 r1001 852 852 sc_signal<bool> signal_resetn("resetn"); 853 853 854 sc_signal<bool> signal_irq_false; 854 sc_signal<bool> signal_false; 855 855 856 sc_signal<bool> signal_irq_bdev; 856 857 sc_signal<bool> signal_irq_mtty_rx[NB_TTY_CHANNELS]; … … 873 874 VciSignals<vci_param_ext> signal_vci_tgt_bdev("signal_vci_tgt_bdev"); 874 875 VciSignals<vci_param_ext> signal_vci_tgt_cdma("signal_vci_tgt_cdma"); 875 VciSignals<vci_param_ext> signal_vci_tgt_iopi("signal_vci_ ini_iopi");876 VciSignals<vci_param_ext> signal_vci_tgt_simh("signal_vci_ ini_simh");877 VciSignals<vci_param_ext> signal_vci_tgt_rom("signal_vci_ ini_rom");876 VciSignals<vci_param_ext> signal_vci_tgt_iopi("signal_vci_tgt_iopi"); 877 VciSignals<vci_param_ext> signal_vci_tgt_simh("signal_vci_tgt_simh"); 878 VciSignals<vci_param_ext> signal_vci_tgt_rom("signal_vci_tgt_rom"); 878 879 879 880 // Horizontal inter-clusters INT network DSPIN … … 1226 1227 std::cout << std::endl; 1227 1228 1228 // clusters[0][0]->xicu->set_faulty_wti(3, 0);1229 //clusters[0][0]->xicu->set_faulty_wti(4, 0); 1229 1230 1230 1231 /////////////////////////////////////////////////////////////////////////////// … … 1323 1324 { 1324 1325 if (i < NB_NIC_CHANNELS) iopi->p_hwi[i] (signal_irq_mnic_rx[i]); 1325 else if(i < 2 ) iopi->p_hwi[i] (signal_ irq_false);1326 else if(i < 2 ) iopi->p_hwi[i] (signal_false); 1326 1327 else if(i < 2+NB_NIC_CHANNELS) iopi->p_hwi[i] (signal_irq_mnic_tx[i-2]); 1327 else if(i < 4 ) iopi->p_hwi[i] (signal_ irq_false);1328 else if(i < 4 ) iopi->p_hwi[i] (signal_false); 1328 1329 else if(i < 4+NB_CMA_CHANNELS) iopi->p_hwi[i] (signal_irq_cdma[i-4]); 1329 else if(i < 8) iopi->p_hwi[i] (signal_ irq_false);1330 else if(i < 8) iopi->p_hwi[i] (signal_false); 1330 1331 else if(i < 9) iopi->p_hwi[i] (signal_irq_bdev); 1331 else if(i < 16) iopi->p_hwi[i] (signal_ irq_false);1332 else if(i < 16) iopi->p_hwi[i] (signal_false); 1332 1333 else if(i < 16+NB_TTY_CHANNELS) iopi->p_hwi[i] (signal_irq_mtty_rx[i-16]); 1333 else iopi->p_hwi[i] (signal_ irq_false);1334 else iopi->p_hwi[i] (signal_false); 1334 1335 } 1335 1336 … … 1365 1366 clusters[x][y]->p_clk (signal_clk); 1366 1367 clusters[x][y]->p_resetn (signal_resetn); 1368 clusters[x][y]->p_false (signal_false); 1367 1369 } 1368 1370 } … … 1513 1515 1514 1516 signal_resetn = false; 1515 signal_ irq_false= false;1517 signal_false = false; 1516 1518 1517 1519 // network boundaries signals … … 1624 1626 std::cout << "### IRQ_PROC_" << std::dec 1625 1627 << x << "_" << y << "_" << l << " ACTIVE" << std::endl; 1628 1629 c->int_xbar_d->print_trace(); 1626 1630 } 1627 1631 -
branches/reconfiguration/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h
r963 r1001 53 53 sc_in<bool> p_resetn; 54 54 55 sc_in<bool> p_false; 56 55 57 // Thes two ports are used to connect IOB to IOX nework in top cell 56 58 soclib::caba::VciInitiator<vci_param_ext>* p_vci_iob_iox_ini; … … 69 71 70 72 // interrupt signals 71 sc_signal<bool> signal_false;72 73 sc_signal<bool> signal_proc_it[16]; 73 74 sc_signal<bool> signal_irq_mdma[8]; … … 75 76 sc_signal<uint32_t> signal_cfg_router_cmd[3]; 76 77 sc_signal<uint32_t> signal_cfg_router_rsp[2]; 78 sc_signal<uint32_t> signal_cfg_xbar_barrier; 77 79 78 80 // INT network DSPIN signals between DSPIN routers and DSPIN local_crossbars -
branches/reconfiguration/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
r1000 r1001 93 93 soclib::caba::BaseModule(insname), 94 94 p_clk("clk"), 95 p_resetn("resetn") 95 p_resetn("resetn"), 96 p_false("false") 96 97 { 97 98 … … 201 202 xcu_nb_wti, // number of soft IRQs 202 203 xcu_nb_out, // number of output IRQs 203 5); // number of config regs204 6); // number of config regs 204 205 205 206 //////////// MDMA … … 236 237 nb_direct_initiators, // number of local initiators 237 238 nb_direct_targets, // number of local targets 238 0 ); // default target 239 0, // default target 240 true ); // hardware barrier 239 241 240 242 std::ostringstream s_int_dspin_ini_wrapper_gate_d; … … 269 271 true, // pseudo CMD 270 272 false, // no routing table 271 true ); // broacast 273 true, // broacast 274 true ); // hardware barrier 272 275 273 276 std::ostringstream s_int_xbar_p2m_c; … … 283 286 false, // pseudo RSP 284 287 false, // no routing table 285 false ); // no broacast 288 false, // no broacast 289 true ); // hardware barrier 286 290 287 291 std::ostringstream s_int_xbar_clack_c; … … 297 301 true, // CMD 298 302 false, // no routing table 299 false); // broadcast 303 false, // broadcast 304 true ); // hardware barrier 300 305 301 306 const bool ROUTER_CONFIG_SUPPORTED = true; … … 470 475 int_router_rsp[1]->p_in[4] (signal_int_dspin_p2m_l2g_c); 471 476 472 ///////////////////// CMD DSPIN local crossbar direct477 ///////////////////// CMD & RSP local crossbar 473 478 int_xbar_d->p_clk (this->p_clk); 474 479 int_xbar_d->p_resetn (this->p_resetn); 480 (*int_xbar_d->p_barrier_enable) (signal_cfg_xbar_barrier); 475 481 int_xbar_d->p_initiator_to_up (signal_int_vci_l2g); 476 482 int_xbar_d->p_target_to_up (signal_int_vci_g2l); … … 505 511 int_xbar_m2p_c->p_clk (this->p_clk); 506 512 int_xbar_m2p_c->p_resetn (this->p_resetn); 513 (*int_xbar_m2p_c->p_barrier_enable) (signal_cfg_xbar_barrier); 507 514 int_xbar_m2p_c->p_global_out (signal_int_dspin_m2p_l2g_c); 508 515 int_xbar_m2p_c->p_global_in (signal_int_dspin_m2p_g2l_c); … … 514 521 int_xbar_p2m_c->p_clk (this->p_clk); 515 522 int_xbar_p2m_c->p_resetn (this->p_resetn); 523 (*int_xbar_p2m_c->p_barrier_enable) (signal_cfg_xbar_barrier); 516 524 int_xbar_p2m_c->p_global_out (signal_int_dspin_p2m_l2g_c); 517 525 int_xbar_p2m_c->p_global_in (signal_int_dspin_p2m_g2l_c); … … 523 531 int_xbar_clack_c->p_clk (this->p_clk); 524 532 int_xbar_clack_c->p_resetn (this->p_resetn); 533 (*int_xbar_clack_c->p_barrier_enable) (signal_cfg_xbar_barrier); 525 534 int_xbar_clack_c->p_global_out (signal_int_dspin_clack_l2g_c); 526 535 int_xbar_clack_c->p_global_in (signal_int_dspin_clack_g2l_c); … … 547 556 else 548 557 { 549 proc[p]->p_irq[j] ( signal_false);558 proc[p]->p_irq[j] (this->p_false); 550 559 } 551 560 } … … 564 573 if ( i == 0 ) xicu->p_hwi[i] (signal_irq_memc); 565 574 else if ( i <= nb_dmas ) xicu->p_hwi[i] (signal_irq_mdma[i-1]); 566 else xicu->p_hwi[i] ( signal_false);575 else xicu->p_hwi[i] (this->p_false); 567 576 } 568 577 xicu->p_cfg[0] (signal_cfg_router_cmd[0]); // CMD … … 571 580 xicu->p_cfg[3] (signal_cfg_router_rsp[1]); // P2M 572 581 xicu->p_cfg[4] (signal_cfg_router_cmd[2]); // CLACK 582 xicu->p_cfg[5] (signal_cfg_xbar_barrier); // CLACK 573 583 574 584 ///////////////////////////////////// MEMC
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