Changeset 1011 for branches/reconfiguration/modules/vci_mem_cache
- Timestamp:
- Aug 15, 2015, 9:02:55 PM (9 years ago)
- Location:
- branches/reconfiguration/modules/vci_mem_cache
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/reconfiguration/modules/vci_mem_cache/caba/source/include/mem_cache_directory.h
r861 r1011 305 305 const DirectoryEntry &entry) 306 306 { 307 assert((set < m_sets) && "Cache Directory write : The set index is invalid"); 308 assert((way < m_ways) && "Cache Directory write : The way index is invalid"); 309 310 // update Directory 311 m_dir_tab[set][way].copy(entry); 307 write_neutral(set, way, entry); 312 308 313 309 // update LRU bits … … 326 322 } 327 323 } // end write() 324 325 ///////////////////////////////////////////////////////////////////// 326 // The write_neutral function writes a new entry, 327 // without changing the LRU. 328 // Arguments : 329 // - set : the set of the entry 330 // - way : the way of the entry 331 // - entry : the entry value 332 ///////////////////////////////////////////////////////////////////// 333 void write_neutral(const size_t &set, 334 const size_t &way, 335 const DirectoryEntry &entry) 336 { 337 assert((set < m_sets) && "Cache Directory write : The set index is invalid"); 338 assert((way < m_ways) && "Cache Directory write : The way index is invalid"); 339 340 // update Directory 341 m_dir_tab[set][way].copy(entry); 342 } // end write_neutral() 328 343 329 344 ///////////////////////////////////////////////////////////////////// -
branches/reconfiguration/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
r985 r1011 202 202 READ_TRT_LOCK, 203 203 READ_TRT_SET, 204 READ_TRT_REQ 204 READ_TRT_REQ, 205 READ_IVT_LOCK 205 206 }; 206 207 … … 367 368 ALLOC_IVT_CLEANUP, 368 369 ALLOC_IVT_CAS, 369 ALLOC_IVT_CONFIG 370 ALLOC_IVT_CONFIG, 371 ALLOC_IVT_READ 370 372 }; 371 373 … … 540 542 private: 541 543 544 void scratchpad_reset(); 542 545 void transition(); 543 546 void genMoore(); … … 644 647 ////////////////////////////////////////////////// 645 648 646 sc_signal<int> 649 sc_signal<int> r_tgt_cmd_fsm; 647 650 648 651 /////////////////////////////////////////////////////// … … 668 671 sc_signal<size_t> r_config_trt_index; // selected entry in TRT 669 672 sc_signal<size_t> r_config_ivt_index; // selected entry in IVT 673 sc_signal<bool> r_config_scratchpad; // enable scratchpad mode 670 674 671 675 // Buffer between CONFIG fsm and IXR_CMD fsm … … 820 824 sc_signal<size_t> r_cleanup_next_ptr; // next pointer to the heap 821 825 sc_signal<tag_t> r_cleanup_tag; // cache line tag (in directory) 826 sc_signal<bool> r_cleanup_valid; // valid bit (in directory) 822 827 sc_signal<bool> r_cleanup_is_cnt; // inst bit (in directory) 823 828 sc_signal<bool> r_cleanup_lock; // lock bit (in directory) -
branches/reconfiguration/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r985 r1011 172 172 "READ_TRT_LOCK", 173 173 "READ_TRT_SET", 174 "READ_TRT_REQ" 174 "READ_TRT_REQ", 175 "READ_IVT_LOCK", 175 176 }; 176 177 const char *write_fsm_str[] = … … 317 318 "ALLOC_IVT_CLEANUP", 318 319 "ALLOC_IVT_CAS", 319 "ALLOC_IVT_CONFIG" 320 "ALLOC_IVT_CONFIG", 321 "ALLOC_IVT_READ", 320 322 }; 321 323 const char *alloc_heap_fsm_str[] = … … 1017 1019 1018 1020 ////////////////////////////////// 1021 tmpl(void)::scratchpad_reset() 1022 ////////////////////////////////// 1023 { 1024 const uint32_t xy = (m_x_self << m_y_width) | m_y_self; 1025 const uint32_t offset = m_z.getUse() - m_x_width - m_y_width; 1026 for (size_t set = 0; set < m_sets; ++set) { 1027 for (size_t way = 0; way < m_ways; ++way) { 1028 DirectoryEntry entry; 1029 entry.valid = true; 1030 entry.tag = (xy << offset) | way; 1031 m_cache_directory.write(set, way, entry); 1032 } 1033 } 1034 } 1035 1036 ////////////////////////////////// 1019 1037 tmpl(void)::transition() 1020 1038 ////////////////////////////////// … … 1080 1098 m_cmd_cas_eop_fifo.init() ; 1081 1099 1082 r_config_cmd = MEMC_CMD_NOP; 1100 r_config_cmd = MEMC_CMD_NOP; 1101 r_config_scratchpad = true; 1083 1102 1084 1103 m_config_to_cc_send_inst_fifo.init(); … … 1516 1535 r_config_trdid = p_vci_tgt.trdid.read(); 1517 1536 r_config_pktid = p_vci_tgt.pktid.read(); 1537 } 1538 else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE) 1539 and (regr == MEMC_SCRATCHPAD)) // enable/disable 1540 // scratchpad mode 1541 { 1542 need_rsp = true; 1543 error = 0; 1544 r_config_scratchpad = wdata > 0 ? true : false; 1545 1546 // prepare delayed response from CONFIG FSM 1547 r_config_srcid = p_vci_tgt.srcid.read(); 1548 r_config_trdid = p_vci_tgt.trdid.read(); 1549 r_config_pktid = p_vci_tgt.pktid.read(); 1550 1551 #if DEBUG_MEMC_TGT_CMD 1552 if (m_debug) 1553 { 1554 std::cout << " <MEMC " << name() << " TGT_CMD_CONFIG> "; 1555 if (wdata) std::cout << "ENABLE the memory cache scratchpad mode"; 1556 else std::cout << "DISABLE the memory cache scratchpad mode"; 1557 std::cout << std::endl; 1558 } 1559 #endif 1518 1560 } 1519 1561 else … … 2056 2098 // - Write MEMC_BUF_LENGTH : set buffer length (bytes) 2057 2099 // - Write MEMC_CMD_TYPE : launch the actual operation 2100 // - Write MEMC_SCRATCHPAD : enable/disable the scratchpad mode 2058 2101 //////////////////////////////////////////////////////////////////////////////////// 2059 2102 … … 2687 2730 if (entry.valid) // hit 2688 2731 { 2732 // check the IVT for pending invalidation when scratchpad mode and 2733 // line in counter mode. 2734 if (r_config_scratchpad.read() and entry.is_cnt) 2735 { 2736 r_read_fsm = READ_IVT_LOCK; 2737 } 2689 2738 // test if we need to register a new copy in the heap 2690 if (entry.is_cnt or (entry.count == 0) or !cached_read)2739 else if (entry.is_cnt or (entry.count == 0) or !cached_read) 2691 2740 { 2692 2741 r_read_fsm = READ_DIR_HIT; … … 2699 2748 else // miss 2700 2749 { 2750 // miss in scratchpad mode: this shouldn't happen. Drop the request 2751 // (black-hole behavior). 2752 if (r_config_scratchpad.read()) 2753 { 2754 #if DEBUG_MEMC_READ 2755 if (m_debug) 2756 { 2757 std::cout << " WARNING: <MEMC " << name() 2758 << " READ_DIR_LOCK> READ MISS in scratchpad mode: " 2759 << " address = " << std::hex << m_cmd_read_addr_fifo.read() 2760 << std::dec << std::endl; 2761 } 2762 #endif 2763 2764 cmd_read_fifo_get = true; 2765 r_read_fsm = READ_IDLE; 2766 break; 2767 } 2768 2701 2769 r_read_fsm = READ_TRT_LOCK; 2702 2770 } … … 3119 3187 #endif 3120 3188 } 3189 break; 3190 } 3191 /////////////////// 3192 case READ_IVT_LOCK: 3193 { 3194 if (r_alloc_ivt_fsm.read() != ALLOC_IVT_READ) break; 3195 3196 assert((r_alloc_dir_fsm.read() == ALLOC_DIR_READ) and 3197 "MEMC ERROR in READ_IVT_LOCK state: Bad DIR allocation"); 3198 3199 size_t index = 0; 3200 size_t nline = m_nline[m_cmd_read_addr_fifo.read()]; 3201 if (m_ivt.search_inval(nline, index)) 3202 { 3203 // There is a pending invalidation on the requested address. 3204 // Return to IDLE to release all locks and retry. 3205 r_read_fsm = READ_IDLE; 3206 3207 #if DEBUG_MEMC_READ 3208 if (m_debug) 3209 { 3210 std::cout << " <MEMC " << name() << " READ_IVT_LOCK>" 3211 << " Got acces to IVT, and there is a pending invalidation" 3212 << " / address = " << std::hex << m_cmd_read_addr_fifo.read() 3213 << " / index = " << std::dec << index << std::endl; 3214 } 3215 #endif 3216 break; 3217 } 3218 3219 // no pending inval 3220 r_read_fsm = READ_DIR_HIT; 3121 3221 break; 3122 3222 } … … 3326 3426 r_write_way = way; 3327 3427 3328 if (entry.is_cnt and entry.count) r_write_fsm = WRITE_BC_DIR_READ; 3329 else r_write_fsm = WRITE_DIR_HIT; 3428 // in scratchpad mode, when a line is in counter mode, a broadcast is 3429 // triggered but the line is kept in the directory. 3430 if (entry.is_cnt and (entry.count > 0)) 3431 { 3432 if (r_config_scratchpad.read()) 3433 { 3434 r_write_fsm = WRITE_BC_IVT_LOCK; 3435 3436 #if DEBUG_MEMC_WRITE 3437 if (m_debug) 3438 { 3439 std::cout << " <MEMC " << name() 3440 << " WRITE_DIR_LOCK> BROADCAST in scratchpad mode: " 3441 << " address = " << std::hex << r_write_address.read() 3442 << std::dec << std::endl; 3443 } 3444 #endif 3445 } 3446 else 3447 { 3448 r_write_fsm = WRITE_BC_DIR_READ; 3449 } 3450 } 3451 else 3452 { 3453 r_write_fsm = WRITE_DIR_HIT; 3454 } 3330 3455 } 3331 3456 else // miss 3332 3457 { 3458 // miss in scratchpad mode: this shouldn't happen. Drop the request 3459 // (black-hole behavior). 3460 if (r_config_scratchpad.read()) 3461 { 3462 #if DEBUG_MEMC_WRITE 3463 if (m_debug) 3464 { 3465 std::cout << " WARNING: <MEMC " << name() 3466 << " WRITE_DIR_LOCK> WRITE MISS in scratchpad mode: " 3467 << " address = " << std::hex << r_write_address.read() 3468 << std::dec << std::endl; 3469 } 3470 #endif 3471 3472 r_write_fsm = WRITE_IDLE; 3473 break; 3474 } 3475 3333 3476 r_write_fsm = WRITE_MISS_TRT_LOCK; 3334 3477 } … … 4025 4168 "MEMC ERROR in WRITE_BC_IVT_LOCK state: Bad DIR allocation"); 4026 4169 4027 assert((r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE) and 4170 assert((r_config_scratchpad.read() or 4171 (r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE)) and 4028 4172 "MEMC ERROR in WRITE_BC_IVT_LOCK state: Bad TRT allocation"); 4029 4173 … … 4069 4213 "MEMC ERROR in WRITE_BC_DIR_INVAL state: Bad DIR allocation"); 4070 4214 4071 assert((r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE) and 4215 assert((r_config_scratchpad.read() or 4216 (r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE)) and 4072 4217 "MEMC ERROR in WRITE_BC_DIR_INVAL state: Bad TRT allocation"); 4073 4218 … … 4075 4220 "MEMC ERROR in WRITE_BC_DIR_INVAL state: Bad IVT allocation"); 4076 4221 4077 // register PUT request in TRT 4078 std::vector<data_t> data_vector; 4079 data_vector.clear(); 4080 for (size_t i = 0; i < m_words; i++) 4081 { 4082 data_vector.push_back(r_write_data[i].read()); 4083 } 4084 m_trt.set(r_write_trt_index.read(), 4085 false, // PUT request 4086 m_nline[(addr_t) (r_write_address.read())], 4087 0, // unused 4088 0, // unused 4089 0, // unused 4090 false, // not a processor read 4091 0, // unused 4092 0, // unused 4093 std::vector<be_t> (m_words, 0), 4094 data_vector); 4095 4096 // invalidate directory entry 4222 size_t set = m_y[(addr_t) (r_write_address.read())]; 4223 size_t way = r_write_way.read(); 4097 4224 DirectoryEntry entry; 4098 entry.valid = false; 4099 entry.dirty = false; 4100 entry.tag = 0; 4101 entry.is_cnt = false; 4102 entry.lock = false; 4103 entry.owner.srcid = 0; 4104 entry.owner.inst = false; 4105 entry.ptr = 0; 4106 entry.count = 0; 4107 size_t set = m_y[(addr_t) (r_write_address.read())]; 4108 size_t way = r_write_way.read(); 4225 if (not r_config_scratchpad.read()) 4226 { 4227 // register PUT request in TRT 4228 std::vector<data_t> data_vector; 4229 data_vector.clear(); 4230 for (size_t i = 0; i < m_words; i++) 4231 { 4232 data_vector.push_back(r_write_data[i].read()); 4233 } 4234 m_trt.set(r_write_trt_index.read(), 4235 false, // PUT request 4236 m_nline[(addr_t) (r_write_address.read())], 4237 0, // unused 4238 0, // unused 4239 0, // unused 4240 false, // not a processor read 4241 0, // unused 4242 0, // unused 4243 std::vector<be_t> (m_words, 0), 4244 data_vector); 4245 4246 // invalidate directory entry 4247 entry.valid = false; 4248 entry.dirty = false; 4249 entry.tag = 0; 4250 entry.is_cnt = false; 4251 entry.lock = false; 4252 entry.owner.srcid = 0; 4253 entry.owner.inst = false; 4254 entry.ptr = 0; 4255 entry.count = 0; 4256 4257 #if DEBUG_MEMC_WRITE 4258 if (m_debug) 4259 { 4260 std::cout << " <MEMC " << name() 4261 << " WRITE_BC_DIR_INVAL> Inval DIR and register in TRT:" 4262 << " address = " << std::hex << r_write_address.read() 4263 << std::dec << std::endl; 4264 } 4265 #endif 4266 4267 } 4268 else 4269 { 4270 // update the data when in scratchpad mode 4271 for (size_t word = 0; word < m_words; word++) 4272 { 4273 m_cache_data.write(way, 4274 set, 4275 word, 4276 r_write_data[word].read(), 4277 r_write_be[word].read()); 4278 } 4279 4280 // keep the directory entry, but reset the number of copies 4281 entry.valid = true; 4282 entry.dirty = true; 4283 entry.tag = r_write_tag.read(); 4284 entry.is_cnt = r_write_is_cnt.read(); 4285 entry.lock = r_write_lock.read(); 4286 entry.owner.srcid = 0; 4287 entry.owner.inst = false; 4288 entry.ptr = 0; 4289 entry.count = 0; 4290 } 4109 4291 4110 4292 m_cache_directory.write(set, way, entry); … … 4115 4297 } 4116 4298 4117 #if DEBUG_MEMC_WRITE4118 if (m_debug)4119 {4120 std::cout << " <MEMC " << name() << " WRITE_BC_DIR_INVAL> Inval DIR and register in TRT:"4121 << " address = " << std::hex << r_write_address.read() << std::endl;4122 }4123 #endif4124 4299 r_write_fsm = WRITE_BC_CC_SEND; 4125 4300 break; … … 4143 4318 r_write_to_cc_send_data[i] = 0; 4144 4319 } 4145 r_write_fsm = WRITE_BC_XRAM_REQ; 4320 4321 if (r_config_scratchpad.read()) 4322 { 4323 r_write_fsm = WRITE_IDLE; 4324 } 4325 else 4326 { 4327 r_write_fsm = WRITE_BC_XRAM_REQ; 4328 } 4146 4329 4147 4330 #if DEBUG_MEMC_WRITE … … 5406 5589 addr_t cleanup_address = r_cleanup_nline.read() * m_words * 4; 5407 5590 DirectoryEntry entry = m_cache_directory.read(cleanup_address , way); 5591 r_cleanup_valid = entry.valid; 5408 5592 r_cleanup_is_cnt = entry.is_cnt; 5409 5593 r_cleanup_dirty = entry.dirty; … … 5418 5602 if (entry.valid) // hit : the copy must be cleared 5419 5603 { 5420 assert(( entry.count > 0) and5604 assert((r_config_scratchpad.read() or (entry.count > 0)) and 5421 5605 "MEMC ERROR in CLEANUP_DIR_LOCK state, CLEANUP on valid entry with no copies"); 5422 5606 5423 if ((entry.count == 1) or (entry.is_cnt)) // no access to the heap 5607 // when in scratchpad mode, if a line is in counter mode, check first 5608 // if there is a pending inval 5609 if (r_config_scratchpad.read() and entry.is_cnt) 5610 { 5611 r_cleanup_fsm = CLEANUP_IVT_LOCK; 5612 } 5613 else if ((entry.count == 1) or (entry.is_cnt)) // no access to the heap 5424 5614 { 5425 5615 r_cleanup_fsm = CLEANUP_DIR_WRITE; … … 5753 5943 if (not match_inval) // no pending inval in IVT 5754 5944 { 5945 if (r_config_scratchpad.read() and r_cleanup_valid.read()) 5946 { 5947 #if DEBUG_MEMC_CLEANUP 5948 if (m_debug) 5949 { 5950 std::cout << " <MEMC " << name() << " CLEANUP_IVT_LOCK>" 5951 << " Cleanup in scratchpad mode with no corresponding IVT entry" 5952 << " but valid in directory" 5953 << " / address = " << std::hex << (r_cleanup_nline.read() * 4 * m_words) 5954 << std::dec << std::endl; 5955 } 5956 #endif 5957 5958 r_cleanup_fsm = CLEANUP_DIR_WRITE; 5959 break; 5960 } 5961 5755 5962 r_cleanup_fsm = CLEANUP_SEND_CLACK; 5756 5963 … … 8046 8253 // The ALLOC_IVT FSM allocates the access to the Invalidate Table (IVT), 8047 8254 // with a round robin priority between five FSMs, with the following order: 8048 // WRITE -> XRAM_RSP -> CLEANUP -> CAS -> CONFIG 8255 // WRITE -> XRAM_RSP -> CLEANUP -> CAS -> CONFIG -> READ 8049 8256 // - The WRITE FSM initiates broadcast invalidate transactions and sets a new entry 8050 8257 // in IVT. … … 8054 8261 // - The CONFIG FSM does the same thing as the XRAM_RSP FSM 8055 8262 // - The CLEANUP FSM complete those trasactions and erase the IVT entry. 8263 // - The READ FSM checks for pending invalidations when in scratchpad mode. 8056 8264 // The resource is always allocated. 8057 8265 ///////////////////////////////////////////////////////////////////////////////////// … … 8076 8284 else if (r_config_fsm.read() == CONFIG_IVT_LOCK) 8077 8285 r_alloc_ivt_fsm = ALLOC_IVT_CONFIG; 8286 8287 else if (r_read_fsm.read() == READ_IVT_LOCK) 8288 r_alloc_ivt_fsm = ALLOC_IVT_READ; 8289 8078 8290 } 8079 8291 break; … … 8091 8303 else if (r_config_fsm.read() == CONFIG_IVT_LOCK) 8092 8304 r_alloc_ivt_fsm = ALLOC_IVT_CONFIG; 8305 8306 else if (r_read_fsm.read() == READ_IVT_LOCK) 8307 r_alloc_ivt_fsm = ALLOC_IVT_READ; 8093 8308 8094 8309 else if (r_write_fsm.read() == WRITE_BC_IVT_LOCK) … … 8108 8323 r_alloc_ivt_fsm = ALLOC_IVT_CONFIG; 8109 8324 8325 else if (r_read_fsm.read() == READ_IVT_LOCK) 8326 r_alloc_ivt_fsm = ALLOC_IVT_READ; 8327 8110 8328 else if (r_write_fsm.read() == WRITE_BC_IVT_LOCK) 8111 8329 r_alloc_ivt_fsm = ALLOC_IVT_WRITE; … … 8123 8341 r_alloc_ivt_fsm = ALLOC_IVT_CONFIG; 8124 8342 8343 else if (r_read_fsm.read() == READ_IVT_LOCK) 8344 r_alloc_ivt_fsm = ALLOC_IVT_READ; 8345 8125 8346 else if (r_write_fsm.read() == WRITE_BC_IVT_LOCK) 8126 8347 r_alloc_ivt_fsm = ALLOC_IVT_WRITE; … … 8138 8359 if (r_config_fsm.read() != CONFIG_IVT_LOCK) 8139 8360 { 8361 if (r_read_fsm.read() == READ_IVT_LOCK) 8362 r_alloc_ivt_fsm = ALLOC_IVT_READ; 8363 8364 else if (r_write_fsm.read() == WRITE_BC_IVT_LOCK) 8365 r_alloc_ivt_fsm = ALLOC_IVT_WRITE; 8366 8367 else if (r_xram_rsp_fsm.read() == XRAM_RSP_IVT_LOCK) 8368 r_alloc_ivt_fsm = ALLOC_IVT_XRAM_RSP; 8369 8370 else if (r_cleanup_fsm.read() == CLEANUP_IVT_LOCK) 8371 r_alloc_ivt_fsm = ALLOC_IVT_CLEANUP; 8372 8373 else if (r_cas_fsm.read() == CAS_BC_IVT_LOCK) 8374 r_alloc_ivt_fsm = ALLOC_IVT_CAS; 8375 } 8376 break; 8377 8378 case ALLOC_IVT_READ: // allocated to READ FSM 8379 if (r_read_fsm.read() != READ_IVT_LOCK) 8380 { 8140 8381 if (r_write_fsm.read() == WRITE_BC_IVT_LOCK) 8141 8382 r_alloc_ivt_fsm = ALLOC_IVT_WRITE; … … 8149 8390 else if (r_cas_fsm.read() == CAS_BC_IVT_LOCK) 8150 8391 r_alloc_ivt_fsm = ALLOC_IVT_CAS; 8392 8393 else if (r_config_fsm.read() == CONFIG_IVT_LOCK) 8394 r_alloc_ivt_fsm = ALLOC_IVT_CONFIG; 8151 8395 } 8152 8396 break; … … 8175 8419 if (r_alloc_dir_reset_cpt.read() == (m_sets - 1)) 8176 8420 { 8177 m_cache_directory.init();8421 scratchpad_reset(); 8178 8422 r_alloc_dir_fsm = ALLOC_DIR_READ; 8179 8423 } … … 8209 8453 if (((r_read_fsm.read() != READ_DIR_REQ) and 8210 8454 (r_read_fsm.read() != READ_DIR_LOCK) and 8455 (r_read_fsm.read() != READ_IVT_LOCK) and 8211 8456 (r_read_fsm.read() != READ_TRT_LOCK) and 8212 8457 (r_read_fsm.read() != READ_HEAP_REQ)) 8213 8458 or 8214 8459 ((r_read_fsm.read() == READ_TRT_LOCK) and 8215 (r_alloc_trt_fsm.read() == ALLOC_TRT_READ)))8460 (r_alloc_trt_fsm.read() == ALLOC_TRT_READ))) 8216 8461 { 8217 8462 if (r_write_fsm.read() == WRITE_DIR_REQ) … … 8305 8550 /////////////////////// 8306 8551 case ALLOC_DIR_CLEANUP: // allocated to CLEANUP FSM 8307 if (( r_cleanup_fsm.read() != CLEANUP_DIR_REQ) and8552 if (((r_cleanup_fsm.read() != CLEANUP_DIR_REQ) and 8308 8553 (r_cleanup_fsm.read() != CLEANUP_DIR_LOCK) and 8554 (r_cleanup_fsm.read() != CLEANUP_IVT_LOCK) and 8309 8555 (r_cleanup_fsm.read() != CLEANUP_HEAP_REQ) and 8310 8556 (r_cleanup_fsm.read() != CLEANUP_HEAP_LOCK)) 8557 or 8558 ((r_cleanup_fsm.read() == CLEANUP_IVT_LOCK) and 8559 (not r_config_scratchpad.read()))) 8311 8560 { 8312 8561 if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) -
branches/reconfiguration/modules/vci_mem_cache/include/soclib/mem_cache.h
r925 r1011 42 42 MEMC_ADDR_HI, 43 43 MEMC_BUF_LENGTH, 44 MEMC_CMD_TYPE 44 MEMC_CMD_TYPE, 45 MEMC_SCRATCHPAD 45 46 }; 46 47
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