Ignore:
Timestamp:
Sep 14, 2015, 9:42:16 AM (9 years ago)
Author:
cfuguet
Message:

reconf: dspin_router

  • improve the code readability of the dspin_router model.
  • update the unitary tests of the dspin_router to support the local gateway hardware barrier, and the memory cache scratchpad mode.
Location:
branches/reconfiguration/modules/dspin_router/caba/test
Files:
11 edited

Legend:

Unmodified
Added
Removed

  • branches/reconfiguration/modules/dspin_router/caba/test/recovery_bcast_evaluation/dspin_broadcast_generator/caba/source/src/dspin_broadcast_generator.cpp

    r1009 r1016  
    11/* -*- c++ -*-
    22 * SOCLIB_LGPL_HEADER_BEGIN
    3  * 
     3 *
    44 * This file is part of SoCLib, GNU LGPLv2.1.
    5  * 
     5 *
    66 * SoCLib is free software; you can redistribute it and/or modify it
    77 * under the terms of the GNU Lesser General Public License as published
    88 * by the Free Software Foundation; version 2.1 of the License.
    9  * 
     9 *
    1010 * SoCLib is distributed in the hope that it will be useful, but
    1111 * WITHOUT ANY WARRANTY; without even the implied warranty of
    1212 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    1313 * Lesser General Public License for more details.
    14  * 
     14 *
    1515 * You should have received a copy of the GNU Lesser General Public
    1616 * License along with SoCLib; if not, write to the Free Software
    1717 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    1818 * 02110-1301 USA
    19  * 
     19 *
    2020 * SOCLIB_LGPL_HEADER_END
    2121 *
    22  * Authors  : alain.greiner@lip6.fr 
     22 * Authors  : alain.greiner@lip6.fr
    2323 * Date     : july 2010
    2424 * Copyright: UPMC - LIP6
    … …  
    4444                                     const size_t   x_size,
    4545                                     const size_t   y_size,
    46                                      const size_t   srcid,      // srcid for random 
     46                                     const size_t   srcid,      // srcid for random
    4747                                     const size_t   load,       // requested load * 1000
    4848                                     const size_t   fifo_depth) // Fifo depth
    4949           : BaseModule(name),
    50            
     50
    5151           p_clk( "clk" ),
    5252           p_resetn( "resetn" ),
    … …  
    5858
    5959           r_send_fsm( "r_send_fsm" ),
    60            r_send_length( "r_send_length" ), 
     60           r_send_length( "r_send_length" ),
    6161           r_send_dest( "r_send_dest" ),
    6262           r_send_date( "r_send_date" ),
    … …  
    6969
    7070           r_max_fill_status( "r_max_fill_status" ),
    71            
     71
    7272           r_date_fifo( "r_date_fifo", fifo_depth ),
    7373
    … …  
    127127
    128128    /////////////////////////// CMD FSM
    129     switch( r_send_fsm.read() ) 
     129    switch( r_send_fsm.read() )
    130130    {
    131131        case SEND_IDLE:
    … …  
    141141        break;
    142142        case SEND_BROADCAST:
    143             if( p_out.read.read() ) 
     143            if( p_out.read.read() )
    144144            {
    145145                r_send_length = r_send_length.read() - 1;
    … …  
    164164            if (latency > r_receive_bc_max_latency.read())
    165165                r_receive_bc_max_latency = latency;
    166            
     166
    167167            r_receive_fsm = RECEIVE_IDLE;
    168168        }
    … …  
    178178    if (r_date_fifo.filled_status() > r_max_fill_status.read())
    179179        r_max_fill_status.write(r_date_fifo.filled_status());
    180    
     180
    181181} // end transition
    182182
    … …  
    210210    p_out.eop   = eop;
    211211    p_out.write = write;
    212    
     212
    213213    p_in.read = true;
    214214
    … …  
    221221    const char* rsp_str[] = { "IDLE", "RECEIVE_BROADCAST" };
    222222
    223     std::cout << "DSPIN_GENERATOR " << name() 
    224               << " : send_fsm = " << cmd_str[r_send_fsm.read()] 
    225               << " / recv_fsm = " << rsp_str[r_receive_fsm.read()] 
     223    std::cout << "DSPIN_GENERATOR " << name()
     224              << " : send_fsm = " << cmd_str[r_send_fsm.read()]
     225              << " / recv_fsm = " << rsp_str[r_receive_fsm.read()]
    226226              << " / fifo_content = " << r_date_fifo.filled_status() << std::endl;
    227227} // end print_trace
    … …  
    253253// indent-tabs-mode: nil
    254254// End:
     255
     256// vim: ts=4 : sts=4 : sw=4 : et

  • branches/reconfiguration/modules/dspin_router/caba/test/recovery_bcast_evaluation/soclib.conf

    r1009 r1016  
    11# append compilation flags
    22cflags = config.default.toolchain.cflags
    3 #cflags.extend(['-ggdb'])
     3# cflags.extend(['-ggdb'])
     4# cflags.extend(['-DUNICAST'])
    45config.default.toolchain.set("cflags", cflags)
    5 
    66
    77# append modules' description file paths

  • branches/reconfiguration/modules/dspin_router/caba/test/recovery_bcast_evaluation/synthetic_dspin_network/caba/metadata/synthetic_dspin_network.sd

    r1009 r1016  
    1818           Uses('caba:dspin_broadcast_generator',
    1919                cmd_width=DSPIN_FLIT_WIDTH,
     20                rsp_width=DSPIN_FLIT_WIDTH),
     21           Uses('caba:dspin_packet_generator',
     22                cmd_width=DSPIN_FLIT_WIDTH,
    2023                rsp_width=DSPIN_FLIT_WIDTH)
    2124       ],

  • branches/reconfiguration/modules/dspin_router/caba/test/recovery_bcast_evaluation/synthetic_dspin_network/caba/source/include/synthetic_dspin_network.h

    r1009 r1016  
    22 *
    33 * SOCLIB_LGPL_HEADER_BEGIN
    4  * 
     4 *
    55 * This file is part of SoCLib, GNU LGPLv2.1.
    6  * 
     6 *
    77 * SoCLib is free software; you can redistribute it and/or modify it
    88 * under the terms of the GNU Lesser General Public License as published
    99 * by the Free Software Foundation; version 2.1 of the License.
    10  * 
     10 *
    1111 * SoCLib is distributed in the hope that it will be useful, but
    1212 * WITHOUT ANY WARRANTY; without even the implied warranty of
    1313 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    1414 * Lesser General Public License for more details.
    15  * 
     15 *
    1616 * You should have received a copy of the GNU Lesser General Public
    1717 * License along with SoCLib; if not, write to the Free Software
    1818 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    1919 * 02110-1301 USA
    20  * 
     20 *
    2121 * SOCLIB_LGPL_HEADER_END
    2222 *
    23  * Authors  : Cesar Armando Fuguet Tortolero 
     23 * Authors  : Cesar Armando Fuguet Tortolero
    2424 * Date     : jul 2015
    2525 * Copyright: UPMC - LIP6
    … …  
    3232#include "caba_base_module.h"
    3333#include "dspin_router.h"
     34
     35#if UNICAST
     36#include "dspin_packet_generator.h"
     37#else
    3438#include "dspin_broadcast_generator.h"
     39#endif
    3540
    3641namespace soclib {
    … …  
    4752    static const int DSPIN_GENERATOR_FIFO_DEPTH = 50;
    4853
     54#if UNICAST
     55    typedef DspinPacketGenerator<DSPIN_WIDTH, DSPIN_WIDTH>
     56    DspinNetworkGenerator;
     57#else
    4958    typedef DspinBroadcastGenerator<DSPIN_WIDTH, DSPIN_WIDTH>
    5059    DspinNetworkGenerator;
     60#endif
     61
    5162    typedef DspinRouter<DSPIN_WIDTH>
    5263    DspinNetworkRouter;
    … …  
    5465    DspinNetworkSignal;
    5566
    56      
     67
    5768public:
    5869
    … …  
    7182    void print_stats(const size_t x, const size_t y);
    7283
    73      
     84
    7485private:
    7586
    7687    const size_t m_x_size;
    7788    const size_t m_y_size;
    78      
     89
    7990    DspinNetworkGenerator **dspinGenerator;
    8091    DspinNetworkRouter **dspinRouter;
    … …  
    8394    DspinNetworkSignal ***sH;
    8495    DspinNetworkSignal ***sV;
    85      
     96
    8697    sc_core::sc_signal<uint32_t>** sConfigRouter;
    8798};                  // end class SyntheticDspinNetwork

  • branches/reconfiguration/modules/dspin_router/caba/test/recovery_bcast_evaluation/synthetic_dspin_network/caba/source/src/synthetic_dspin_network.cpp

    r1009 r1016  
    22 *
    33 * SOCLIB_LGPL_HEADER_BEGIN
    4  * 
     4 *
    55 * This file is part of SoCLib, GNU LGPLv2.1.
    6  * 
     6 *
    77 * SoCLib is free software; you can redistribute it and/or modify it
    88 * under the terms of the GNU Lesser General Public License as published
    99 * by the Free Software Foundation; version 2.1 of the License.
    10  * 
     10 *
    1111 * SoCLib is distributed in the hope that it will be useful, but
    1212 * WITHOUT ANY WARRANTY; without even the implied warranty of
    1313 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    1414 * Lesser General Public License for more details.
    15  * 
     15 *
    1616 * You should have received a copy of the GNU Lesser General Public
    1717 * License along with SoCLib; if not, write to the Free Software
    1818 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    1919 * 02110-1301 USA
    20  * 
     20 *
    2121 * SOCLIB_LGPL_HEADER_END
    2222 *
    23  * Authors  : Cesar Armando Fuguet Tortolero 
     23 * Authors  : Cesar Armando Fuguet Tortolero
    2424 * Date     : jul 2015
    2525 * Copyright: UPMC - LIP6
    … …  
    3434namespace caba {
    3535using namespace soclib::common;
    36    
     36
    3737
    3838SyntheticDspinNetwork::SyntheticDspinNetwork(sc_module_name name,
    … …  
    5858            const int SRCID = (x << Y_WIDTH) | y;
    5959            generator_name << "generator[" << x << "][" << y << "]";
     60#if UNICAST
     61            const size_t PACKET_LENGTH = 8;
     62            new(&dspinGenerator[x][y])
     63                DspinNetworkGenerator(generator_name.str().c_str(),
     64                                      (size_t)SRCID,
     65                                      PACKET_LENGTH,
     66                                      load,
     67                                      (size_t)DSPIN_GENERATOR_FIFO_DEPTH,
     68                                      0 );
     69#else
    6070            new(&dspinGenerator[x][y])
    6171                DspinNetworkGenerator(generator_name.str().c_str(),
    … …  
    6575                                      load,
    6676                                      DSPIN_GENERATOR_FIFO_DEPTH);
    67          
    68         }
    69     }
    70      
     77#endif
     78
     79        }
     80    }
     81
    7182    // DSPIN router instantiation
    7283    dspinRouter = (DspinNetworkRouter**)
    … …  
    7485
    7586    for (size_t x = 0; x < m_x_size; ++x) {
    76         dspinRouter[x] = (DspinNetworkRouter*)
     87        dspinRouter[x] = (DspinNetworkRouter*)
    7788            malloc(sizeof(DspinNetworkRouter) * m_y_size);
    7889
    … …  
    102113                                                   m_x_size, m_y_size);
    103114
    104      
     115
    105116    // netlist
    106117    for (size_t x = 0; x < m_x_size; ++x) {
    … …  
    133144    for (size_t x = 0; x < m_x_size; ++x) {
    134145        for (size_t y = 0; y < m_y_size; ++y) {
     146#if UNICAST
     147            dspinGenerator[x][y].~DspinPacketGenerator();
     148#else
    135149            dspinGenerator[x][y].~DspinBroadcastGenerator();
     150#endif
    136151            dspinRouter[x][y].~DspinRouter();
    137152        }
    … …  
    151166
    152167
    153 static inline uint32_t configRouter(int bypass_mode,
    154                                     int reallocation_dir,
     168static inline uint32_t configRouter(int reallocation_dir,
     169                                    int recovery_mode,
    155170                                    int blackhole_pos)
    156171{
    157     return (bypass_mode << 7) | (reallocation_dir << 4) | blackhole_pos;
     172    return ((reallocation_dir & 0x7) << 5) |
     173           ((recovery_mode & 0x1)    << 4) |
     174           (blackhole_pos & 0xF);
    158175}
    159176
    … …  
    164181    for (size_t x = 0; x < m_x_size; ++x) {
    165182        for (size_t y = 0; y < m_y_size; ++y) {
    166             const uint32_t CONFIG_NONE = configRouter(0, REQ_NOP, BH_NONE);
     183            const uint32_t CONFIG_NONE = configRouter(0, 0, NORMAL);
    167184            sConfigRouter[x][y].write(CONFIG_NONE);
    168185        }
    169186    }
    170      
     187
    171188
    172189    // initialize mesh's boundary signals
    … …  
    184201    }
    185202}                   // end reset()
    186    
     203
    187204
    188205void SyntheticDspinNetwork::set_faulty_router(const size_t faulty_x,
    … …  
    199216    // reconfigure the faulty router's contour
    200217    if (faulty_y < (m_y_size - 1)) {
    201         const uint32_t CONFIG_N = configRouter(1, REQ_SOUTH, BH_N);
     218        const uint32_t CONFIG_N = configRouter(REQ_SOUTH, 1, N_OF_X);
    202219        sConfigRouter[faulty_x][faulty_y + 1].write(CONFIG_N);
    203220
    204221        if (faulty_x > 0) {
    205             const uint32_t CONFIG_NW = configRouter(1, REQ_EAST, BH_NW);
     222            const uint32_t CONFIG_NW = configRouter(REQ_EAST, 1, NW_OF_X);
    206223            sConfigRouter[faulty_x - 1][faulty_y + 1].write(CONFIG_NW);
    207224        }
    208225        if (faulty_x < (m_x_size - 1)) {
    209             const uint32_t CONFIG_NE = configRouter(1, REQ_WEST, BH_NE);
     226            const uint32_t CONFIG_NE = configRouter(REQ_WEST, 1, NE_OF_X);
    210227            sConfigRouter[faulty_x + 1][faulty_y + 1].write(CONFIG_NE);
    211228        }
    … …  
    213230
    214231    if (faulty_y > 0) {
    215         const uint32_t CONFIG_S = configRouter(1, REQ_NORTH, BH_S);
     232        const uint32_t CONFIG_S = configRouter(REQ_NORTH, 1, S_OF_X);
    216233        sConfigRouter[faulty_x][faulty_y - 1].write(CONFIG_S);
    217234
    218235        if (faulty_x > 0) {
    219             const uint32_t CONFIG_SW = configRouter(1, REQ_EAST, BH_SW);
     236            const uint32_t CONFIG_SW = configRouter(REQ_EAST, 1, SW_OF_X);
    220237            sConfigRouter[faulty_x - 1][faulty_y - 1].write(CONFIG_SW);
    221238        }
    222239        if (faulty_x < (m_x_size - 1)) {
    223             const uint32_t CONFIG_SE = configRouter(1, REQ_WEST, BH_SE);
     240            const uint32_t CONFIG_SE = configRouter(REQ_WEST, 1, SE_OF_X);
    224241            sConfigRouter[faulty_x + 1][faulty_y - 1].write(CONFIG_SE);
    225242        }
    … …  
    227244
    228245    if (faulty_x > 0) {
    229         const uint32_t CONFIG_W = configRouter(1, REQ_EAST, BH_W);
     246        const uint32_t CONFIG_W = configRouter(REQ_EAST, 1, W_OF_X);
    230247        sConfigRouter[faulty_x - 1][faulty_y].write(CONFIG_W);
    231248    }
    232249
    233250    if (faulty_x < (m_x_size - 1)) {
    234         const uint32_t CONFIG_E = configRouter(1, REQ_WEST, BH_E);
     251        const uint32_t CONFIG_E = configRouter(REQ_WEST, 1, E_OF_X);
    235252        sConfigRouter[faulty_x + 1][faulty_y].write(CONFIG_E);
    236253    }
    … …  
    245262    dspinGenerator[x][y].print_stats();
    246263}
    247    
     264
    248265
    249266}                   // end namespace caba
    … …  
    256273// indent-tabs-mode: nil
    257274// End:
     275
     276// vim: ts=4 : sts=4 : sw=4 : et

  • branches/reconfiguration/modules/dspin_router/caba/test/recovery_bcast_evaluation/top.cpp

    r1009 r1016  
    7373            continue;
    7474        }
    75    
     75
    7676        std::cout << "   Arguments are (key, value) couples." << std::endl;
    7777        std::cout << "   The order is not important." << std::endl;
    7878        std::cout << "   Accepted arguments are :" << std::endl << std::endl;
    79         std::cout << "     -L dspin generators' accepted load * 1000" << std::endl;
     79        std::cout << "     -L generators' accepted load * 1000" << std::endl;
    8080        std::cout << "     -X number of clusters per row" << std::endl;
    8181        std::cout << "     -Y number of clusters per column" << std::endl;
    8282        std::cout << "     -N simulation's cycles" << std::endl;
    8383        std::cout << "     -F deactivate a router" << std::endl;
     84
     85        exit(1);
    8486    }
    8587}                        // end parse_args()
    … …  
    137139        // deactivate a router in the center of the mesh and create its
    138140        // recovery cycle-free contour
    139         syntheticDspinNetwork.set_faulty_router(args.x_size / 2, args.y_size / 2);
     141        syntheticDspinNetwork.set_faulty_router(args.x_size / 2,
     142                                                args.y_size / 2);
    140143    }
    141144
    … …  
    154157    }
    155158
    156  
     159
    157160    return 0;
    158161}                   // end sc_main()
    … …  
    164167// indent-tabs-mode: nil
    165168// End:
     169
     170// vim: ts=4 : sts=4 : sw=4 : et

  • branches/reconfiguration/modules/dspin_router/caba/test/simple_segment_recovery_test/Makefile

    r934 r1016  
    7070
    7171mkconfig $(SIMULATOR) $(CONF): $(PLATFORM)/scripts/onerun.py
    72         ./$< -o $(CONFDIR) -p $(PLATFORM) -x3 -y3 -n1 -c
     72        ./$< -o $(CONFDIR) -p $(PLATFORM) -x3 -y3 -n1 -f -c
    7373
    7474$(BUILD_DIR):

  • branches/reconfiguration/modules/dspin_router/caba/test/simple_segment_recovery_test/main.c

    r947 r1016  
    2525    /* configure the routers around the blackhole (1, 1) to define a cycle-free
    2626     * contour */
    27     const int PATH_RECOVERY = 1;
     27    const int RECOVERY = 1;
    2828    uint32_t val;
    2929
    3030    printf("router(0, 2): configuring as NW\n");
    31     assert(xcu_get_register(0, 2, XICU_CFG_REG, 0) == BH_NONE);
    32     val = (PATH_RECOVERY << 7) | (REQ_SOUTH << 4) | BH_NW;
     31    val = (REQ_SOUTH << 5) | (RECOVERY << 4) | NW_OF_X;
    3332    xcu_set_register(0, 2, XICU_CFG_REG, 0, val);     /* configure NW */
    3433
    3534    printf("router(0, 1): configuring as W\n");
    36     assert(xcu_get_register(0, 1, XICU_CFG_REG, 0) == BH_NONE);
    37     val = (PATH_RECOVERY << 7) | (REQ_LOCAL << 4) | BH_W;
     35    val = (REQ_LOCAL << 5) | (RECOVERY << 4) | W_OF_X;
    3836    xcu_set_register(0, 1, XICU_CFG_REG, 0, val);     /* configure W */
    3937
    4038    printf("router(0, 0): configuring as SW\n");
    41     assert(xcu_get_register(0, 0, XICU_CFG_REG, 0) == BH_NONE);
    42     val = (PATH_RECOVERY << 7) | (REQ_NORTH << 4) | BH_SW;
     39    val = (REQ_NORTH << 5) | (RECOVERY << 4) | SW_OF_X;
    4340    xcu_set_register(0, 0, XICU_CFG_REG, 0, val);     /* configure SW */
    4441
    4542    printf("router(1, 2): configuring as N\n");
    46     assert(xcu_get_register(1, 2, XICU_CFG_REG, 0) == BH_NONE);
    47     val = (PATH_RECOVERY << 7) | (REQ_WEST << 4) | BH_N;
     43    val = (REQ_WEST << 5) | (RECOVERY << 4) | N_OF_X;
    4844    xcu_set_register(1, 2, XICU_CFG_REG, 0, val);     /* configure N */
    4945
    5046    printf("router(2, 2): configuring as NE\n");
    51     assert(xcu_get_register(2, 2, XICU_CFG_REG, 0) == BH_NONE);
    52     val = (PATH_RECOVERY << 7) | (REQ_WEST << 4) | BH_NE;
     47    val = (REQ_WEST << 5) | (RECOVERY << 4) | NE_OF_X;
    5348    xcu_set_register(2, 2, XICU_CFG_REG, 0, val);     /* configure NE */
    5449
    5550    printf("router(2, 1): configuring as E\n");
    56     assert(xcu_get_register(2, 1, XICU_CFG_REG, 0) == BH_NONE);
    57     val = (PATH_RECOVERY << 7) | (REQ_SOUTH << 4) | BH_E;
     51    val = (REQ_SOUTH << 5) | (RECOVERY << 4) | E_OF_X;
    5852    xcu_set_register(2, 1, XICU_CFG_REG, 0, val);     /* configure E */
    5953
    6054    printf("router(2, 0): configuring as SE\n");
    61     assert(xcu_get_register(2, 0, XICU_CFG_REG, 0) == BH_NONE);
    62     val = (PATH_RECOVERY << 7) | (REQ_WEST << 4) | BH_SE;
     55    val = (REQ_WEST << 5) | (RECOVERY << 4) | SE_OF_X;
    6356    xcu_set_register(2, 0, XICU_CFG_REG, 0, val);     /* configure SE */
    6457
    6558    printf("router(1, 0): configuring as S\n");
    66     assert(xcu_get_register(1, 0, XICU_CFG_REG, 0) == BH_NONE);
    67     val = (PATH_RECOVERY << 7) | (REQ_WEST << 4) | BH_S;
     59    val = (REQ_WEST << 5) | (RECOVERY << 4) | S_OF_X;
    6860    xcu_set_register(1, 0, XICU_CFG_REG, 0, val);     /* configure S */
    6961
    70     assert((xcu_get_register(0, 2, XICU_CFG_REG, 0) & 0xF) == BH_NW);
    71     assert((xcu_get_register(0, 1, XICU_CFG_REG, 0) & 0xF) == BH_W);
    72     assert((xcu_get_register(0, 0, XICU_CFG_REG, 0) & 0xF) == BH_SW);
    73     assert((xcu_get_register(1, 2, XICU_CFG_REG, 0) & 0xF) == BH_N);
    74     assert((xcu_get_register(2, 2, XICU_CFG_REG, 0) & 0xF) == BH_NE);
    75     assert((xcu_get_register(2, 1, XICU_CFG_REG, 0) & 0xF) == BH_E);
    76     assert((xcu_get_register(2, 0, XICU_CFG_REG, 0) & 0xF) == BH_SE);
    77     assert((xcu_get_register(1, 0, XICU_CFG_REG, 0) & 0xF) == BH_S);
     62    assert((xcu_get_register(0, 2, XICU_CFG_REG, 0) & 0xF) == NW_OF_X);
     63    assert((xcu_get_register(0, 1, XICU_CFG_REG, 0) & 0xF) == W_OF_X);
     64    assert((xcu_get_register(0, 0, XICU_CFG_REG, 0) & 0xF) == SW_OF_X);
     65    assert((xcu_get_register(1, 2, XICU_CFG_REG, 0) & 0xF) == N_OF_X);
     66    assert((xcu_get_register(2, 2, XICU_CFG_REG, 0) & 0xF) == NE_OF_X);
     67    assert((xcu_get_register(2, 1, XICU_CFG_REG, 0) & 0xF) == E_OF_X);
     68    assert((xcu_get_register(2, 0, XICU_CFG_REG, 0) & 0xF) == SE_OF_X);
     69    assert((xcu_get_register(1, 0, XICU_CFG_REG, 0) & 0xF) == S_OF_X);
    7870
    7971    /* Test the recovered segment that has been migrated to the EAST cluster */

  • branches/reconfiguration/modules/dspin_router/caba/test/simple_segment_recovery_test/reset.S

    r934 r1016  
    2121#define Y_MASK ((1<<Y_WIDTH)-1)
    2222
     23#define XCU_REG(func, idx) ((((func)<<5)|(idx)) << 2)
     24#define XCU_CFG_REG 17
     25#define XCU_BARRIER 5
     26
     27#define MEMC_REG(func,idx) (((func<<7)|idx) << 2)
     28#define MEMC_CONFIG 0
     29#define MEMC_SCRATCHPAD 4
     30
    2331reset:
    2432    .set noreorder
    … …  
    3341
    3442    /*
    35      * All processors compute:
    36      *   cid = (x * Y_SIZE) + y
    37      *   pid = (cid * NB_PROCS_MAX) + lpid
     43     * Get processor ID
    3844     */
    3945    mfc0   k0,  CP0_PROCID
    40     andi   k0,  k0,  0xFFF             /* k0 <= proc_xyl                 */
     46    andi   k0,  k0,  0xFFF             /* k0 <= proc_xyl                     */
    4147
    42     /* Only the processor 0 continues the execution                      */
     48    /*
     49     * Release local gateway hardware barrier
     50     */
     51    la     k1,     SEG_XCU_BASE        /* k1 <= ICU base address             */
     52    li     t0,     XCU_REG(XCU_CFG_REG, XCU_BARRIER)
     53    or     k1,     k1,     t0          /* k1 <= &XICU[CFG_REG][BARRIER]      */
     54    li     t0,     0xFFFFFFFF
     55    sw     t0,     0(k1)
     56
     57    /*
     58     * Disable the scratchpad mode on the local memory cache
     59     */
     60    la     k1,     SEG_MMC_BASE        /* k1 <= MMC base address             */
     61    li     t0,     MEMC_REG(MEMC_CONFIG, MEMC_SCRATCHPAD)
     62    or     k1,     k1,     t0          /* k1 <= &MEMC[CONFIG][SCRATCHPAD]    */
     63    sw     zero,   0(k1)
     64
     65    /* Only the processor 0 continues the execution                          */
    4366    beqz   k0,  1f
    4467    nop
    … …  
    47701:  /* processor 0 initializes stack pointer (16K) */
    4871    la     sp,  _stack
    49     addiu  sp,  sp,  (1<<14)           /* sp <= _stack + 16K             */
     72    addiu  sp,  sp,  (1<<14)           /* sp <= _stack + 16K                 */
    5073
    5174    /* jumps to main in kernel mode */

  • branches/reconfiguration/modules/dspin_router/caba/test/simple_segment_recovery_test/test.sh

    r942 r1016  
    1313PLATFORM=../../../../../platforms/tsar_generic_iob
    1414SIMULATOR=$PLATFORM/simul.x
    15 $SIMULATOR -DSOFT $SOFT -DISK /dev/null -FAULTY_ROUTER 0 1 1 > output/log 2>&1
     15$SIMULATOR -DSOFT $SOFT \
     16           -DISK /dev/null \
     17           -FAULTY_ROUTER 0 1 1 \
     18           -NCYCLES 20000 > output/log 2>&1
     19#          -PROCID 0 \
     20#          -MEMCID 0x1 \
     21#          -DEBUG 3000 \
     22
    1623soclib-cleanup-terms &> /dev/null
    1724mv term0 output/term
    1825grep -q "success" output/term
    1926if [ $? == 0 ];
    20         then echo $(basename $PWD) ": Success";
    21         else echo $(basename $PWD) ": Failure";
     27    then echo $(basename $PWD) ": Success";
     28    else echo $(basename $PWD) ": Failure";
    2229fi;

  • branches/reconfiguration/modules/dspin_router/caba/test/synthetic_test/top.cpp

    r998 r1016  
    4444}
    4545
    46 static inline uint32_t configRouter(int bypass_mode,
    47                                     int reallocation_dir,
     46static inline uint32_t configRouter(int reallocation_dir,
     47                                    int recovery_mode,
    4848                                    int blackhole_pos)
    4949{
    50     return (bypass_mode << 7) | (reallocation_dir << 4) | blackhole_pos;
     50    return ((reallocation_dir & 0x7) << 5) |
     51           ((recovery_mode    & 0x1) << 4) |
     52           (blackhole_pos     & 0xF);
    5153}
    5254
    … …  
    295297
    296298    /* initialize the configuration signals */
    297     sConfigNONE.write(configRouter(0, REQ_NOP, BH_NONE));
    298     sConfigN.write(configRouter(1, REQ_SOUTH, BH_N));
    299     sConfigNE.write(configRouter(1, REQ_WEST, BH_NE));
    300     sConfigE.write(configRouter(1, REQ_WEST, BH_E));
    301     sConfigSE.write(configRouter(1, REQ_WEST, BH_SE));
    302     sConfigS.write(configRouter(1, REQ_NORTH, BH_S));
    303     sConfigSW.write(configRouter(1, REQ_EAST, BH_SW));
    304     sConfigW.write(configRouter(1, REQ_EAST, BH_W));
    305     sConfigNW.write(configRouter(1, REQ_EAST, BH_NW));
     299    sConfigNONE.write(configRouter(0, 0, NORMAL));
     300
     301    // requests to the deactivated segment are dropped
     302    sConfigN.write(configRouter(REQ_SOUTH, 1, N_OF_X));
     303    sConfigNE.write(configRouter(REQ_WEST, 1, NE_OF_X));
     304    sConfigE.write(configRouter(REQ_WEST, 1, E_OF_X));
     305    sConfigSE.write(configRouter(REQ_WEST, 1, SE_OF_X));
     306    sConfigS.write(configRouter(REQ_NORTH, 1, S_OF_X));
     307    sConfigSW.write(configRouter(REQ_EAST, 1, SW_OF_X));
     308    sConfigW.write(configRouter(REQ_EAST, 1, W_OF_X));
     309    sConfigNW.write(configRouter(REQ_EAST, 1, NW_OF_X));
    306310
    307311    /* initialize mesh boundary signals */
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