Index: trunk/platforms/tsar_generic_xbar/scripts/gen_arch_info.py =================================================================== --- trunk/platforms/tsar_generic_xbar/scripts/gen_arch_info.py (revision 1022) +++ trunk/platforms/tsar_generic_xbar/scripts/gen_arch_info.py (revision 1023) @@ -1,4 +1,4 @@ #-------------------------------------------------------------------- -# File : gen_arch_info_large.sh +# File : gen_arch_info.py #-------------------------------------------------------------------- @@ -8,185 +8,135 @@ import sys -X_MAX = 0 -Y_MAX = 0 -CPU_PER_CLUSTER = 0 -BSCPU = 0 -BSTTY = 0 -BSDMA = 0 -MEMC_SIZE = 0 -P_WDITH = 4 -NB_TTY = 4 -TTY_CHANNEL_SIZE = 0X00000010 -TTY_SIZE = 0X00001000 -OUTPUT_IRQ_PER_PROC = 4 -DMA_SIZE = 0X00001000 -XCU_SIZE = 0X00001000 -BDV_SIZE = 0X00001000 -FBF_SIZE = 0X00200000 -MEMC_TGTID = 0 -XICU_TGTID = 1 -MDMA_TGTID = 2 -MTTY_TGTID = 3 -BDEV_TGTID = 4 -MNIC_TGTID = 5 -BROM_TGTID = 6 -CDMA_TGTID = 7 -SIMH_TGTID = 8 -FBUF_TGTID = 9 +exec(file("hard_params.py")) + +def print_comments(cmd, x, y, cpu_per_cluster, bscpu): + print "# TSAR hardware description in BIB (Boot Information Block) format" + print "# This file is autogenerated by the command: " + cmd + " %d %d %d %d" % (x, y, cpu_per_cluster, bscpu) + print "# It is ready to be passed to info2bib utility so the binary format can be generated" + print " " + print "# " + getpass.getuser() + " on " + socket.gethostname() + " " + time.strftime("%H:%M:%S") + print " " + print " " + +def print_header(x, y, bscpu, bstty, bsdma): + print "[HEADER]" + print " REVISION=1" + print " ARCH=SOCLIB-TSAR" + print " XMAX=%d" % x + print " YMAX=%d" % y + print " BSCPU=%d" % bscpu + print " BSTTY=0x%x" % bstty + print " BSDMA=0x%x" % bsdma + print " " + print " " -# PHYSICAL ADDRESS WIDTH -ADDR_WIDTH = 32 +def print_cluster(x, y, x_width, y_width, cpu_per_cluster): + mem_addr = ram_addr(x, y, x_width, y_width) + mem_size = ram_size(x_width, y_width) + xcu_base = replicated_periph_base_addr(x_width, y_width, XCU_TGTID) + dma_base = replicated_periph_base_addr(x_width, y_width, DMA_TGTID) + xcu_addr = replicated_periph_addr(x, y, x_width, y_width, xcu_base) + dma_addr = replicated_periph_addr(x, y, x_width, y_width, dma_base) + print "[CLUSTER]" -# DEFAULT VALUES -DEFAULT_X_MAX = 8 -DEFAULT_Y_MAX = 8 -DEFAULT_CPU_PER_CLUSTER = 4 -CLUSTER_INC = 0 + cid = x * (1 << y_width) + y + cpu_num = 0; + while (cpu_num != cpu_per_cluster): + gid = (cid << P_WIDTH) + cpu_num + print " [CPU] ID=%d OUTIRQ=%d" % (gid, (cpu_num * OUTPUT_IRQ_PER_PROC)) + cpu_num += 1 + + print " [DEV] ID=RAM BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (mem_addr, mem_size) + print " [DEV] ID=XICU BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (xcu_addr, DMA_SIZE) + print " [DEV] ID=DMA BASE=%#.8x SIZE=%#.8x IRQ=8 IRQTYPE=HWI" % (dma_addr, XCU_SIZE) + print " " + print " " -def print_comments(cmd): - print "# TSAR hardware description in BIB (Boot Information Block) format" - print "# This file is autogenerated by the command: " + cmd + " %d %d %d %d" % (X_MAX, Y_MAX, CPU_PER_CLUSTER, BSCPU) - print "# It is ready to be passed to info2bib utility so the binary format can be generated" - print " " - print "# " + getpass.getuser() + " on " + socket.gethostname() + " " + time.strftime("%H:%M:%S") - print " " - print " " - -def print_header(): - print "[HEADER]" - print " REVISION=1" - print " ARCH=SOCLIB-TSAR" - print " XMAX=%d" % X_MAX - print " YMAX=%d" % Y_MAX - print " BSCPU=%d" % BSCPU - print " BSTTY=0x%x" % BSTTY - print " BSDMA=0x%x" % BSDMA - print " " - print " " -def print_cluster(offset, cid): - mem_base = offset - mem_size = MEMC_SIZE - xcu_base = (offset + (CLUSTER_INC / 2) + (XICU_TGTID << 19)) - dma_base = (offset + (CLUSTER_INC / 2) + (MDMA_TGTID << 19)) - print "[CLUSTER]" - cpu_num=0; - while (cpu_num != CPU_PER_CLUSTER): - gid = (cid << CPU_PER_CLUSTER) + cpu_num - print " [CPU] ID=%d OUTIRQ=%d" % (gid, (cpu_num * OUTPUT_IRQ_PER_PROC)) - cpu_num = cpu_num + 1 - - print " [DEV] ID=RAM BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (mem_base, mem_size) - print " [DEV] ID=XICU BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (xcu_base, DMA_SIZE) - print " [DEV] ID=DMA BASE=%#.8x SIZE=%#.8x IRQ=8 IRQTYPE=HWI" % (dma_base, XCU_SIZE) - print " " - print " " +def print_io_cluster(x, y, x_width, y_width, cpu_per_cluster): + mem_addr = ram_addr(x, y, x_width, y_width) + mem_size = ram_size(x_width, y_width) -def print_io_cluster(offset, cid): - mem_base = offset - mem_size = MEMC_SIZE - xcu_base = (offset + (CLUSTER_INC / 2) + (XICU_TGTID << 19)) - dma_base = (offset + (CLUSTER_INC / 2) + (MDMA_TGTID << 19)) - bdv_base = (offset + (CLUSTER_INC / 2) + (BDEV_TGTID << 19)) - tty_base = (offset + (CLUSTER_INC / 2) + (MTTY_TGTID << 19)) - fbf_base = (offset + (CLUSTER_INC / 2) + (FBUF_TGTID << 19)) - - print "[CLUSTER]" - cpu_num = 0 - while (cpu_num != CPU_PER_CLUSTER): - gid = (cid << CPU_PER_CLUSTER) + cpu_num - print " [CPU] ID=%d OUTIRQ=%d" % (gid, (cpu_num * OUTPUT_IRQ_PER_PROC)) - cpu_num = cpu_num + 1 - - print " [DEV] ID=RAM BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (mem_base, mem_size) - print " [DEV] ID=XICU BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (xcu_base, XCU_SIZE) - print " [DEV] ID=DMA BASE=%#.8x SIZE=%#.8x IRQ=8 IRQTYPE=HWI" % (dma_base, DMA_SIZE) - print " [DEV] ID=BLKDEV BASE=%#.8x SIZE=%#.8x IRQ=31 IRQTYPE=HWI" % (bdv_base, BDV_SIZE) - ntty = 0 - irq = 16 - while (ntty < NB_TTY): - tty_base_i = tty_base + ntty * TTY_CHANNEL_SIZE - print " [DEV] ID=TTY BASE=%#.8x SIZE=%#.8x IRQ=%d IRQTYPE=HWI" % (tty_base_i, TTY_CHANNEL_SIZE, irq) - irq = irq + 1 - ntty = ntty + 1 - print " [DEV] ID=FB BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (fbf_base, FBF_SIZE) - print " " - print " " + xcu_addr = periph_addr(x_width, y_width, XCU_TGTID) + dma_addr = periph_addr(x_width, y_width, DMA_TGTID) + ioc_addr = periph_addr(x_width, y_width, IOC_TGTID) + tty_base = periph_addr(x_width, y_width, TTY_TGTID) + fbf_addr = periph_addr(x_width, y_width, FBF_TGTID) + + print "[CLUSTER]" + cpu_num = 0 + cid = x * (1 << y_width) + y + while (cpu_num != cpu_per_cluster): + gid = (cid << P_WIDTH) + cpu_num + print " [CPU] ID=%d OUTIRQ=%d" % (gid, (cpu_num * OUTPUT_IRQ_PER_PROC)) + cpu_num = cpu_num + 1 + + print " [DEV] ID=RAM BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (mem_addr, mem_size) + print " [DEV] ID=XICU BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (xcu_addr, XCU_SIZE) + print " [DEV] ID=DMA BASE=%#.8x SIZE=%#.8x IRQ=8 IRQTYPE=HWI" % (dma_addr, DMA_SIZE) + print " [DEV] ID=BLKDEV BASE=%#.8x SIZE=%#.8x IRQ=31 IRQTYPE=HWI" % (ioc_addr, IOC_SIZE) + ntty = 0 + irq = 16 + while (ntty < NB_TTY_CHANNELS): + tty_base_i = tty_base + ntty * TTY_CHANNEL_SIZE + print " [DEV] ID=TTY BASE=%#.8x SIZE=%#.8x IRQ=%d IRQTYPE=HWI" % (tty_base_i, TTY_CHANNEL_SIZE, irq) + irq += 1 + ntty += 1 + print " [DEV] ID=FB BASE=%#.8x SIZE=%#.8x IRQ=-1 IRQTYPE=NONE" % (fbf_addr, FBF_SIZE) + print " " + print " " -def gen_arch_info(x, y, x_width, y_width, bscpu, arch_info_name): - fp = open(arch_info_name, 'w') - stdout = sys.stdout - sys.stdout = fp - global X_MAX - global Y_MAX - global CPU_PER_CLUSTER - global CLUSTER_INC - global MEMC_SIZE - global BSCPU - global BSDMA - global BSTTY - - #------------------------ - - X_MAX = x - Y_MAX = y - cpu_per_cluster = DEFAULT_CPU_PER_CLUSTER - CPU_PER_CLUSTER = cpu_per_cluster - - #------------------------ - CLUSTER_INC = (0x80000000 >> (x_width + y_width)) * 2 - max_memc_size = 0x40000000 / (X_MAX * Y_MAX) - size = min(max_memc_size, 0x10000000) - MEMC_SIZE = size +def gen_arch_info(x, y, x_width, y_width, cpu_per_cluster, bscpu, arch_info_name): + fp = open(arch_info_name, 'w') + stdout = sys.stdout + sys.stdout = fp - ########################################################################################## - #we force io_cid to 0 because this is the only cluster we know which will be present - #in all platform where the number of clusters is independant of x_width and y_width values - io_cid = 0 - ########################################################################################## + x_io = get_x_io(x_width, y_width) + y_io = get_y_io(x_width, y_width) - BSCPU = bscpu - - break_loop = 0 - xi = 0 + ########################################################################################### + # we force io_cid to 0 because this is the only cluster we know which will be present + # in all platform where the number of clusters is independant of x_width and y_width values + # io_cid = 0 + # @QM No. + ########################################################################################### + + break_loop = 0 + xi = 0 + yi = 0 + while (xi < x): + while (yi < y): + if xi == x_io and yi == y_io: + bsdma = periph_addr(x_width, y_width, DMA_TGTID) + bstty = periph_addr(x_width, y_width, TTY_TGTID) + break_loop = 1 + break + else: + bsdma = "error" + yi = yi + 1 + + if break_loop == 1: + break yi = 0 - while (xi < X_MAX): - while (yi < Y_MAX): - cid = xi * (1 << y_width) + yi - offset = cid << (ADDR_WIDTH - x_width - y_width) - if cid == io_cid: - BSDMA = offset + (CLUSTER_INC / 2) + (MDMA_TGTID << 19) - BSTTY = offset + (CLUSTER_INC / 2) + (MTTY_TGTID << 19) - break_loop = 1 - break - else: - bsdma="error" - yi = yi + 1 + xi = xi + 1 + + # Generate the description + print_comments(sys.argv[0], x, y, cpu_per_cluster, bscpu) + print_header(x, y, bscpu, bstty, bsdma) + + xi = 0 + yi = 0 + while (xi < x): + while (yi < y): + if xi == x_io and yi == y_io: + print_io_cluster(xi, yi, x_width, y_width, cpu_per_cluster) + else: + print_cluster(xi, yi, x_width, y_width, cpu_per_cluster) + yi = yi + 1 + yi = 0 + xi = xi + 1 + sys.stdout = stdout + fp.close() - if break_loop == 1: - break - yi = 0 - xi = xi + 1 - - # Generate the description - print_comments(sys.argv[0]) - print_header() - - xi = 0 - yi = 0 - while (xi < X_MAX): - while (yi < Y_MAX): - cid = xi * (1 << y_width) + yi - offset = cid << (ADDR_WIDTH - (x_width + y_width)) - if cid == io_cid: - print_io_cluster(offset, cid) - else: - print_cluster(offset, cid) - yi = yi + 1 - yi = 0 - xi = xi + 1 - sys.stdout = stdout - fp.close() - Index: trunk/platforms/tsar_generic_xbar/scripts/gen_hard_config.py =================================================================== --- trunk/platforms/tsar_generic_xbar/scripts/gen_hard_config.py (revision 1022) +++ trunk/platforms/tsar_generic_xbar/scripts/gen_hard_config.py (revision 1023) @@ -1,63 +1,41 @@ + +exec(file("hard_params.py")) def hard_config(x, y, x_width, y_width, p, hard_config, protocol): + + x_io = get_x_io(x_width, y_width) + y_io = get_y_io(x_width, y_width) - ram_tgtid = 0 - xcu_tgtid = 1 - dma_tgtid = 2 - tty_tgtid = 3 - ioc_tgtid = 4 - nic_tgtid = 5 - rom_tgtid = 6 - cma_tgtid = 7 - sim_tgtid = 8 - fbf_tgtid = 9 - - nb_dma_channels = 1 - nb_cma_channels = 0 - nb_tty_channels = 4 - nb_ioc_channels = 1 - - fbf_x_size = 1024 - fbf_y_size = 1024 - - seg_rom_base = 0xbfc00000 - seg_rom_size = 0x00100000 - - cluster_inc = 0x80000000 / (x * y) * 2 - cluster_io_id = seg_rom_base >> (32 - x_width - y_width) - cluster_io_inc = cluster_io_id * cluster_inc - ram_max_size = 0x40000000 / (x * y) # 1 Go Max - - seg_ram_base = 0x00000000 - seg_ram_size = min(0x10000000, ram_max_size) - - seg_xcu_base = (cluster_inc >> 1) + (xcu_tgtid << 19) - seg_xcu_size = 0x00001000 # 4Ko - - seg_dma_base = (cluster_inc >> 1) + (dma_tgtid << 19) - seg_dma_size = 0x00001000 * nb_dma_channels - - def periph_address(tgtid): - return (cluster_inc >> 1) + cluster_io_inc + (tgtid << 19) - - seg_ioc_base = periph_address(ioc_tgtid); - seg_ioc_size = 0x00001000 - - seg_tty_base = periph_address(tty_tgtid) - seg_tty_size = 0x00001000 - - seg_fbf_base = periph_address(fbf_tgtid) - seg_fbf_size = fbf_x_size * fbf_y_size * 2 - - seg_nic_base = periph_address(nic_tgtid) - seg_nic_size = 0x00080000 - - seg_cma_base = periph_address(cma_tgtid) - seg_cma_size = 0x00004000 * nb_cma_channels - - seg_sim_base = periph_address(sim_tgtid) - seg_sim_size = 0x00001000 + seg_rom_base = BOOT_ADDR + seg_rom_size = ROM_SIZE + + seg_ram_base = RAM_BASE + seg_ram_size = ram_size(x_width, y_width) + + seg_xcu_base = replicated_periph_base_addr(x_width, y_width, XCU_TGTID) + seg_xcu_size = XCU_SIZE + + seg_dma_base = replicated_periph_base_addr(x_width, y_width, DMA_TGTID) + seg_dma_size = DMA_SIZE * NB_DMA_CHANNELS + + seg_ioc_base = periph_addr(x_width, y_width, IOC_TGTID); + seg_ioc_size = IOC_SIZE + + seg_tty_base = periph_addr(x_width, y_width, TTY_TGTID) + seg_tty_size = TTY_SIZE + + seg_fbf_base = periph_addr(x_width, y_width, FBF_TGTID) + seg_fbf_size = FBF_X_SIZE * FBF_Y_SIZE * 2 + + seg_nic_base = periph_addr(x_width, y_width, NIC_TGTID) + seg_nic_size = NIC_SIZE + + seg_cma_base = periph_addr(x_width, y_width, CMA_TGTID) + seg_cma_size = CMA_SIZE * NB_CMA_CHANNELS + + seg_sim_base = periph_addr(x_width, y_width, SIM_TGTID) + seg_sim_size = SIM_SIZE header = ''' @@ -65,5 +43,5 @@ #define _HARD_CONFIG_H_ -/* Generated from run_simus.py */ +/* Generated from gen_hard_config.py */ /* General platform parameters */ @@ -74,6 +52,6 @@ #define Y_WIDTH %(y_width)d #define P_WIDTH 4 -#define X_IO 0 -#define Y_IO 0 +#define X_IO %(x_io)d +#define Y_IO %(y_io)d #define NB_PROCS_MAX %(proc_per_clus)d #define IRQ_PER_PROCESSOR 4 @@ -169,20 +147,22 @@ ''' % dict(x_size = x, y_size = y, x_width = x_width, y_width = y_width, + x_io = x_io, + y_io = y_io, proc_per_clus = p, - nb_tty_channels = nb_tty_channels, - nb_ioc_channels = nb_ioc_channels, - nb_cma_channels = nb_cma_channels, - nb_dma_channels = nb_dma_channels, - fbf_x_size = fbf_x_size, fbf_y_size = fbf_y_size, - ram_tgtid = ram_tgtid, - xcu_tgtid = xcu_tgtid, - dma_tgtid = dma_tgtid, - tty_tgtid = tty_tgtid, - ioc_tgtid = ioc_tgtid, - nic_tgtid = nic_tgtid, - rom_tgtid = rom_tgtid, - cma_tgtid = cma_tgtid, - sim_tgtid = sim_tgtid, - fbf_tgtid = fbf_tgtid, + nb_tty_channels = NB_TTY_CHANNELS, + nb_ioc_channels = NB_IOC_CHANNELS, + nb_cma_channels = NB_CMA_CHANNELS, + nb_dma_channels = NB_DMA_CHANNELS, + fbf_x_size = FBF_X_SIZE, fbf_y_size = FBF_Y_SIZE, + ram_tgtid = RAM_TGTID, + xcu_tgtid = XCU_TGTID, + dma_tgtid = DMA_TGTID, + tty_tgtid = TTY_TGTID, + ioc_tgtid = IOC_TGTID, + nic_tgtid = NIC_TGTID, + rom_tgtid = ROM_TGTID, + cma_tgtid = CMA_TGTID, + sim_tgtid = SIM_TGTID, + fbf_tgtid = FBF_TGTID, seg_ram_base = seg_ram_base, seg_ram_size = seg_ram_size, Index: trunk/platforms/tsar_generic_xbar/scripts/gen_hdd.py =================================================================== --- trunk/platforms/tsar_generic_xbar/scripts/gen_hdd.py (revision 1022) +++ trunk/platforms/tsar_generic_xbar/scripts/gen_hdd.py (revision 1023) @@ -9,4 +9,5 @@ def hdd_img(partition_root, target, fs_type, bootloader_name): + print("### Creating HDD_IMG") # echo "Dont forget to check the numbers of sectors for each file" @@ -28,4 +29,8 @@ sys.exit() + # Remove current disk image if it exists, otherwise the creation fails + if (os.path.isfile(target)): + print "rm", target + os.remove(target) size_bytes = 512000 @@ -43,6 +48,5 @@ back_up_sector = reserved_sectors - 1 # last reserved sector - print("******** HDD_IMG *********") - print("%d reserved sectors --> backup at back up sector %d" % (reserved_sectors, back_up_sector)) + print "# %d reserved sectors --> backup at back up sector %d" % (reserved_sectors, back_up_sector) # the first two cluster are not in the data region # data_region_clusters=$cluster_size-2 @@ -73,5 +77,5 @@ # copy bootloader, arch-info (boot-info) and kernel-img in reserved sectors from sector 2 - print("Insert boot_loader at sector $offset") + print "# Inserting boot_loader at sector %d" % (offset) cmd = ['dd', 'bs=%d' % sector_size, 'seek=%d' % offset, 'count=%d' % sectors_boot, 'conv=notrunc', 'if=%s' % bootloader_name, 'of=%s' % target] @@ -79,9 +83,11 @@ subprocess.call(cmd) + print "### End of HDD image generation" + if __name__ == '__main__': if len(sys.argv) != 5: - print("Usage: %s path/to/partition/root " % sys.argv[0]) + print "Usage: %s path/to/partition/root " % sys.argv[0] sys.exit() Index: trunk/platforms/tsar_generic_xbar/scripts/hard_params.py =================================================================== --- trunk/platforms/tsar_generic_xbar/scripts/hard_params.py (revision 1023) +++ trunk/platforms/tsar_generic_xbar/scripts/hard_params.py (revision 1023) @@ -0,0 +1,82 @@ + +RAM_TGTID = 0 +XCU_TGTID = 1 +DMA_TGTID = 2 +TTY_TGTID = 3 +IOC_TGTID = 4 +NIC_TGTID = 5 +ROM_TGTID = 6 +CMA_TGTID = 7 +SIM_TGTID = 8 +FBF_TGTID = 9 + +DMA_SIZE = 0X00001000 +XCU_SIZE = 0X00001000 +TTY_SIZE = 0X00001000 +IOC_SIZE = 0X00001000 +NIC_SIZE = 0x00080000 +ROM_SIZE = 0x00100000 +CMA_SIZE = 0x00004000 +SIM_SIZE = 0X00001000 +FBF_SIZE = 0X00200000 + +RAM_BASE = 0x0 +RAM_MAX_TOTAL_SIZE = 0x10000000 +RAM_MAX_CLUST_SIZE = 0x10000000 + + +NB_DMA_CHANNELS = 1 +NB_CMA_CHANNELS = 0 +NB_TTY_CHANNELS = 4 +NB_IOC_CHANNELS = 1 +TTY_CHANNEL_SIZE = 0X00000010 + +FBF_X_SIZE = 1024 +FBF_Y_SIZE = 1024 + + +P_WIDTH = 4 + +ADDR_WIDTH = 32 +BOOT_ADDR = 0xbfc00000 + +OUTPUT_IRQ_PER_PROC = 4 + + +def get_x_io(x_width, y_width): + return BOOT_ADDR >> (ADDR_WIDTH - x_width) + +def get_y_io(x_width, y_width): + return (BOOT_ADDR >> (ADDR_WIDTH - x_width - y_width)) & ((1 << y_width) - 1) + + +def replicated_periph_base_addr(x_width, y_width, tgtid): + demi_cluster_inc = (1 << (ADDR_WIDTH - 1)) >> (x_width + y_width) + return demi_cluster_inc + (tgtid << 19) + +def replicated_periph_addr(x, y, x_width, y_width, base_addr): + cid = x * (1 << y_width) + y + demi_cluster_inc = (1 << (ADDR_WIDTH - 1)) >> (x_width + y_width) + return demi_cluster_inc * 2 * cid + base_addr + + + +def periph_addr(x_width, y_width, tgtid): + demi_cluster_inc = (1 << (ADDR_WIDTH - 1)) >> (x_width + y_width) + + x_io = get_x_io(x_width, y_width) + y_io = get_y_io(x_width, y_width) + cluster_io_id = x_io * (1 << y_width) + y_io + cluster_io_offset = cluster_io_id * demi_cluster_inc * 2 + return demi_cluster_inc + cluster_io_offset + (tgtid << 19) + + +def ram_size(x_width, y_width): + return min(RAM_MAX_TOTAL_SIZE >> (x_width + y_width), RAM_MAX_CLUST_SIZE) + + +def ram_addr(x, y, x_width, y_width): + cid = x * (1 << y_width) + y + demi_cluster_inc = (1 << (ADDR_WIDTH - 1)) >> (x_width + y_width) + return demi_cluster_inc * 2 * cid + RAM_BASE + Index: trunk/platforms/tsar_generic_xbar/scripts/run_simus.py =================================================================== --- trunk/platforms/tsar_generic_xbar/scripts/run_simus.py (revision 1022) +++ trunk/platforms/tsar_generic_xbar/scripts/run_simus.py (revision 1023) @@ -15,17 +15,18 @@ # User parameters -bscpu = 0 -#nb_procs = [ 4 ] -nb_procs = [ 1, 4, 8, 16, 32, 64, 128, 256 ] -rerun_stats = True -use_omp = True +bscpu = 0 # bootstrap CPU +nb_procs = [ 4 ] +#nb_procs = [ 1, 4, 8, 16, 32, 64, 128, 256 ] +rerun_stats = False +use_omp = False protocol = 'rwt' cpu_per_cluster = 4 # mode must be one of 'test' and 'simu' -mode = 'simu' +mode = 'test' #apps = [ 'cholesky', 'fft', 'fft_ga', 'filter', 'filt_ga', 'histogram', 'kmeans', 'lu', 'mandel', 'mat_mult', 'pca', 'radix_ga' ] #apps = [ 'histogram', 'mandel', 'filter', 'radix_ga', 'fft_ga', 'kmeans' ] -apps = [ 'blackscholes', 'linear_regression', 'string_match', 'swaptions', 'fluidanimate' ] +#apps = [ 'blackscholes', 'linear_regression', 'string_match', 'swaptions', 'fluidanimate' ] +apps = [ 'hello', 'taquin', '2048' ] @@ -40,23 +41,26 @@ # Global Variables -all_apps = [ 'blackscholes', 'boot_only', 'cholesky', 'fft', 'fft_ga', 'filter', 'filt_ga', 'fluidanimate', 'histogram', 'histo-opt', 'kmeans', 'kmeans-opt', 'linear_regression', 'lu', 'mandel', 'mat_mult', 'mat_mult-opt', 'pca', 'pca-opt', 'radix', 'radix_ga', 'showimg', 'string_match', 'swaptions', ] +all_apps = [ '2048', 'blackscholes', 'boot_only', 'cholesky', 'fft', 'fft_ga', 'filter', 'filt_ga', 'fluidanimate', 'hello', 'histogram', 'histo-opt', 'kmeans', 'kmeans-opt', 'linear_regression', 'lu', 'mandel', 'mat_mult', 'mat_mult-opt', 'pca', 'pca-opt', 'radix', 'radix_ga', 'showimg', 'string_match', 'swaptions', 'taquin'] # to come: 'barnes', 'fmm', 'ocean', 'raytrace', 'radiosity', 'waters', 'watern' all_protocols = [ 'dhccp', 'rwt', 'hmesi', 'wtidl', 'snoop' ] -top_path = os.path.join(os.path.dirname(os.path.realpath(__file__)), "..") +top_path = os.path.abspath(os.path.join(os.path.dirname(os.path.realpath(__file__)), "..")) config_name = os.path.join(os.path.dirname(os.path.realpath(__file__)), "config.py") -scripts_path = os.path.join(top_path, 'scripts') -almos_path = os.path.join(top_path, 'almos') -soclib_conf_name = os.path.join(top_path, "soclib.conf") -topcell_name = os.path.join(top_path, "top.cpp") -partition_root_path = os.path.join(top_path, "hdd_root") -arch_info_name = os.path.join(almos_path, "arch-info-gen.info") -arch_info_bib_name = os.path.join(almos_path, 'arch-info.bib') -hdd_img_file_name = os.path.join(almos_path, "hdd-img.bin") -shrc_file_name = os.path.join(almos_path, "shrc") -hard_config_name = os.path.join(almos_path, "hard_config.h") -bootloader_link_name = os.path.join(almos_path, "bootloader-tsar-mipsel.bin") +scripts_path = os.path.join(top_path, 'scripts') +almos_path = os.path.join(top_path, 'almos') +soclib_conf_name = os.path.join(top_path, "soclib.conf") +topcell_name = os.path.join(top_path, "top.cpp") +partition_root_path = os.path.join(top_path, "hdd_root") +arch_info_name = os.path.join(almos_path, "arch-info.info") +arch_info_bib_name = os.path.join(almos_path, 'arch-info.bib') +hdd_img_file_name = os.path.join(almos_path, "hdd-img.bin") +shrc_file_name = os.path.join(almos_path, "shrc") +hard_config_name = os.path.join(almos_path, "hard_config.h") +bootloader_file_name = os.path.join(almos_path, "bootloader-tsar-mipsel.bin") +preloader_file_name = os.path.join(almos_path, "preloader.elf") +preloader_build_path = os.path.join(almos_path, "build_preloader") +bootloader_build_path = os.path.join(almos_path, "build_bootloader") @@ -87,5 +91,4 @@ - almos_src_dir: path to almos source directory (for kernel and bootloader binaries) - preloader_src_dir: path to the preloader main directory (where to run make) - - hdd_img_name: path to the hdd image to use (will be copied but not modified) - tsar_dir: path to tsar repository Optional definitions (necessary if you want to use alternative protocols): @@ -102,5 +105,5 @@ # Check that variables and paths exist -for var in [ 'apps_dir', 'almos_src_dir', 'hdd_img_name', 'tsar_dir' ]: +for var in [ 'apps_dir', 'almos_src_dir', 'tsar_dir' ]: if eval(var) == "": print "*** Error: variable %s not defined in config file" % (var) @@ -183,5 +186,5 @@ def gen_soclib_conf(): if os.path.isfile(soclib_conf_name): - print "Updating file %s" % (soclib_conf_name) + print "# Updating file %s" % (soclib_conf_name) # First, remove lines containing "addDescPath" f = open(soclib_conf_name, "r") @@ -196,5 +199,5 @@ f.close() else: - print "Creating file %s" % (soclib_conf_name) + print "# Creating file %s" % (soclib_conf_name) f = open(soclib_conf_name, "w") f.close() @@ -245,33 +248,39 @@ -def gen_arch_info_bib(x, y, arch_info, arch_info_bib): +def gen_arch_info_bib(x, y, x_width, y_width): + print "### Generating arch-info files" old_path = os.getcwd() print "cd", scripts_path os.chdir(scripts_path) - gen_arch_info(x, y, x_width, y_width, bscpu, arch_info) + gen_arch_info(x, y, x_width, y_width, cpu_per_cluster, bscpu, arch_info_name) os.chdir(almos_path) - cmd = ['./info2bib', '-i', arch_info, '-o', arch_info_bib] + cmd = ['./info2bib', '-i', arch_info_name, '-o', arch_info_bib_name] print_and_call(cmd) print "cd", old_path os.chdir(old_path) + + print "### End of arch-info files generation" -def gen_sym_links(): - target = os.path.join(almos_src_dir, 'tools/soclib-bootloader/bootloader-tsar-mipsel.bin') - if not os.path.isfile(bootloader_link_name): - print "ln -s", target, bootloader_link_name - os.symlink(target, bootloader_link_name) - - #target = os.path.join(almos_src_dir, 'kernel/obj.tsar/almix-tsar-mipsel.bin') - #link_name = 'kernel-soclib.bin' - #if not os.path.isfile(link_name): - # print "ln -s", target, link_name - # os.symlink(target, link_name) +#def gen_sym_links(): +# print "### Generating symbolic links" +# target = os.path.join(almos_src_dir, 'tools/soclib-bootloader/bootloader-tsar-mipsel.bin') +# if not os.path.isfile(bootloader_link_name): +# print "ln -s", target, bootloader_link_name +# os.symlink(target, bootloader_link_name) +# +# print "### End of symbolic links generation" +# #target = os.path.join(almos_src_dir, 'kernel/obj.tsar/almix-tsar-mipsel.bin') +# #link_name = 'kernel-soclib.bin' +# #if not os.path.isfile(link_name): +# # print "ln -s", target, link_name +# # os.symlink(target, link_name) def compile_almos(): + print "### Compiling Almos" old_path = os.getcwd() @@ -279,16 +288,41 @@ os.chdir(almos_src_dir) cmd = ['make'] - print_and_call(cmd) + retval = print_and_call(cmd) + if retval != 0: + sys.exit() + + print "cd", old_path + os.chdir(old_path) + + print "### End of Almos compilation" + + +def compile_bootloader(): + # This function depends upon the file arch-info.bib and should be called + # every time it is modified + print "### Compiling Almos bootloader" + old_path = os.getcwd() + bootloader_dir = os.path.join(almos_src_dir, 'tools/soclib-bootloader') print "cd", bootloader_dir os.chdir(bootloader_dir) - print_and_call(cmd) + cmd = ['make', 'ARCH_BIB=%s' % (arch_info_bib_name), 'BUILD_DIR=%s' % (bootloader_build_path), 'TARGET_DIR=%s' % (almos_path)] + retval = print_and_call(cmd) + if retval != 0: + sys.exit() print "cd", old_path os.chdir(old_path) - + + print "### End of Almos bootloader compilation" + + def compile_preloader(): + # This function depends upon the file hard_config.h, and should be called + # every time it is modified + print "### Compiling preloader" old_path = os.getcwd() + hard_conf_path_set = "HARD_CONFIG_PATH=" + almos_path bscpu_set = "BS_PROC=%d" % bscpu @@ -296,14 +330,19 @@ print "cd", preloader_src_dir os.chdir(preloader_src_dir) - cmd = ['make', hard_conf_path_set, bscpu_set, 'USE_DT=0'] - print_and_call(cmd) + cmd = ['make', hard_conf_path_set, bscpu_set, 'USE_DT=0', 'BUILD_DIR=%s' % (preloader_build_path)] + retval = print_and_call(cmd) + if retval != 0: + sys.exit() print "cd", old_path os.chdir(old_path) + print "### End of preloader compilation" + def compile_app(app_name): + print "### Compiling application %s" % (app_name) #if app_name in splash2: @@ -352,4 +391,6 @@ print "cd", old_path os.chdir(old_path) + + print "### End of compilation for application %s" % (app_name) # end of compile_app @@ -358,5 +399,6 @@ def gen_shrc(app_name, nprocs): - # Creation/Modification du shrc de almos + # Creation/Modification of almos shrc file + print "### Generating shrc for application %s and %d threads" % (app_name, nprocs) if mode == 'test': if (app_name == "blackscholes"): @@ -374,4 +416,6 @@ elif (app_name == "fluidanimate"): shrc = "exec -p 0 /bin/fluidani -n%(nproc)d -i /etc/flui_15K.flu\n" % dict(nproc = nprocs) + elif (app_name == "hello"): + shrc = "exec -p 0 /bin/hello -n%(nproc)d\n" % dict(nproc = nprocs) elif (app_name == "histogram"): shrc = "exec -p 0 /bin/histogra -n%(nproc)d /etc/histo_s.bmp\n" % dict(nproc = nprocs) @@ -480,4 +524,6 @@ cmd = ['cp', shrc_file_name, os.path.join(partition_root_path, "etc", "shrc")] print_and_call(cmd) + + print "### End of shrc generation for application %s and %d threads" % (app_name, nprocs) # end of gen_shrc @@ -487,7 +533,6 @@ print_and_call(cmd) -gen_sym_links() +#gen_sym_links() gen_soclib_conf() -compile_preloader() compile_almos() # Compile application once at the beginning not to intererfere with @@ -507,7 +552,11 @@ x_width = get_nb_bits(x) y_width = get_nb_bits(y) - nthreads = min(4, x * y) + nthreads = min(4, x * y) # thread number for parallel systemcass hard_config(x, y, x_width, y_width, cpu_per_cluster, hard_config_name, protocol) - gen_arch_info_bib(x, y, arch_info_name, arch_info_bib_name) + gen_arch_info_bib(x, y, x_width, y_width) + # We must recompile the preloader because we modified the hard_config file + # and the bootloader because we modified the arch-info.bib file + compile_preloader() + compile_bootloader() cmd = ['touch', topcell_name] @@ -523,10 +572,6 @@ gen_shrc(app, i) - # Remove current disk image - print "rm", hdd_img_file_name - os.remove(hdd_img_file_name) - # Regenerate disk image - hdd_img(partition_root_path, hdd_img_file_name, "fat32", bootloader_link_name) + hdd_img(partition_root_path, hdd_img_file_name, "fat32", bootloader_file_name) # Launch simulation @@ -560,6 +605,6 @@ assert(start2_found and end_found) - # Regenerate shrc and hdd to ensure having the same hdd image - gen_shrc(app, i) + # Regenerate hdd to ensure having the same hdd image + hdd_img(partition_root_path, hdd_img_file_name, "fat32", bootloader_file_name) # Relauching simulation with reset and dump of counters @@ -581,5 +626,4 @@ file.write(output) file.close() - ## End of simulations Index: trunk/platforms/tsar_generic_xbar/top.cpp =================================================================== --- trunk/platforms/tsar_generic_xbar/top.cpp (revision 1022) +++ trunk/platforms/tsar_generic_xbar/top.cpp (revision 1023) @@ -271,5 +271,4 @@ int64_t debug_from = 0; // trace start cycle int64_t frozen_cycles = MAX_FROZEN_CYCLES; // monitoring frozen processor - size_t cluster_io_id; // index of cluster containing IOs int64_t reset_counters = -1; int64_t dump_counters = -1; @@ -280,14 +279,10 @@ ////////////// command line arguments ////////////////////// - if (argc > 1) - { - for (int n = 1; n < argc; n = n + 2) - { - if ((strcmp(argv[n], "-NCYCLES") == 0) && (n + 1 < argc)) - { + if (argc > 1) { + for (int n = 1; n < argc; n = n + 2) { + if ((strcmp(argv[n], "-NCYCLES") == 0) && (n + 1 < argc)) { ncycles = (int64_t) strtol(argv[n + 1], NULL, 0); } - else if ((strcmp(argv[n], "-SOFT") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n], "-SOFT") == 0) && (n + 1 < argc)) { #ifdef USE_ALMOS assert( 0 && "Can't define almos soft name" ); @@ -297,15 +292,12 @@ #endif } - else if ((strcmp(argv[n],"-DISK") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n],"-DISK") == 0) && (n + 1 < argc)) { strcpy(disk_name, argv[n + 1]); } - else if ((strcmp(argv[n],"-DEBUG") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n],"-DEBUG") == 0) && (n + 1 < argc)) { debug_ok = true; debug_from = (int64_t) strtol(argv[n + 1], NULL, 0); } - else if ((strcmp(argv[n], "-MEMCID") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n], "-MEMCID") == 0) && (n + 1 < argc)) { debug_memc_id = (size_t) strtol(argv[n + 1], NULL, 0); #ifdef USE_ALMOS @@ -320,6 +312,5 @@ #endif } - else if ((strcmp(argv[n], "-PROCID") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n], "-PROCID") == 0) && (n + 1 < argc)) { debug_proc_id = (size_t) strtol(argv[n + 1], NULL, 0); #ifdef USE_ALMOS @@ -335,29 +326,23 @@ #endif } - else if ((strcmp(argv[n], "-THREADS") == 0) && ((n + 1) < argc)) - { + else if ((strcmp(argv[n], "-THREADS") == 0) && ((n + 1) < argc)) { threads_nr = (ssize_t) strtol(argv[n + 1], NULL, 0); threads_nr = (threads_nr < 1) ? 1 : threads_nr; } - else if ((strcmp(argv[n], "-FROZEN") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n], "-FROZEN") == 0) && (n + 1 < argc)) { frozen_cycles = (int64_t) strtol(argv[n + 1], NULL, 0); } - else if ((strcmp(argv[n], "-PERIOD") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n], "-PERIOD") == 0) && (n + 1 < argc)) { debug_period = (size_t) strtol(argv[n + 1], NULL, 0); } - else if ((strcmp(argv[n], "--reset-counters") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n], "--reset-counters") == 0) && (n + 1 < argc)) { reset_counters = (int64_t) strtol(argv[n + 1], NULL, 0); do_reset_counters = true; } - else if ((strcmp(argv[n], "--dump-counters") == 0) && (n + 1 < argc)) - { + else if ((strcmp(argv[n], "--dump-counters") == 0) && (n + 1 < argc)) { dump_counters = (int64_t) strtol(argv[n + 1], NULL, 0); do_dump_counters = true; } - else - { + else { std::cout << " Arguments are (key,value) couples." << std::endl; std::cout << " The order is not important." << std::endl; @@ -461,5 +446,5 @@ else if (X_SIZE <= 4) x_width = 2; else if (X_SIZE <= 8) x_width = 3; - else x_width = 4; + else x_width = 4; if (Y_SIZE == 1) y_width = 0; @@ -467,5 +452,5 @@ else if (Y_SIZE <= 4) y_width = 2; else if (Y_SIZE <= 8) y_width = 3; - else y_width = 4; + else y_width = 4; #else @@ -480,8 +465,4 @@ #endif - - // index of cluster containing IOs - cluster_io_id = 0x00bfc00000ULL >> (vci_address_width - x_width - y_width); - ///////////////////// @@ -495,8 +476,6 @@ 0x00FF800000); - for (size_t x = 0; x < X_SIZE; x++) - { - for (size_t y = 0; y < Y_SIZE; y++) - { + for (size_t x = 0; x < X_SIZE; x++) { + for (size_t y = 0; y < Y_SIZE; y++) { sc_uint offset; offset = (sc_uint) cluster(x,y) @@ -518,6 +497,5 @@ IntTab(cluster(x,y), RAM_TGTID), true)); - if ( cluster(x,y) == cluster_io_id ) - { + if (x == X_IO && y == Y_IO) { maptabd.add(Segment("seg_mtty", SEG_TTY_BASE, SEG_TTY_SIZE, IntTab(cluster(x,y),TTY_TGTID), false)); @@ -545,8 +523,6 @@ 0xFFFF000000ULL); - for (size_t x = 0; x < X_SIZE; x++) - { - for (size_t y = 0; y < Y_SIZE ; y++) - { + for (size_t x = 0; x < X_SIZE; x++) { + for (size_t y = 0; y < Y_SIZE ; y++) { sc_uint offset; @@ -672,6 +648,5 @@ #pragma omp for #endif - for (size_t i = 0; i < (X_SIZE * Y_SIZE); i++) - { + for (size_t i = 0; i < (X_SIZE * Y_SIZE); i++) { size_t x = i / Y_SIZE; size_t y = i % Y_SIZE; @@ -704,4 +679,5 @@ y_width, vci_srcid_width - x_width - y_width, // l_id width, + P_WIDTH, RAM_TGTID, XCU_TGTID, @@ -722,5 +698,5 @@ IRQ_PER_PROCESSOR, XRAM_LATENCY, - (cluster(x,y) == cluster_io_id), + x == X_IO && y == Y_IO, FBF_X_SIZE, FBF_Y_SIZE, @@ -752,103 +728,99 @@ // Clock & RESET - for (size_t x = 0; x < (X_SIZE); x++){ - for (size_t y = 0; y < Y_SIZE; y++){ - clusters[x][y]->p_clk (signal_clk); - clusters[x][y]->p_resetn (signal_resetn); + for (int x = 0; x < X_SIZE; x++) { + for (int y = 0; y < Y_SIZE; y++) { + clusters[x][y]->p_clk (signal_clk); + clusters[x][y]->p_resetn (signal_resetn); } } // Inter Clusters horizontal connections - if (X_SIZE > 1) { - for (size_t x = 0; x < (X_SIZE-1); x++) { - for (size_t y = 0; y < (Y_SIZE); y++) { - clusters[x][y]->p_cmd_out[EAST] (signal_dspin_h_cmd_inc[x][y]); - clusters[x+1][y]->p_cmd_in[WEST] (signal_dspin_h_cmd_inc[x][y]); - clusters[x][y]->p_cmd_in[EAST] (signal_dspin_h_cmd_dec[x][y]); - clusters[x+1][y]->p_cmd_out[WEST] (signal_dspin_h_cmd_dec[x][y]); - - clusters[x][y]->p_rsp_out[EAST] (signal_dspin_h_rsp_inc[x][y]); - clusters[x+1][y]->p_rsp_in[WEST] (signal_dspin_h_rsp_inc[x][y]); - clusters[x][y]->p_rsp_in[EAST] (signal_dspin_h_rsp_dec[x][y]); - clusters[x+1][y]->p_rsp_out[WEST] (signal_dspin_h_rsp_dec[x][y]); - - clusters[x][y]->p_m2p_out[EAST] (signal_dspin_h_m2p_inc[x][y]); - clusters[x+1][y]->p_m2p_in[WEST] (signal_dspin_h_m2p_inc[x][y]); - clusters[x][y]->p_m2p_in[EAST] (signal_dspin_h_m2p_dec[x][y]); - clusters[x+1][y]->p_m2p_out[WEST] (signal_dspin_h_m2p_dec[x][y]); - - clusters[x][y]->p_p2m_out[EAST] (signal_dspin_h_p2m_inc[x][y]); - clusters[x+1][y]->p_p2m_in[WEST] (signal_dspin_h_p2m_inc[x][y]); - clusters[x][y]->p_p2m_in[EAST] (signal_dspin_h_p2m_dec[x][y]); - clusters[x+1][y]->p_p2m_out[WEST] (signal_dspin_h_p2m_dec[x][y]); - - clusters[x][y]->p_cla_out[EAST] (signal_dspin_h_cla_inc[x][y]); - clusters[x+1][y]->p_cla_in[WEST] (signal_dspin_h_cla_inc[x][y]); - clusters[x][y]->p_cla_in[EAST] (signal_dspin_h_cla_dec[x][y]); - clusters[x+1][y]->p_cla_out[WEST] (signal_dspin_h_cla_dec[x][y]); - } - } + for (int x = 0; x < X_SIZE - 1; x++) { + for (int y = 0; y < Y_SIZE; y++) { + clusters[x][y]->p_cmd_out[EAST] (signal_dspin_h_cmd_inc[x][y]); + clusters[x + 1][y]->p_cmd_in[WEST] (signal_dspin_h_cmd_inc[x][y]); + clusters[x][y]->p_cmd_in[EAST] (signal_dspin_h_cmd_dec[x][y]); + clusters[x + 1][y]->p_cmd_out[WEST] (signal_dspin_h_cmd_dec[x][y]); + + clusters[x][y]->p_rsp_out[EAST] (signal_dspin_h_rsp_inc[x][y]); + clusters[x + 1][y]->p_rsp_in[WEST] (signal_dspin_h_rsp_inc[x][y]); + clusters[x][y]->p_rsp_in[EAST] (signal_dspin_h_rsp_dec[x][y]); + clusters[x + 1][y]->p_rsp_out[WEST] (signal_dspin_h_rsp_dec[x][y]); + + clusters[x][y]->p_m2p_out[EAST] (signal_dspin_h_m2p_inc[x][y]); + clusters[x + 1][y]->p_m2p_in[WEST] (signal_dspin_h_m2p_inc[x][y]); + clusters[x][y]->p_m2p_in[EAST] (signal_dspin_h_m2p_dec[x][y]); + clusters[x + 1][y]->p_m2p_out[WEST] (signal_dspin_h_m2p_dec[x][y]); + + clusters[x][y]->p_p2m_out[EAST] (signal_dspin_h_p2m_inc[x][y]); + clusters[x + 1][y]->p_p2m_in[WEST] (signal_dspin_h_p2m_inc[x][y]); + clusters[x][y]->p_p2m_in[EAST] (signal_dspin_h_p2m_dec[x][y]); + clusters[x + 1][y]->p_p2m_out[WEST] (signal_dspin_h_p2m_dec[x][y]); + + clusters[x][y]->p_cla_out[EAST] (signal_dspin_h_cla_inc[x][y]); + clusters[x + 1][y]->p_cla_in[WEST] (signal_dspin_h_cla_inc[x][y]); + clusters[x][y]->p_cla_in[EAST] (signal_dspin_h_cla_dec[x][y]); + clusters[x + 1][y]->p_cla_out[WEST] (signal_dspin_h_cla_dec[x][y]); + } } std::cout << std::endl << "Horizontal connections done" << std::endl; // Inter Clusters vertical connections - if (Y_SIZE > 1) { - for (size_t y = 0; y < (Y_SIZE-1); y++) { - for (size_t x = 0; x < X_SIZE; x++) { - clusters[x][y]->p_cmd_out[NORTH] (signal_dspin_v_cmd_inc[x][y]); - clusters[x][y+1]->p_cmd_in[SOUTH] (signal_dspin_v_cmd_inc[x][y]); - clusters[x][y]->p_cmd_in[NORTH] (signal_dspin_v_cmd_dec[x][y]); - clusters[x][y+1]->p_cmd_out[SOUTH] (signal_dspin_v_cmd_dec[x][y]); - - clusters[x][y]->p_rsp_out[NORTH] (signal_dspin_v_rsp_inc[x][y]); - clusters[x][y+1]->p_rsp_in[SOUTH] (signal_dspin_v_rsp_inc[x][y]); - clusters[x][y]->p_rsp_in[NORTH] (signal_dspin_v_rsp_dec[x][y]); - clusters[x][y+1]->p_rsp_out[SOUTH] (signal_dspin_v_rsp_dec[x][y]); - - clusters[x][y]->p_m2p_out[NORTH] (signal_dspin_v_m2p_inc[x][y]); - clusters[x][y+1]->p_m2p_in[SOUTH] (signal_dspin_v_m2p_inc[x][y]); - clusters[x][y]->p_m2p_in[NORTH] (signal_dspin_v_m2p_dec[x][y]); - clusters[x][y+1]->p_m2p_out[SOUTH] (signal_dspin_v_m2p_dec[x][y]); - - clusters[x][y]->p_p2m_out[NORTH] (signal_dspin_v_p2m_inc[x][y]); - clusters[x][y+1]->p_p2m_in[SOUTH] (signal_dspin_v_p2m_inc[x][y]); - clusters[x][y]->p_p2m_in[NORTH] (signal_dspin_v_p2m_dec[x][y]); - clusters[x][y+1]->p_p2m_out[SOUTH] (signal_dspin_v_p2m_dec[x][y]); - - clusters[x][y]->p_cla_out[NORTH] (signal_dspin_v_cla_inc[x][y]); - clusters[x][y+1]->p_cla_in[SOUTH] (signal_dspin_v_cla_inc[x][y]); - clusters[x][y]->p_cla_in[NORTH] (signal_dspin_v_cla_dec[x][y]); - clusters[x][y+1]->p_cla_out[SOUTH] (signal_dspin_v_cla_dec[x][y]); - } - } + for (int y = 0; y < Y_SIZE - 1; y++) { + for (int x = 0; x < X_SIZE; x++) { + clusters[x][y]->p_cmd_out[NORTH] (signal_dspin_v_cmd_inc[x][y]); + clusters[x][y + 1]->p_cmd_in[SOUTH] (signal_dspin_v_cmd_inc[x][y]); + clusters[x][y]->p_cmd_in[NORTH] (signal_dspin_v_cmd_dec[x][y]); + clusters[x][y + 1]->p_cmd_out[SOUTH] (signal_dspin_v_cmd_dec[x][y]); + + clusters[x][y]->p_rsp_out[NORTH] (signal_dspin_v_rsp_inc[x][y]); + clusters[x][y + 1]->p_rsp_in[SOUTH] (signal_dspin_v_rsp_inc[x][y]); + clusters[x][y]->p_rsp_in[NORTH] (signal_dspin_v_rsp_dec[x][y]); + clusters[x][y + 1]->p_rsp_out[SOUTH] (signal_dspin_v_rsp_dec[x][y]); + + clusters[x][y]->p_m2p_out[NORTH] (signal_dspin_v_m2p_inc[x][y]); + clusters[x][y + 1]->p_m2p_in[SOUTH] (signal_dspin_v_m2p_inc[x][y]); + clusters[x][y]->p_m2p_in[NORTH] (signal_dspin_v_m2p_dec[x][y]); + clusters[x][y + 1]->p_m2p_out[SOUTH] (signal_dspin_v_m2p_dec[x][y]); + + clusters[x][y]->p_p2m_out[NORTH] (signal_dspin_v_p2m_inc[x][y]); + clusters[x][y + 1]->p_p2m_in[SOUTH] (signal_dspin_v_p2m_inc[x][y]); + clusters[x][y]->p_p2m_in[NORTH] (signal_dspin_v_p2m_dec[x][y]); + clusters[x][y + 1]->p_p2m_out[SOUTH] (signal_dspin_v_p2m_dec[x][y]); + + clusters[x][y]->p_cla_out[NORTH] (signal_dspin_v_cla_inc[x][y]); + clusters[x][y + 1]->p_cla_in[SOUTH] (signal_dspin_v_cla_inc[x][y]); + clusters[x][y]->p_cla_in[NORTH] (signal_dspin_v_cla_dec[x][y]); + clusters[x][y + 1]->p_cla_out[SOUTH] (signal_dspin_v_cla_dec[x][y]); + } } std::cout << std::endl << "Vertical connections done" << std::endl; // East & West boundary cluster connections - for (size_t y = 0; y < (Y_SIZE); y++) { + for (size_t y = 0; y < Y_SIZE; y++) { clusters[0][y]->p_cmd_in[WEST] (signal_dspin_bound_cmd_in[0][y][WEST]); clusters[0][y]->p_cmd_out[WEST] (signal_dspin_bound_cmd_out[0][y][WEST]); - clusters[X_SIZE-1][y]->p_cmd_in[EAST] (signal_dspin_bound_cmd_in[X_SIZE-1][y][EAST]); - clusters[X_SIZE-1][y]->p_cmd_out[EAST] (signal_dspin_bound_cmd_out[X_SIZE-1][y][EAST]); + clusters[X_SIZE - 1][y]->p_cmd_in[EAST] (signal_dspin_bound_cmd_in[X_SIZE - 1][y][EAST]); + clusters[X_SIZE - 1][y]->p_cmd_out[EAST] (signal_dspin_bound_cmd_out[X_SIZE - 1][y][EAST]); clusters[0][y]->p_rsp_in[WEST] (signal_dspin_bound_rsp_in[0][y][WEST]); clusters[0][y]->p_rsp_out[WEST] (signal_dspin_bound_rsp_out[0][y][WEST]); - clusters[X_SIZE-1][y]->p_rsp_in[EAST] (signal_dspin_bound_rsp_in[X_SIZE-1][y][EAST]); - clusters[X_SIZE-1][y]->p_rsp_out[EAST] (signal_dspin_bound_rsp_out[X_SIZE-1][y][EAST]); + clusters[X_SIZE - 1][y]->p_rsp_in[EAST] (signal_dspin_bound_rsp_in[X_SIZE - 1][y][EAST]); + clusters[X_SIZE - 1][y]->p_rsp_out[EAST] (signal_dspin_bound_rsp_out[X_SIZE - 1][y][EAST]); clusters[0][y]->p_m2p_in[WEST] (signal_dspin_bound_m2p_in[0][y][WEST]); clusters[0][y]->p_m2p_out[WEST] (signal_dspin_bound_m2p_out[0][y][WEST]); - clusters[X_SIZE-1][y]->p_m2p_in[EAST] (signal_dspin_bound_m2p_in[X_SIZE-1][y][EAST]); - clusters[X_SIZE-1][y]->p_m2p_out[EAST] (signal_dspin_bound_m2p_out[X_SIZE-1][y][EAST]); + clusters[X_SIZE - 1][y]->p_m2p_in[EAST] (signal_dspin_bound_m2p_in[X_SIZE - 1][y][EAST]); + clusters[X_SIZE - 1][y]->p_m2p_out[EAST] (signal_dspin_bound_m2p_out[X_SIZE - 1][y][EAST]); clusters[0][y]->p_p2m_in[WEST] (signal_dspin_bound_p2m_in[0][y][WEST]); clusters[0][y]->p_p2m_out[WEST] (signal_dspin_bound_p2m_out[0][y][WEST]); - clusters[X_SIZE-1][y]->p_p2m_in[EAST] (signal_dspin_bound_p2m_in[X_SIZE-1][y][EAST]); - clusters[X_SIZE-1][y]->p_p2m_out[EAST] (signal_dspin_bound_p2m_out[X_SIZE-1][y][EAST]); + clusters[X_SIZE - 1][y]->p_p2m_in[EAST] (signal_dspin_bound_p2m_in[X_SIZE - 1][y][EAST]); + clusters[X_SIZE - 1][y]->p_p2m_out[EAST] (signal_dspin_bound_p2m_out[X_SIZE - 1][y][EAST]); clusters[0][y]->p_cla_in[WEST] (signal_dspin_bound_cla_in[0][y][WEST]); clusters[0][y]->p_cla_out[WEST] (signal_dspin_bound_cla_out[0][y][WEST]); - clusters[X_SIZE-1][y]->p_cla_in[EAST] (signal_dspin_bound_cla_in[X_SIZE-1][y][EAST]); - clusters[X_SIZE-1][y]->p_cla_out[EAST] (signal_dspin_bound_cla_out[X_SIZE-1][y][EAST]); + clusters[X_SIZE - 1][y]->p_cla_in[EAST] (signal_dspin_bound_cla_in[X_SIZE - 1][y][EAST]); + clusters[X_SIZE - 1][y]->p_cla_out[EAST] (signal_dspin_bound_cla_out[X_SIZE - 1][y][EAST]); } @@ -859,26 +831,26 @@ clusters[x][0]->p_cmd_in[SOUTH] (signal_dspin_bound_cmd_in[x][0][SOUTH]); clusters[x][0]->p_cmd_out[SOUTH] (signal_dspin_bound_cmd_out[x][0][SOUTH]); - clusters[x][Y_SIZE-1]->p_cmd_in[NORTH] (signal_dspin_bound_cmd_in[x][Y_SIZE-1][NORTH]); - clusters[x][Y_SIZE-1]->p_cmd_out[NORTH] (signal_dspin_bound_cmd_out[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE - 1]->p_cmd_in[NORTH] (signal_dspin_bound_cmd_in[x][Y_SIZE - 1][NORTH]); + clusters[x][Y_SIZE - 1]->p_cmd_out[NORTH](signal_dspin_bound_cmd_out[x][Y_SIZE - 1][NORTH]); clusters[x][0]->p_rsp_in[SOUTH] (signal_dspin_bound_rsp_in[x][0][SOUTH]); clusters[x][0]->p_rsp_out[SOUTH] (signal_dspin_bound_rsp_out[x][0][SOUTH]); - clusters[x][Y_SIZE-1]->p_rsp_in[NORTH] (signal_dspin_bound_rsp_in[x][Y_SIZE-1][NORTH]); - clusters[x][Y_SIZE-1]->p_rsp_out[NORTH] (signal_dspin_bound_rsp_out[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE - 1]->p_rsp_in[NORTH] (signal_dspin_bound_rsp_in[x][Y_SIZE - 1][NORTH]); + clusters[x][Y_SIZE - 1]->p_rsp_out[NORTH](signal_dspin_bound_rsp_out[x][Y_SIZE - 1][NORTH]); clusters[x][0]->p_m2p_in[SOUTH] (signal_dspin_bound_m2p_in[x][0][SOUTH]); clusters[x][0]->p_m2p_out[SOUTH] (signal_dspin_bound_m2p_out[x][0][SOUTH]); - clusters[x][Y_SIZE-1]->p_m2p_in[NORTH] (signal_dspin_bound_m2p_in[x][Y_SIZE-1][NORTH]); - clusters[x][Y_SIZE-1]->p_m2p_out[NORTH] (signal_dspin_bound_m2p_out[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE - 1]->p_m2p_in[NORTH] (signal_dspin_bound_m2p_in[x][Y_SIZE - 1][NORTH]); + clusters[x][Y_SIZE - 1]->p_m2p_out[NORTH](signal_dspin_bound_m2p_out[x][Y_SIZE - 1][NORTH]); clusters[x][0]->p_p2m_in[SOUTH] (signal_dspin_bound_p2m_in[x][0][SOUTH]); clusters[x][0]->p_p2m_out[SOUTH] (signal_dspin_bound_p2m_out[x][0][SOUTH]); - clusters[x][Y_SIZE-1]->p_p2m_in[NORTH] (signal_dspin_bound_p2m_in[x][Y_SIZE-1][NORTH]); - clusters[x][Y_SIZE-1]->p_p2m_out[NORTH] (signal_dspin_bound_p2m_out[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE - 1]->p_p2m_in[NORTH] (signal_dspin_bound_p2m_in[x][Y_SIZE - 1][NORTH]); + clusters[x][Y_SIZE - 1]->p_p2m_out[NORTH](signal_dspin_bound_p2m_out[x][Y_SIZE - 1][NORTH]); clusters[x][0]->p_cla_in[SOUTH] (signal_dspin_bound_cla_in[x][0][SOUTH]); clusters[x][0]->p_cla_out[SOUTH] (signal_dspin_bound_cla_out[x][0][SOUTH]); - clusters[x][Y_SIZE-1]->p_cla_in[NORTH] (signal_dspin_bound_cla_in[x][Y_SIZE-1][NORTH]); - clusters[x][Y_SIZE-1]->p_cla_out[NORTH] (signal_dspin_bound_cla_out[x][Y_SIZE-1][NORTH]); + clusters[x][Y_SIZE - 1]->p_cla_in[NORTH] (signal_dspin_bound_cla_in[x][Y_SIZE - 1][NORTH]); + clusters[x][Y_SIZE - 1]->p_cla_out[NORTH](signal_dspin_bound_cla_out[x][Y_SIZE - 1][NORTH]); } @@ -893,6 +865,6 @@ GdbServer > * > l1_caches; - for (size_t x = 0; x < X_SIZE; x++) { - for (size_t y = 0; y < Y_SIZE; y++) { + for (int x = 0; x < X_SIZE; x++) { + for (int y = 0; y < Y_SIZE; y++) { for (int proc = 0; proc < NB_PROCS_MAX; proc++) { l1_caches.push_back(clusters[x][y]->proc[proc]); @@ -901,6 +873,6 @@ } - for (size_t x = 0; x < X_SIZE; x++) { - for (size_t y = 0; y < Y_SIZE; y++) { + for (int x = 0; x < X_SIZE; x++) { + for (int y = 0; y < Y_SIZE; y++) { clusters[x][y]->memc->set_vcache_list(l1_caches); } @@ -913,38 +885,34 @@ sc_trace_file * tf = sc_create_vcd_trace_file("my_trace_file"); - if (X_SIZE > 1){ - for (size_t x = 0; x < (X_SIZE-1); x++){ - for (size_t y = 0; y < Y_SIZE; y++){ - for (size_t k = 0; k < 3; k++){ - signal_dspin_h_cmd_inc[x][y][k].trace(tf, "dspin_h_cmd_inc"); - signal_dspin_h_cmd_dec[x][y][k].trace(tf, "dspin_h_cmd_dec"); - } - - for (size_t k = 0; k < 2; k++){ - signal_dspin_h_rsp_inc[x][y][k].trace(tf, "dspin_h_rsp_inc"); - signal_dspin_h_rsp_dec[x][y][k].trace(tf, "dspin_h_rsp_dec"); - } - } - } - } - - if (Y_SIZE > 1) { - for (size_t y = 0; y < (Y_SIZE-1); y++){ - for (size_t x = 0; x < X_SIZE; x++){ - for (size_t k = 0; k < 3; k++){ - signal_dspin_v_cmd_inc[x][y][k].trace(tf, "dspin_v_cmd_inc"); - signal_dspin_v_cmd_dec[x][y][k].trace(tf, "dspin_v_cmd_dec"); - } - - for (size_t k = 0; k < 2; k++){ - signal_dspin_v_rsp_inc[x][y][k].trace(tf, "dspin_v_rsp_inc"); - signal_dspin_v_rsp_dec[x][y][k].trace(tf, "dspin_v_rsp_dec"); - } - } - } - } - - for (size_t x = 0; x < (X_SIZE); x++){ - for (size_t y = 0; y < Y_SIZE; y++){ + for (int x = 0; x < X_SIZE - 1; x++) { + for (int y = 0; y < Y_SIZE; y++) { + for (int k = 0; k < 3; k++) { + signal_dspin_h_cmd_inc[x][y][k].trace(tf, "dspin_h_cmd_inc"); + signal_dspin_h_cmd_dec[x][y][k].trace(tf, "dspin_h_cmd_dec"); + } + + for (int k = 0; k < 2; k++) { + signal_dspin_h_rsp_inc[x][y][k].trace(tf, "dspin_h_rsp_inc"); + signal_dspin_h_rsp_dec[x][y][k].trace(tf, "dspin_h_rsp_dec"); + } + } + } + + for (int y = 0; y < Y_SIZE - 1; y++) { + for (int x = 0; x < X_SIZE; x++) { + for (int k = 0; k < 3; k++) { + signal_dspin_v_cmd_inc[x][y][k].trace(tf, "dspin_v_cmd_inc"); + signal_dspin_v_cmd_dec[x][y][k].trace(tf, "dspin_v_cmd_dec"); + } + + for (int k = 0; k < 2; k++) { + signal_dspin_v_rsp_inc[x][y][k].trace(tf, "dspin_v_rsp_inc"); + signal_dspin_v_rsp_dec[x][y][k].trace(tf, "dspin_v_rsp_dec"); + } + } + } + + for (int x = 0; x < (X_SIZE); x++) { + for (int y = 0; y < Y_SIZE; y++) { std::ostringstream signame; signame << "cluster" << x << "_" << y; @@ -994,4 +962,6 @@ } } + // @M debug fu** + clusters[0][0]->signal_dspin_m2p_proc[2].read = true; sc_start(sc_core::sc_time(1, SC_NS)); @@ -1008,11 +978,8 @@ } - for (int64_t n = 1; n < ncycles && !stop_called; n++) - { - if ((n % max_cycles) == 0) - { - - if (gettimeofday(&t2, NULL) != 0) - { + for (int64_t n = 1; n < ncycles && !stop_called; n++) { + if ((n % max_cycles) == 0) { + + if (gettimeofday(&t2, NULL) != 0) { perror("gettimeofday"); return EXIT_FAILURE; @@ -1047,12 +1014,14 @@ } - if ((n > debug_from) and (n % debug_period == 0)) - { + if ((n > debug_from) and (n % debug_period == 0)) { std::cout << "****************** cycle " << std::dec << n ; std::cout << "************************************************" << std::endl; - for (size_t x = 0; x < X_SIZE ; x++){ - for (size_t y = 0; y < Y_SIZE ; y++){ + for (size_t x = 0; x < X_SIZE ; x++) { + for (size_t y = 0; y < Y_SIZE ; y++) { for (int proc = 0; proc < NB_PROCS_MAX; proc++) { + if (x == 0 && y == 0 && proc == 2) { + continue; + } clusters[x][y]->proc[proc]->print_trace(); std::ostringstream proc_signame; @@ -1141,6 +1110,5 @@ // Free memory - for (size_t i = 0; i < (X_SIZE * Y_SIZE); i++) - { + for (size_t i = 0; i < (X_SIZE * Y_SIZE); i++) { size_t x = i / Y_SIZE; size_t y = i % Y_SIZE; @@ -1148,33 +1116,33 @@ } - dealloc_elems >(signal_dspin_h_cmd_inc, X_SIZE-1, Y_SIZE); - dealloc_elems >(signal_dspin_h_cmd_dec, X_SIZE-1, Y_SIZE); - - dealloc_elems >(signal_dspin_h_rsp_inc, X_SIZE-1, Y_SIZE); - dealloc_elems >(signal_dspin_h_rsp_dec, X_SIZE-1, Y_SIZE); - - dealloc_elems >(signal_dspin_h_m2p_inc, X_SIZE-1, Y_SIZE); - dealloc_elems >(signal_dspin_h_m2p_dec, X_SIZE-1, Y_SIZE); - - dealloc_elems >(signal_dspin_h_p2m_inc, X_SIZE-1, Y_SIZE); - dealloc_elems >(signal_dspin_h_p2m_dec, X_SIZE-1, Y_SIZE); - - dealloc_elems >(signal_dspin_h_cla_inc, X_SIZE-1, Y_SIZE); - dealloc_elems >(signal_dspin_h_cla_dec, X_SIZE-1, Y_SIZE); - - dealloc_elems >(signal_dspin_v_cmd_inc, X_SIZE, Y_SIZE-1); - dealloc_elems >(signal_dspin_v_cmd_dec, X_SIZE, Y_SIZE-1); - - dealloc_elems >(signal_dspin_v_rsp_inc, X_SIZE, Y_SIZE-1); - dealloc_elems >(signal_dspin_v_rsp_dec, X_SIZE, Y_SIZE-1); - - dealloc_elems >(signal_dspin_v_m2p_inc, X_SIZE, Y_SIZE-1); - dealloc_elems >(signal_dspin_v_m2p_dec, X_SIZE, Y_SIZE-1); - - dealloc_elems >(signal_dspin_v_p2m_inc, X_SIZE, Y_SIZE-1); - dealloc_elems >(signal_dspin_v_p2m_dec, X_SIZE, Y_SIZE-1); - - dealloc_elems >(signal_dspin_v_cla_inc, X_SIZE, Y_SIZE-1); - dealloc_elems >(signal_dspin_v_cla_dec, X_SIZE, Y_SIZE-1); + dealloc_elems >(signal_dspin_h_cmd_inc, X_SIZE - 1, Y_SIZE); + dealloc_elems >(signal_dspin_h_cmd_dec, X_SIZE - 1, Y_SIZE); + + dealloc_elems >(signal_dspin_h_rsp_inc, X_SIZE - 1, Y_SIZE); + dealloc_elems >(signal_dspin_h_rsp_dec, X_SIZE - 1, Y_SIZE); + + dealloc_elems >(signal_dspin_h_m2p_inc, X_SIZE - 1, Y_SIZE); + dealloc_elems >(signal_dspin_h_m2p_dec, X_SIZE - 1, Y_SIZE); + + dealloc_elems >(signal_dspin_h_p2m_inc, X_SIZE - 1, Y_SIZE); + dealloc_elems >(signal_dspin_h_p2m_dec, X_SIZE - 1, Y_SIZE); + + dealloc_elems >(signal_dspin_h_cla_inc, X_SIZE - 1, Y_SIZE); + dealloc_elems >(signal_dspin_h_cla_dec, X_SIZE - 1, Y_SIZE); + + dealloc_elems >(signal_dspin_v_cmd_inc, X_SIZE, Y_SIZE - 1); + dealloc_elems >(signal_dspin_v_cmd_dec, X_SIZE, Y_SIZE - 1); + + dealloc_elems >(signal_dspin_v_rsp_inc, X_SIZE, Y_SIZE - 1); + dealloc_elems >(signal_dspin_v_rsp_dec, X_SIZE, Y_SIZE - 1); + + dealloc_elems >(signal_dspin_v_m2p_inc, X_SIZE, Y_SIZE - 1); + dealloc_elems >(signal_dspin_v_m2p_dec, X_SIZE, Y_SIZE - 1); + + dealloc_elems >(signal_dspin_v_p2m_inc, X_SIZE, Y_SIZE - 1); + dealloc_elems >(signal_dspin_v_p2m_dec, X_SIZE, Y_SIZE - 1); + + dealloc_elems >(signal_dspin_v_cla_inc, X_SIZE, Y_SIZE - 1); + dealloc_elems >(signal_dspin_v_cla_dec, X_SIZE, Y_SIZE - 1); dealloc_elems >(signal_dspin_bound_cmd_in, X_SIZE, Y_SIZE, 4); @@ -1204,6 +1172,5 @@ void voidhandler(int dummy = 0) {} -int sc_main (int argc, char *argv[]) -{ +int sc_main (int argc, char *argv[]) { signal(SIGINT, handler); signal(SIGPIPE, voidhandler); @@ -1213,5 +1180,6 @@ } catch (std::exception &e) { std::cout << e.what() << std::endl; - } catch (...) { + } + catch (...) { std::cout << "Unknown exception occured" << std::endl; throw; Index: trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h =================================================================== --- trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h (revision 1022) +++ trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h (revision 1023) @@ -190,4 +190,5 @@ size_t y_width, // y field bits size_t l_width, // l field bits + size_t p_width, size_t tgtid_memc, size_t tgtid_xicu, Index: trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp =================================================================== --- trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp (revision 1022) +++ trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/src/tsar_xbar_cluster.cpp (revision 1023) @@ -50,4 +50,5 @@ size_t y_width, size_t l_width, + size_t p_width, size_t tgtid_memc, size_t tgtid_xicu, @@ -85,7 +86,5 @@ : soclib::caba::BaseModule(insname), p_clk("clk"), - p_resetn("resetn") - -{ + p_resetn("resetn") { n_procs = nb_procs; @@ -114,6 +113,5 @@ ///////////////////////////////////////////////////////////////////////////// - for (size_t p = 0; p < nb_procs; p++) - { + for (size_t p = 0; p < nb_procs; p++) { std::ostringstream sproc; sproc << "proc_" << x_id << "_" << y_id << "_" << p; @@ -123,7 +121,7 @@ GdbServer >( sproc.str().c_str(), - cluster_id * nb_procs + p, // GLOBAL PROC_ID + (cluster_id << p_width) + p, // GLOBAL PROC_ID mtd, // Mapping Table - IntTab(cluster_id,p), // SRCID + IntTab(cluster_id, p), // SRCID (cluster_id << l_width) + p, // CC_GLOBAL_ID 8, // ITLB ways @@ -205,6 +203,5 @@ size_t nb_direct_initiators = nb_procs + 1; size_t nb_direct_targets = 3; - if (io) - { + if (io) { nb_direct_initiators = nb_procs + 3; nb_direct_targets = 10; @@ -321,6 +318,5 @@ // IO cluster components - if (io) - { + if (io) { ///////////////////////////////////////////// brom = new VciSimpleRom( @@ -371,6 +367,5 @@ ///////////////////////////////////////////// std::vector vect_names; - for (size_t tid = 0; tid < nb_ttys; tid++) - { + for (size_t tid = 0; tid < nb_ttys; tid++) { std::ostringstream term_name; term_name << "term" << tid; @@ -406,6 +401,5 @@ // loop on N/S/E/W ports - for (size_t i = 0; i < 4; i++) - { + for (size_t i = 0; i < 4; i++) { router_cmd->p_out[i] (this->p_cmd_out[i]); router_cmd->p_in[i] (this->p_cmd_in[i]); @@ -469,9 +463,9 @@ xbar_d->p_to_initiator[nb_procs] (signal_vci_ini_mdma); - for (size_t p = 0; p < nb_procs; p++) + for (size_t p = 0; p < nb_procs; p++) { xbar_d->p_to_initiator[p] (signal_vci_ini_proc[p]); - - if (io) - { + } + + if (io) { xbar_d->p_to_target[tgtid_mtty] (signal_vci_tgt_mtty); xbar_d->p_to_target[tgtid_brom] (signal_vci_tgt_brom); @@ -494,6 +488,7 @@ xbar_m2p_c->p_global_in (signal_dspin_m2p_g2l_c); xbar_m2p_c->p_local_in[0] (signal_dspin_m2p_memc); - for (size_t p = 0; p < nb_procs; p++) + for (size_t p = 0; p < nb_procs; p++) { xbar_m2p_c->p_local_out[p] (signal_dspin_m2p_proc[p]); + } std::cout << " - M2P Coherence crossbar connected" << std::endl; @@ -505,6 +500,7 @@ xbar_clack_c->p_global_in (signal_dspin_clack_g2l_c); xbar_clack_c->p_local_in[0] (signal_dspin_clack_memc); - for (size_t p = 0; p < nb_procs; p++) + for (size_t p = 0; p < nb_procs; p++) { xbar_clack_c->p_local_out[p] (signal_dspin_clack_proc[p]); + } std::cout << " - Clack Coherence crossbar connected" << std::endl; @@ -516,6 +512,7 @@ xbar_p2m_c->p_global_in (signal_dspin_p2m_g2l_c); xbar_p2m_c->p_local_out[0] (signal_dspin_p2m_memc); - for (size_t p = 0; p < nb_procs; p++) + for (size_t p = 0; p < nb_procs; p++) { xbar_p2m_c->p_local_in[p] (signal_dspin_p2m_proc[p]); + } std::cout << " - P2M Coherence crossbar connected" << std::endl; @@ -523,6 +520,5 @@ //////////////////////////////////// Processors - for (size_t p = 0; p < nb_procs; p++) - { + for (size_t p = 0; p < nb_procs; p++) { proc[p]->p_clk (this->p_clk); proc[p]->p_resetn (this->p_resetn); @@ -532,10 +528,9 @@ proc[p]->p_dspin_clack (signal_dspin_clack_proc[p]); - for ( size_t i = 0; i < irq_per_processor; i++) - { + for ( size_t i = 0; i < irq_per_processor; i++) { proc[p]->p_irq[i] (signal_proc_it[p*irq_per_processor + i]); } - for ( size_t j = irq_per_processor; j < 6; j++) // 6 = number of irqs in the MIPS - { + for ( size_t j = irq_per_processor; j < 6; j++) { + // 6 = number of irqs in the MIPS proc[p]->p_irq[j] (signal_false); } @@ -549,12 +544,10 @@ xicu->p_resetn (this->p_resetn); xicu->p_vci (signal_vci_tgt_xicu); - for (size_t p = 0; p < nb_procs * irq_per_processor; p++) - { + for (size_t p = 0; p < nb_procs * irq_per_processor; p++) { xicu->p_irq[p] (signal_proc_it[p]); } - for (size_t i = 0; i < 32; i++) - { - if (io) // I/O cluster - { + for (size_t i = 0; i < 32; i++) { + if (io) { + // I/O cluster if (i < 8) xicu->p_hwi[i] (signal_false); else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i - 8]); @@ -565,6 +558,6 @@ else xicu->p_hwi[i] (signal_irq_bdev); } - else // other clusters - { + else { + // other clusters if (i < 8) xicu->p_hwi[i] (signal_false); else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i - 8]); @@ -601,6 +594,7 @@ mdma->p_vci_target (signal_vci_tgt_mdma); mdma->p_vci_initiator (signal_vci_ini_mdma); - for (size_t i = 0; i < nb_dmas; i++) + for (size_t i = 0; i < nb_dmas; i++) { mdma->p_irq[i] (signal_irq_mdma[i]); + } std::cout << " - MDMA connected" << std::endl; @@ -608,6 +602,5 @@ /////////////////////////////// Components in I/O cluster - if (io) - { + if (io) { // BDEV bdev->p_clk (this->p_clk); @@ -630,6 +623,5 @@ mnic->p_resetn (this->p_resetn); mnic->p_vci (signal_vci_tgt_mnic); - for (size_t i = 0; i < nic_channels; i++) - { + for (size_t i = 0; i < nic_channels; i++) { mnic->p_rx_irq[i] (signal_irq_mnic_rx[i]); mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); @@ -643,6 +635,5 @@ chbuf->p_vci_target (signal_vci_tgt_chbuf); chbuf->p_vci_initiator (signal_vci_ini_chbuf); - for (size_t i = 0; i < chbufdma_channels; i++) - { + for (size_t i = 0; i < chbufdma_channels; i++) { chbuf->p_irq[i] (signal_irq_chbuf[i]); } @@ -661,6 +652,5 @@ mtty->p_resetn (this->p_resetn); mtty->p_vci (signal_vci_tgt_mtty); - for (size_t i = 0; i < nb_ttys; i++) - { + for (size_t i = 0; i < nb_ttys; i++) { mtty->p_irq[i] (signal_irq_mtty[i]); } @@ -703,6 +693,5 @@ dealloc_elems >(p_cla_out, 4); - for (size_t p = 0; p < n_procs; p++) - { + for (size_t p = 0; p < n_procs; p++) { delete proc[p]; } @@ -720,6 +709,5 @@ delete router_cmd; delete router_rsp; - if (brom != NULL) - { + if (brom != NULL) { delete brom; delete fbuf;