Index: trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h =================================================================== --- trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h (revision 1035) +++ trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h (revision 1036) @@ -972,4 +972,5 @@ sc_signal r_alloc_dir_fsm; + sc_signal r_alloc_dir_last; sc_signal r_alloc_dir_reset_cpt; Index: trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp =================================================================== --- trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (revision 1035) +++ trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (revision 1036) @@ -1018,4 +1018,5 @@ r_cleanup_fsm = CLEANUP_IDLE; r_alloc_dir_fsm = ALLOC_DIR_RESET; + r_alloc_dir_last = ALLOC_DIR_READ; r_alloc_heap_fsm = ALLOC_HEAP_RESET; r_alloc_trt_fsm = ALLOC_TRT_READ; @@ -2464,4 +2465,7 @@ case CONFIG_HEAP_SCAN: // scan HEAP and send inval to CC_SEND FSM { + assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_CONFIG) and + "MEMC ERROR in CONFIG_HEAP_SCAN state: bad HEAP allocation"); + HeapEntry entry = m_heap.read(r_config_heap_next.read()); bool last_copy = (entry.next == r_config_heap_next.read()); @@ -2473,5 +2477,5 @@ assert ( (m_config_to_cc_send_inst_fifo.wok()) and - "MEMC ERROR in CONFIG_HEAP_SCAN: The m_config_to_cc_send fifo should never overflow"); + "MEMC ERROR in CONFIG_HEAP_SCAN: The m_config_to_cc_send fifo overflow"); r_config_heap_next = entry.next; @@ -2502,4 +2506,7 @@ case CONFIG_HEAP_LAST: // HEAP housekeeping { + assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_CONFIG) and + "MEMC ERROR in CONFIG_HEAP_LAST state: bad HEAP allocation"); + size_t free_pointer = m_heap.next_free_ptr(); HeapEntry last_entry; @@ -2570,9 +2577,10 @@ { std::cout << " Read request" - << " : address = " << std::hex << m_cmd_read_addr_fifo.read() - << " / srcid = " << m_cmd_read_srcid_fifo.read() - << " / trdid = " << m_cmd_read_trdid_fifo.read() - << " / pktid = " << m_cmd_read_pktid_fifo.read() - << " / nwords = " << std::dec << m_cmd_read_length_fifo.read() << std::endl; + << " : address = " << std::hex << m_cmd_read_addr_fifo.read() + << " / srcid = " << m_cmd_read_srcid_fifo.read() + << " / trdid = " << m_cmd_read_trdid_fifo.read() + << " / pktid = " << m_cmd_read_pktid_fifo.read() + << " / nwords = " << std::dec << m_cmd_read_length_fifo.read() + << std::endl; } #endif @@ -2592,5 +2600,6 @@ if (m_debug) { - std::cout << " Requesting DIR lock " << std::endl; + std::cout << " Requesting DIR lock " << std::endl; } #endif @@ -2647,8 +2656,8 @@ { std::cout << " Accessing directory: " - << " address = " << std::hex << m_cmd_read_addr_fifo.read() - << " / hit = " << std::dec << entry.valid - << " / count = " < Update directory entry:" - << " addr = " << std::hex << m_cmd_read_addr_fifo.read() - << " / set = " << std::dec << set - << " / way = " << way - << " / owner_id = " << std::hex << entry.owner.srcid - << " / owner_ins = " << std::dec << entry.owner.inst - << " / count = " << entry.count - << " / is_cnt = " << entry.is_cnt << std::endl; + << " addr = " << std::hex << m_cmd_read_addr_fifo.read() + << " / set = " << std::dec << set + << " / way = " << way + << " / owner_id = " << std::hex << entry.owner.srcid + << " / owner_ins = " << std::dec << entry.owner.inst + << " / count = " << entry.count + << " / is_cnt = " << entry.is_cnt << std::endl; } #endif @@ -2740,4 +2749,7 @@ case READ_HEAP_REQ: // Get the lock to the HEAP directory { + assert((r_alloc_dir_fsm.read() == ALLOC_DIR_READ) and + "MEMC ERROR in READ_HEAP_REQ state: Bad DIR allocation"); + if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) { @@ -2749,5 +2761,5 @@ { std::cout << " " - << " Requesting HEAP lock " << std::endl; + << " Requesting HEAP lock " << std::endl; } #endif @@ -2757,93 +2769,90 @@ //////////////////// case READ_HEAP_LOCK: // read data in cache, update the directory - // and prepare the HEAP update - { - if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) - { - // enter counter mode when we reach the limit of copies or the heap is full - bool go_cnt = (r_read_count.read() >= m_max_copies) or m_heap.is_full(); - - // read data in the cache - size_t set = m_y[(addr_t) (m_cmd_read_addr_fifo.read())]; - size_t way = r_read_way.read(); - - m_cache_data.read_line(way, set, r_read_data); - - // update the cache directory - DirectoryEntry entry; - entry.valid = true; - entry.is_cnt = go_cnt; - entry.dirty = r_read_dirty.read(); - entry.tag = r_read_tag.read(); - entry.lock = r_read_lock.read(); - entry.count = r_read_count.read() + 1; - - if (not go_cnt) // Not entering counter mode - { - entry.owner.srcid = r_read_copy.read(); - entry.owner.inst = r_read_copy_inst.read(); - entry.ptr = m_heap.next_free_ptr(); // set pointer on the heap - } - else // Entering Counter mode - { - entry.owner.srcid = 0; - entry.owner.inst = false; - entry.ptr = 0; - } - - m_cache_directory.write(set, way, entry); - - // prepare the heap update (add an entry, or clear the linked list) - if (not go_cnt) // not switching to counter mode - { - // We test if the next free entry in the heap is the last - HeapEntry heap_entry = m_heap.next_free_entry(); - r_read_next_ptr = heap_entry.next; - r_read_last_free = (heap_entry.next == m_heap.next_free_ptr()); - - r_read_fsm = READ_HEAP_WRITE; // add an entry in the HEAP - } - else // switching to counter mode - { - if (r_read_count.read() > 1) // heap must be cleared + // and prepare the HEAP update + { + assert((r_alloc_dir_fsm.read() == ALLOC_DIR_READ) and + "MEMC ERROR in READ_HEAP_LOCK state: Bad DIR allocation"); + + assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) and + "MEMC ERROR in READ_HEAP_LOCK state: Bad HEAP allocation"); + + // enter counter mode when we reach the limit of copies or the heap is full + bool go_cnt = (r_read_count.read() >= m_max_copies) or m_heap.is_full(); + + // read data in the cache + size_t set = m_y[(addr_t) (m_cmd_read_addr_fifo.read())]; + size_t way = r_read_way.read(); + + m_cache_data.read_line(way, set, r_read_data); + + // update the cache directory + DirectoryEntry entry; + entry.valid = true; + entry.is_cnt = go_cnt; + entry.dirty = r_read_dirty.read(); + entry.tag = r_read_tag.read(); + entry.lock = r_read_lock.read(); + entry.count = r_read_count.read() + 1; + + if (not go_cnt) // Not entering counter mode + { + entry.owner.srcid = r_read_copy.read(); + entry.owner.inst = r_read_copy_inst.read(); + entry.ptr = m_heap.next_free_ptr(); // set pointer on the heap + } + else // Entering Counter mode + { + entry.owner.srcid = 0; + entry.owner.inst = false; + entry.ptr = 0; + } + + m_cache_directory.write(set, way, entry); + + // prepare the heap update (add an entry, or clear the linked list) + if (not go_cnt) // not switching to counter mode + { + // We test if the next free entry in the heap is the last + HeapEntry heap_entry = m_heap.next_free_entry(); + r_read_next_ptr = heap_entry.next; + r_read_last_free = (heap_entry.next == m_heap.next_free_ptr()); + + r_read_fsm = READ_HEAP_WRITE; // add an entry in the HEAP + } + else // switching to counter mode + { + if (r_read_count.read() > 1) // heap must be cleared + { + HeapEntry next_entry = m_heap.read(r_read_ptr.read()); + r_read_next_ptr = m_heap.next_free_ptr(); + m_heap.write_free_ptr(r_read_ptr.read()); + + if (next_entry.next == r_read_ptr.read()) // last entry { - HeapEntry next_entry = m_heap.read(r_read_ptr.read()); - r_read_next_ptr = m_heap.next_free_ptr(); - m_heap.write_free_ptr(r_read_ptr.read()); - - if (next_entry.next == r_read_ptr.read()) // last entry - { - r_read_fsm = READ_HEAP_LAST; // erase the entry - } - else // not the last entry - { - r_read_ptr = next_entry.next; - r_read_fsm = READ_HEAP_ERASE; // erase the list - } + r_read_fsm = READ_HEAP_LAST; // erase the entry } - else // the heap is not used / nothing to do + else // not the last entry { - r_read_fsm = READ_RSP; + r_read_ptr = next_entry.next; + r_read_fsm = READ_HEAP_ERASE; // erase the list } } + else // the heap is not used / nothing to do + { + r_read_fsm = READ_RSP; + } + } #if DEBUG_MEMC_READ - if (m_debug) - { - std::cout << " Update directory:" - << " tag = " << std::hex << entry.tag - << " set = " << std::dec << set - << " way = " << way - << " count = " << entry.count - << " is_cnt = " << entry.is_cnt << std::endl; - } -#endif - } - else - { - std::cout << "VCI_MEM_CACHE ERROR " << name() << " READ_HEAP_LOCK" - << "Bad HEAP allocation" << std::endl; - exit(0); - } + if (m_debug) + { + std::cout << " Update directory:" + << " tag = " << std::hex << entry.tag + << " set = " << std::dec << set + << " way = " << way + << " count = " << entry.count + << " is_cnt = " << entry.is_cnt << std::endl; + } +#endif break; } @@ -2851,42 +2860,36 @@ case READ_HEAP_WRITE: // add an entry in the heap { - if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) - { - HeapEntry heap_entry; - heap_entry.owner.srcid = m_cmd_read_srcid_fifo.read(); - heap_entry.owner.inst = ((m_cmd_read_pktid_fifo.read() & 0x2) != 0); - - if (r_read_count.read() == 1) // creation of a new linked list - { - heap_entry.next = m_heap.next_free_ptr(); - } - else // head insertion in existing list - { - heap_entry.next = r_read_ptr.read(); - } - m_heap.write_free_entry(heap_entry); - m_heap.write_free_ptr(r_read_next_ptr.read()); - if (r_read_last_free.read()) - { - m_heap.set_full(); - } - - r_read_fsm = READ_RSP; + assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) and + "MEMC ERROR in READ_HEAP_WRITE state: Bad HEAP allocation"); + + HeapEntry heap_entry; + heap_entry.owner.srcid = m_cmd_read_srcid_fifo.read(); + heap_entry.owner.inst = ((m_cmd_read_pktid_fifo.read() & 0x2) != 0); + + if (r_read_count.read() == 1) // creation of a new linked list + { + heap_entry.next = m_heap.next_free_ptr(); + } + else // head insertion in existing list + { + heap_entry.next = r_read_ptr.read(); + } + m_heap.write_free_entry(heap_entry); + m_heap.write_free_ptr(r_read_next_ptr.read()); + if (r_read_last_free.read()) + { + m_heap.set_full(); + } + + r_read_fsm = READ_RSP; #if DEBUG_MEMC_READ - if (m_debug) - { - std::cout << " Add an entry in the heap:" - << " owner_id = " << std::hex << heap_entry.owner.srcid - << " owner_ins = " << std::dec << heap_entry.owner.inst << std::endl; - } -#endif - } - else - { - std::cout << "VCI_MEM_CACHE ERROR " << name() << " READ_HEAP_WRITE" - << "Bad HEAP allocation" << std::endl; - exit(0); - } + if (m_debug) + { + std::cout << " Add an entry in the heap:" + << " owner_id = " << std::hex << heap_entry.owner.srcid + << " owner_ins = " << std::dec << heap_entry.owner.inst << std::endl; + } +#endif break; } @@ -2894,22 +2897,16 @@ case READ_HEAP_ERASE: { - if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) - { - HeapEntry next_entry = m_heap.read(r_read_ptr.read()); - if (next_entry.next == r_read_ptr.read()) - { - r_read_fsm = READ_HEAP_LAST; - } - else - { - r_read_ptr = next_entry.next; - r_read_fsm = READ_HEAP_ERASE; - } + assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) and + "MEMC ERROR in READ_HEAP_ERASE state: Bad HEAP allocation"); + + HeapEntry next_entry = m_heap.read(r_read_ptr.read()); + if (next_entry.next == r_read_ptr.read()) + { + r_read_fsm = READ_HEAP_LAST; } else { - std::cout << "VCI_MEM_CACHE ERROR " << name() << " READ_HEAP_ERASE" - << "Bad HEAP allocation" << std::endl; - exit(0); + r_read_ptr = next_entry.next; + r_read_fsm = READ_HEAP_ERASE; } break; @@ -2919,28 +2916,22 @@ case READ_HEAP_LAST: { - if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) - { - HeapEntry last_entry; - last_entry.owner.srcid = 0; - last_entry.owner.inst = false; - - if (m_heap.is_full()) - { - last_entry.next = r_read_ptr.read(); - m_heap.unset_full(); - } - else - { - last_entry.next = r_read_next_ptr.read(); - } - m_heap.write(r_read_ptr.read(),last_entry); - r_read_fsm = READ_RSP; + assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_READ) and + "MEMC ERROR in READ_HEAP_LAST state: Bad HEAP allocation"); + + HeapEntry last_entry; + last_entry.owner.srcid = 0; + last_entry.owner.inst = false; + + if (m_heap.is_full()) + { + last_entry.next = r_read_ptr.read(); + m_heap.unset_full(); } else { - std::cout << "VCI_MEM_CACHE ERROR " << name() << " READ_HEAP_LAST" - << "Bad HEAP allocation" << std::endl; - exit(0); - } + last_entry.next = r_read_next_ptr.read(); + } + m_heap.write(r_read_ptr.read(),last_entry); + r_read_fsm = READ_RSP; break; } @@ -3006,7 +2997,7 @@ { std::cout << " Check TRT:" - << " hit_read = " << hit_read - << " / hit_write = " << hit_write - << " / full = " << !wok << std::endl; + << " hit_read = " << hit_read + << " / hit_write = " << hit_write + << " / full = " << !wok << std::endl; } #endif @@ -3017,29 +3008,29 @@ case READ_TRT_SET: // register get transaction in TRT { - if (r_alloc_trt_fsm.read() == ALLOC_TRT_READ) - { - m_trt.set(r_read_trt_index.read(), - true, // GET - m_nline[(addr_t) (m_cmd_read_addr_fifo.read())], - m_cmd_read_srcid_fifo.read(), - m_cmd_read_trdid_fifo.read(), - m_cmd_read_pktid_fifo.read(), - true, // proc read - m_cmd_read_length_fifo.read(), - m_x[(addr_t) (m_cmd_read_addr_fifo.read())], - std::vector (m_words, 0), - std::vector (m_words, 0), - r_read_ll_key.read()); + assert((r_alloc_trt_fsm.read() == ALLOC_TRT_READ) and + "MEMC ERROR in READ_TRT_SET state: Bad TRT allocation"); + + m_trt.set(r_read_trt_index.read(), + true, // GET + m_nline[(addr_t) (m_cmd_read_addr_fifo.read())], + m_cmd_read_srcid_fifo.read(), + m_cmd_read_trdid_fifo.read(), + m_cmd_read_pktid_fifo.read(), + true, // proc read + m_cmd_read_length_fifo.read(), + m_x[(addr_t) (m_cmd_read_addr_fifo.read())], + std::vector (m_words, 0), + std::vector (m_words, 0), + r_read_ll_key.read()); #if DEBUG_MEMC_READ - if (m_debug) - { - std::cout << " Set a GET in TRT:" - << " address = " << std::hex << m_cmd_read_addr_fifo.read() - << " / srcid = " << std::hex << m_cmd_read_srcid_fifo.read() - << std::endl; - } -#endif - r_read_fsm = READ_TRT_REQ; - } + if (m_debug) + { + std::cout << " Set a GET in TRT:" + << " address = " << std::hex << m_cmd_read_addr_fifo.read() + << " / srcid = " << std::hex << m_cmd_read_srcid_fifo.read() + << std::endl; + } +#endif + r_read_fsm = READ_TRT_REQ; break; } @@ -3253,5 +3244,5 @@ { assert((r_alloc_dir_fsm.read() == ALLOC_DIR_WRITE) and - "MEMC ERROR in ALLOC_DIR_LOCK state: Bad DIR allocation"); + "MEMC ERROR in WRITE_DIR_LOCK state: Bad DIR allocation"); size_t way = 0; @@ -3296,8 +3287,8 @@ /////////////////// case WRITE_DIR_HIT: // update the cache directory with Dirty bit - // and update data cache + // and update data cache { assert((r_alloc_dir_fsm.read() == ALLOC_DIR_WRITE) and - "MEMC ERROR in ALLOC_DIR_HIT state: Bad DIR allocation"); + "MEMC ERROR in WRITE_DIR_HIT state: Bad DIR allocation"); DirectoryEntry entry; @@ -3324,6 +3315,6 @@ // no_update is true when there is no need for coherence transaction bool no_update = ((r_write_count.read() == 0) or - (owner and (r_write_count.read() == 1) and - ((r_write_pktid.read() & 0x7) != TYPE_SC))); + (owner and (r_write_count.read() == 1) and + ((r_write_pktid.read() & 0x7) != TYPE_SC))); // write data in the cache if no coherence transaction @@ -3333,6 +3324,5 @@ if ((r_write_pktid.read() & 0x7) == TYPE_SC) { - m_llsc_table.sc(r_write_address.read(), - r_write_sc_key.read()); + m_llsc_table.sc(r_write_address.read(), r_write_sc_key.read()); } @@ -3340,8 +3330,8 @@ { m_cache_data.write(way, - set, - word, - r_write_data[word].read(), - r_write_be[word].read()); + set, + word, + r_write_data[word].read(), + r_write_be[word].read()); } } @@ -3359,5 +3349,5 @@ { if (!r_write_to_cc_send_multi_req.read() and - !r_write_to_cc_send_brdcast_req.read()) + !r_write_to_cc_send_brdcast_req.read()) { r_write_fsm = WRITE_UPT_LOCK; @@ -3392,4 +3382,7 @@ case WRITE_UPT_LOCK: // Try to register the update request in UPT { + assert((r_alloc_dir_fsm.read() == ALLOC_DIR_WRITE) and + "MEMC ERROR in WRITE_UPT_LOCK state: Bad DIR allocation"); + if (r_alloc_upt_fsm.read() == ALLOC_UPT_WRITE) { @@ -3405,13 +3398,13 @@ wok = m_upt.set(true, // it's an update transaction - false, // it's not a broadcast - true, // response required - false, // no acknowledge required - srcid, - trdid, - pktid, - nline, - nb_copies, - index); + false, // it's not a broadcast + true, // response required + false, // no acknowledge required + srcid, + trdid, + pktid, + nline, + nb_copies, + index); if (wok) // write data in cache @@ -3419,6 +3412,5 @@ if ((r_write_pktid.read() & 0x7) == TYPE_SC) { - m_llsc_table.sc(r_write_address.read(), - r_write_sc_key.read()); + m_llsc_table.sc(r_write_address.read(), r_write_sc_key.read()); } @@ -3426,8 +3418,8 @@ { m_cache_data.write(way, - set, - word, - r_write_data[word].read(), - r_write_be[word].read()); + set, + word, + r_write_data[word].read(), + r_write_be[word].read()); } } @@ -3459,5 +3451,6 @@ { std::cout << " Get acces to the HEAP" << std::endl; + << " WRITE_UPT_HEAP_LOCK> Get acces to the HEAP" + << std::endl; } #endif @@ -3469,6 +3462,6 @@ ////////////////// case WRITE_UPT_REQ: // prepare the coherence transaction for the CC_SEND FSM - // and write the first copy in the FIFO - // send the request if only one copy + // and write the first copy in the FIFO + // send the request if only one copy { assert(not r_write_to_cc_send_multi_req.read() and @@ -3789,4 +3782,7 @@ case WRITE_MISS_TRT_SET: // register a new transaction in TRT (Write Buffer) { + assert((r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE) and + "MEMC ERROR in WRITE_MISS_TRT_SET state: Bad TRT allocation"); + if (r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE) { @@ -3827,4 +3823,7 @@ case WRITE_MISS_TRT_DATA: // update an entry in TRT (used as a Write Buffer) { + assert((r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE) and + "MEMC ERROR in WRITE_MISS_TRT_DATA state: Bad TRT allocation"); + if (r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE) { @@ -4009,5 +4008,5 @@ //////////////////////// case WRITE_BC_DIR_INVAL: // Register a put transaction in TRT - // and invalidate the line in directory + // and invalidate the line in directory { assert((r_alloc_dir_fsm.read() == ALLOC_DIR_WRITE) and @@ -4385,6 +4384,8 @@ if (m_debug) { - std::cout << " PUT request:" << std::hex - << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl; + std::cout << " PUT request:" << std::hex + << " address = " << r_ixr_cmd_address.read() + + (r_ixr_cmd_word.read()<<2) << std::endl; } #endif @@ -4398,6 +4399,8 @@ if (m_debug) { - std::cout << " GET request:" << std::hex - << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl; + std::cout << " GET request:" << std::hex + << " address = " << r_ixr_cmd_address.read() + + (r_ixr_cmd_word.read()<<2) << std::endl; } #endif @@ -4426,6 +4429,8 @@ if (m_debug) { - std::cout << " PUT request:" << std::hex - << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read() << 2) << std::endl; + std::cout << " PUT request:" << std::hex + << " address = " << r_ixr_cmd_address.read() + + (r_ixr_cmd_word.read() << 2) << std::endl; } #endif @@ -4439,6 +4444,8 @@ if (m_debug) { - std::cout << " GET request:" << std::hex - << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read() << 2) << std::endl; + std::cout << " GET request:" << std::hex + << " address = " << r_ixr_cmd_address.read() + + (r_ixr_cmd_word.read() << 2) << std::endl; } #endif @@ -4465,6 +4472,8 @@ if (m_debug) { - std::cout << " PUT request:" << std::hex - << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read() << 2) << std::endl; + std::cout << " PUT request:" << std::hex + << " address = " << r_ixr_cmd_address.read() + + (r_ixr_cmd_word.read() << 2) << std::endl; } #endif @@ -4490,6 +4499,8 @@ if (m_debug) { - std::cout << " PUT request:" << std::hex - << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl; + std::cout << " PUT request:" << std::hex + << " address = " << r_ixr_cmd_address.read() + + (r_ixr_cmd_word.read()<<2) << std::endl; } #endif @@ -4519,6 +4530,4 @@ // signal is set to inform the XRAM_RSP FSM. /////////////////////////////////////////////////////////////////////////////// - - //std::cout << std::endl << "ixr_rsp_fsm" << std::endl; switch(r_ixr_rsp_fsm.read()) @@ -5813,9 +5822,7 @@ /////////////////////////////////////////////////////////////////////////////////// - //std::cout << std::endl << "cas_fsm" << std::endl; - switch (r_cas_fsm.read()) { - //////////// + ////////////// case CAS_IDLE: // fill the local rdata buffers { @@ -5827,9 +5834,9 @@ { std::cout << " CAS command: " << std::hex - << " srcid = " << std::dec << m_cmd_cas_srcid_fifo.read() - << " addr = " << std::hex << m_cmd_cas_addr_fifo.read() - << " wdata = " << m_cmd_cas_wdata_fifo.read() - << " eop = " << std::dec << m_cmd_cas_eop_fifo.read() - << " cpt = " << std::dec << r_cas_cpt.read() << std::endl; + << " srcid = " << std::dec << m_cmd_cas_srcid_fifo.read() + << " addr = " << std::hex << m_cmd_cas_addr_fifo.read() + << " wdata = " << m_cmd_cas_wdata_fifo.read() + << " eop = " << std::dec << m_cmd_cas_eop_fifo.read() + << " cpt = " << std::dec << r_cas_cpt.read() << std::endl; } #endif @@ -5877,10 +5884,11 @@ if (m_debug) { - std::cout << " Requesting DIR lock " << std::endl; - } -#endif - break; - } - ///////////////// + std::cout << " Requesting DIR lock " << std::endl; + } +#endif + break; + } + ////////////////// case CAS_DIR_LOCK: // Read the directory { @@ -5906,9 +5914,10 @@ if (m_debug) { - std::cout << " Directory acces" - << " / address = " << std::hex << m_cmd_cas_addr_fifo.read() - << " / hit = " << std::dec << entry.valid - << " / count = " << entry.count - << " / is_cnt = " << entry.is_cnt << std::endl; + std::cout << " Directory acces" + << " / address = " << std::hex << m_cmd_cas_addr_fifo.read() + << " / hit = " << std::dec << entry.valid + << " / count = " << entry.count + << " / is_cnt = " << entry.is_cnt << std::endl; } #endif @@ -5948,6 +5957,7 @@ if (m_debug) { - std::cout << " Read data from " - << " cache and store it in buffer" << std::endl; + std::cout << " Read data from " + << " cache and store it in buffer" << std::endl; } #endif @@ -5975,8 +5985,9 @@ if (m_debug) { - std::cout << " Compare old and new data" - << " / expected value = " << std::hex << r_cas_rdata[0].read() - << " / actual value = " << std::hex << r_cas_data[word].read() - << " / forced_fail = " << std::dec << forced_fail << std::endl; + std::cout << " Compare old and new data" + << " / expected value = " << std::hex << r_cas_rdata[0].read() + << " / actual value = " << std::hex << r_cas_data[word].read() + << " / forced_fail = " << std::dec << forced_fail << std::endl; } #endif @@ -6004,6 +6015,6 @@ { std::cout << " " - << " Broacast Inval required" - << " / copies = " << r_cas_count.read() << std::endl; + << " Broacast Inval required" + << " / copies = " << r_cas_count.read() << std::endl; } #endif @@ -6017,7 +6028,7 @@ if (m_debug) { - std::cout << " " - << " Multi Inval required" - << " / copies = " << r_cas_count.read() << std::endl; + std::cout << " Multi Inval required" + << " / copies = " << r_cas_count.read() << std::endl; } #endif @@ -6030,6 +6041,7 @@ if (m_debug) { - std::cout << " " - << " CC_SEND FSM busy: release all locks and retry" << std::endl; + std::cout << " CC_SEND FSM busy: " + << "release all locks and retry" << std::endl; } #endif @@ -6054,11 +6066,12 @@ if (m_debug) { - std::cout << " Update cache:" - << " way = " << std::dec << way - << " / set = " << set - << " / word = " << word - << " / value = " << r_cas_wdata.read() - << " / count = " << r_cas_count.read() - << " / global_llsc_table access" << std::endl; + std::cout << " Update cache:" + << " way = " << std::dec << way + << " / set = " << set + << " / word = " << word + << " / value = " << r_cas_wdata.read() + << " / count = " << r_cas_count.read() + << " / global_llsc_table access" << std::endl; } #endif @@ -6068,6 +6081,6 @@ ///////////////// case CAS_UPT_LOCK: // try to register the transaction in UPT - // and write data in cache if successful registration - // releases locks to retry later if UPT full + // and write data in cache if successful registration + // releases locks to retry later if UPT full { if (r_alloc_upt_fsm.read() == ALLOC_UPT_CAS) @@ -6082,13 +6095,13 @@ wok = m_upt.set(true, // it's an update transaction - false, // it's not a broadcast - true, // response required - false, // no acknowledge required - srcid, - trdid, - pktid, - nline, - nb_copies, - index); + false, // it's not a broadcast + true, // response required + false, // no acknowledge required + srcid, + trdid, + pktid, + nline, + nb_copies, + index); if (wok) // coherence transaction registered in UPT { @@ -6116,8 +6129,8 @@ { std::cout << " Register multi-update transaction in UPT" - << " / wok = " << wok - << " / address = " << std::hex << nline * m_words * 4 - << " / count = " << nb_copies << std::endl; + << " CAS_UPT_LOCK> Register multi-update transaction in UPT" + << " / wok = " << wok + << " / address = " << std::hex << nline * m_words * 4 + << " / count = " << nb_copies << std::endl; } #endif @@ -6132,5 +6145,6 @@ if (m_debug) { - std::cout << " Release all locks" << std::endl; + std::cout << " Release all locks" << std::endl; } #endif @@ -6139,5 +6153,5 @@ } ////////////////////// - case CAS_UPT_HEAP_LOCK: // lock the heap + case CAS_UPT_HEAP_LOCK: // get the lock protecting the heap { if (r_alloc_heap_fsm.read() == ALLOC_HEAP_CAS) @@ -6148,5 +6162,5 @@ { std::cout << " Get access to the heap" << std::endl; + << " CAS_UPT_HEAP_LOCK> Get access to the heap" << std::endl; } #endif @@ -6159,5 +6173,5 @@ { assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_CAS) and - "VCI_MEM_CACHE ERROR : bad HEAP allocation"); + "MEMC ERROR in state CAS_UPT_REQ: bad HEAP allocation"); if (!r_cas_to_cc_send_multi_req.read() and !r_cas_to_cc_send_brdcast_req.read()) @@ -6200,19 +6214,20 @@ if (m_debug) { - std::cout << " Send the first update request to CC_SEND FSM " - << " / address = " << std::hex << m_cmd_cas_addr_fifo.read() - << " / wdata = " << std::hex << r_cas_wdata.read() - << " / srcid = " << std::dec << r_cas_copy.read() - << " / inst = " << std::dec << r_cas_copy_inst.read() << std::endl; - } -#endif - } - break; - } - ///////////////// + std::cout << " Send the first update request to CC_SEND FSM " + << " / address = " << std::hex << m_cmd_cas_addr_fifo.read() + << " / wdata = " << std::hex << r_cas_wdata.read() + << " / srcid = " << std::dec << r_cas_copy.read() + << " / inst = " << std::dec << r_cas_copy_inst.read() << std::endl; + } +#endif + } + break; + } + ////////////////// case CAS_UPT_NEXT: // send a multi-update request to CC_SEND FSM { assert((r_alloc_heap_fsm.read() == ALLOC_HEAP_CAS) - and "VCI_MEM_CACHE ERROR : bad HEAP allocation"); + and "MEMC ERROR in state CAS_UPT_NEXT : bad HEAP allocation"); HeapEntry entry = m_heap.read(r_cas_ptr.read()); @@ -6228,5 +6243,5 @@ r_cas_to_cc_send_multi_req = true; r_cas_fsm = CAS_IDLE; // Response will be sent after receiving - // all update responses + // all update responses cmd_cas_fifo_get = true; r_cas_cpt = 0; @@ -6237,9 +6252,10 @@ if (m_debug) { - std::cout << " Send the next update request to CC_SEND FSM " - << " / address = " << std::hex << m_cmd_cas_addr_fifo.read() - << " / wdata = " << std::hex << r_cas_wdata.read() - << " / srcid = " << std::dec << entry.owner.srcid - << " / inst = " << std::dec << entry.owner.inst << std::endl; + std::cout << " Send the next update request to CC_SEND FSM " + << " / address = " << std::hex << m_cmd_cas_addr_fifo.read() + << " / wdata = " << std::hex << r_cas_wdata.read() + << " / srcid = " << std::dec << entry.owner.srcid + << " / inst = " << std::dec << entry.owner.inst << std::endl; } #endif @@ -6269,6 +6285,8 @@ if (m_debug) { - std::cout << " Check TRT" - << " : wok = " << wok << " / index = " << wok_index << std::endl; + std::cout << " Check TRT" + << " : wok = " << wok + << " / index = " << wok_index << std::endl; } #endif @@ -6297,18 +6315,19 @@ wok = m_ivt.set(false, // it's an inval transaction - true, // it's a broadcast - true, // response required - false, // no acknowledge required - srcid, - trdid, - pktid, - nline, - nb_copies, - index); + true, // it's a broadcast + true, // response required + false, // no acknowledge required + srcid, + trdid, + pktid, + nline, + nb_copies, + index); #if DEBUG_MEMC_CAS if (m_debug and wok) { - std::cout << " Register broadcast inval in IVT" - << " / copies = " << r_cas_count.read() << std::endl; + std::cout << " Register broadcast inval in IVT" + << " / copies = " << r_cas_count.read() << std::endl; } #endif @@ -6355,14 +6374,14 @@ } m_trt.set(r_cas_trt_index.read(), - false, // PUT request - m_nline[(addr_t)(m_cmd_cas_addr_fifo.read())], - 0, - 0, - 0, - false, // not a processor read - 0, - 0, - std::vector (m_words,0), - data_vector); + false, // PUT request + m_nline[(addr_t)(m_cmd_cas_addr_fifo.read())], + 0, + 0, + 0, + false, // not a processor read + 0, + 0, + std::vector (m_words,0), + data_vector); // invalidate directory entry @@ -6387,6 +6406,7 @@ if (m_debug) { - std::cout << " Inval DIR & register in TRT:" - << " address = " << m_cmd_cas_addr_fifo.read() << std::endl; + std::cout << " Inval DIR & register in TRT:" + << " address = " << m_cmd_cas_addr_fifo.read() << std::endl; } #endif @@ -6412,5 +6432,6 @@ { std::cout << " Post a broadcast request to CC_SEND FSM" << std::endl; + << " CAS_BC_CC_SEND> Post a broadcast request to CC_SEND FSM" + << std::endl; } #endif @@ -6433,7 +6454,7 @@ { std::cout << " Request a PUT transaction to IXR_CMD FSM" << std::hex - << " / address = " << (addr_t) m_cmd_cas_addr_fifo.read() - << " / trt_index = " << r_cas_trt_index.read() << std::endl; + << " CAS_BC_XRAM_REQ> Request a PUT transaction to IXR_CMD FSM" + << std::hex << " / address = " << (addr_t) m_cmd_cas_addr_fifo.read() + << " / trt_index = " << r_cas_trt_index.read() << std::endl; } #endif @@ -6458,5 +6479,6 @@ if (m_debug) std::cout << " Request TGT_RSP to send a failure response" << std::endl; + << " CAS_RSP_FAIL> Request TGT_RSP to send a failure response" + << std::endl; #endif } @@ -6481,5 +6503,6 @@ { std::cout << " Request TGT_RSP to send a success response" << std::endl; + << " CAS_RSP_SUCCESS> Request TGT_RSP to send a success response" + << std::endl; } #endif @@ -6503,8 +6526,8 @@ { std::cout << " Check TRT state" - << " / hit_read = " << hit_read - << " / hit_write = " << hit_write - << " / wok = " << wok - << " / index = " << index << std::endl; + << " / hit_read = " << hit_read + << " / hit_write = " << hit_write + << " / wok = " << wok + << " / index = " << index << std::endl; } #endif @@ -6539,14 +6562,14 @@ m_trt.set(r_cas_trt_index.read(), - true, // GET - m_nline[(addr_t) m_cmd_cas_addr_fifo.read()], - m_cmd_cas_srcid_fifo.read(), - m_cmd_cas_trdid_fifo.read(), - m_cmd_cas_pktid_fifo.read(), - false, // write request from processor - 0, - 0, - std::vector(m_words, 0), - std::vector(m_words, 0)); + true, // GET + m_nline[(addr_t) m_cmd_cas_addr_fifo.read()], + m_cmd_cas_srcid_fifo.read(), + m_cmd_cas_trdid_fifo.read(), + m_cmd_cas_pktid_fifo.read(), + false, // write request from processor + 0, + 0, + std::vector(m_words, 0), + std::vector(m_words, 0)); r_cas_fsm = CAS_MISS_XRAM_REQ; @@ -6555,7 +6578,8 @@ if (m_debug) { - std::cout << " Register GET transaction in TRT" - << " / address = " << std::hex << (addr_t)m_cmd_cas_addr_fifo.read() - << " / trt_index = " << std::dec << r_cas_trt_index.read() << std::endl; + std::cout << " Register GET transaction in TRT" + << " / address = " << std::hex << (addr_t)m_cmd_cas_addr_fifo.read() + << " / trt_index = " << std::dec << r_cas_trt_index.read() << std::endl; } #endif @@ -6574,7 +6598,8 @@ if (m_debug) { - std::cout << " Request a GET transaction" - << " / address = " << std::hex << (addr_t) m_cmd_cas_addr_fifo.read() - << " / trt_index = " << std::dec << r_cas_trt_index.read() << std::endl; + std::cout << " Request a GET transaction" + << " / address = " << std::hex << (addr_t) m_cmd_cas_addr_fifo.read() + << " / trt_index = " << std::dec << r_cas_trt_index.read() << std::endl; } #endif @@ -7852,18 +7877,30 @@ //////////////////////////////////////////////////////////////////////////////////// // The ALLOC_DIR FSM allocates the access to the directory and - // the data cache with a round robin priority between 6 user FSMs : - // The cyclic ordering is CONFIG > READ > WRITE > CAS > CLEANUP > XRAM_RSP - // The ressource is always allocated. + // the data cache with a higher priority for the XRAM_RSP FSM, + // and a round robin priority between the five other FSMs : + // (the cyclic ordering is READ > WRITE > CAS > CONFIG > CLEANUP) + // To maximize the throughput, the ressource is always allocated. + // A new allocation is done when the owner FSM does not access the cache. + // - The r_alloc_dir_fsm register define the current owner. + // - The r_alloc_dir_last register define the previous owner for round robin. ///////////////////////////////////////////////////////////////////////////////////// - //std::cout << std::endl << "alloc_dir_fsm" << std::endl; - + // compute the request conditions for the 6 FSMs + bool dir_req_config = (r_config_fsm.read() == CONFIG_DIR_REQ); + bool dir_req_read = (r_read_fsm.read() == READ_DIR_REQ); + bool dir_req_write = (r_write_fsm.read() == WRITE_DIR_REQ); + bool dir_req_cas = (r_cas_fsm.read() == CAS_DIR_REQ); + bool dir_req_cleanup = (r_cleanup_fsm.read() == CLEANUP_DIR_REQ); + bool dir_req_xram_rsp = (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK); + + // compute dir_allocate, that is actually a release condition: + // allocation can be done if the owner FSM doest not use the cache + bool dir_allocate = false; + int dir_last; switch(r_alloc_dir_fsm.read()) { - ///////////////////// - case ALLOC_DIR_RESET: // Initializes the directory one SET per cycle. - // All the WAYS of a SET initialized in parallel - - r_alloc_dir_reset_cpt.write(r_alloc_dir_reset_cpt.read() + 1); + case ALLOC_DIR_RESET: // Initializes the directory one cycle per set + { + r_alloc_dir_reset_cpt = r_alloc_dir_reset_cpt.read() + 1; if (r_alloc_dir_reset_cpt.read() == (m_sets - 1)) @@ -7873,35 +7910,10 @@ } break; - - ////////////////////// - case ALLOC_DIR_CONFIG: // allocated to CONFIG FSM - if ((r_config_fsm.read() != CONFIG_DIR_REQ) and - (r_config_fsm.read() != CONFIG_DIR_ACCESS) and - (r_config_fsm.read() != CONFIG_TRT_LOCK) and - (r_config_fsm.read() != CONFIG_TRT_SET) and - (r_config_fsm.read() != CONFIG_IVT_LOCK)) - { - if (r_read_fsm.read() == READ_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_READ; - - else if (r_write_fsm.read() == WRITE_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_WRITE; - - else if (r_cas_fsm.read() == CAS_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CAS; - - else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; - - else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) - r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; - } - break; - - //////////////////// - case ALLOC_DIR_READ: // allocated to READ FSM - if (((r_read_fsm.read() != READ_DIR_REQ) and - (r_read_fsm.read() != READ_DIR_LOCK) and - (r_read_fsm.read() != READ_TRT_LOCK) and + } + case ALLOC_DIR_READ: // owner is READ FSM + { + if (((r_read_fsm.read() != READ_DIR_REQ) and + (r_read_fsm.read() != READ_DIR_LOCK) and + (r_read_fsm.read() != READ_TRT_LOCK) and (r_read_fsm.read() != READ_HEAP_REQ)) or @@ -7909,31 +7921,19 @@ (r_alloc_trt_fsm.read() == ALLOC_TRT_READ))) { - if (r_write_fsm.read() == WRITE_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_WRITE; - - else if (r_cas_fsm.read() == CAS_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CAS; - - else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; - - else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) - r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; - - else if (r_config_fsm.read() == CONFIG_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CONFIG; - } - break; - - ///////////////////// - case ALLOC_DIR_WRITE: // allocated to WRITE FSM - if (((r_write_fsm.read() != WRITE_DIR_REQ) and - (r_write_fsm.read() != WRITE_DIR_LOCK) and - (r_write_fsm.read() != WRITE_BC_DIR_READ) and - (r_write_fsm.read() != WRITE_DIR_HIT) and - (r_write_fsm.read() != WRITE_BC_TRT_LOCK) and - (r_write_fsm.read() != WRITE_BC_IVT_LOCK) and + dir_last = ALLOC_DIR_READ; + dir_allocate = true; + } + break; + } + case ALLOC_DIR_WRITE: // owner is WRITE FSM + { + if (((r_write_fsm.read() != WRITE_DIR_REQ) and + (r_write_fsm.read() != WRITE_DIR_LOCK) and + (r_write_fsm.read() != WRITE_DIR_HIT) and + (r_write_fsm.read() != WRITE_UPT_LOCK) and + (r_write_fsm.read() != WRITE_BC_DIR_READ) and + (r_write_fsm.read() != WRITE_BC_TRT_LOCK) and + (r_write_fsm.read() != WRITE_BC_IVT_LOCK) and (r_write_fsm.read() != WRITE_MISS_TRT_LOCK) and - (r_write_fsm.read() != WRITE_UPT_LOCK) and (r_write_fsm.read() != WRITE_UPT_HEAP_LOCK)) or @@ -7944,32 +7944,20 @@ (r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE))) { - if (r_cas_fsm.read() == CAS_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CAS; - - else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; - - else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) - r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; - - else if (r_config_fsm.read() == CONFIG_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CONFIG; - - else if (r_read_fsm.read() == READ_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_READ; - } - break; - - /////////////////// - case ALLOC_DIR_CAS: // allocated to CAS FSM - if (((r_cas_fsm.read() != CAS_DIR_REQ) and - (r_cas_fsm.read() != CAS_DIR_LOCK) and - (r_cas_fsm.read() != CAS_DIR_HIT_READ) and + dir_last = ALLOC_DIR_WRITE; + dir_allocate = true; + } + break; + } + case ALLOC_DIR_CAS: // owner is CAS FSM + { + if (((r_cas_fsm.read() != CAS_DIR_REQ) and + (r_cas_fsm.read() != CAS_DIR_LOCK) and + (r_cas_fsm.read() != CAS_DIR_HIT_READ) and (r_cas_fsm.read() != CAS_DIR_HIT_COMPARE) and - (r_cas_fsm.read() != CAS_DIR_HIT_WRITE) and - (r_cas_fsm.read() != CAS_BC_TRT_LOCK) and - (r_cas_fsm.read() != CAS_BC_IVT_LOCK) and - (r_cas_fsm.read() != CAS_MISS_TRT_LOCK) and - (r_cas_fsm.read() != CAS_UPT_LOCK) and + (r_cas_fsm.read() != CAS_DIR_HIT_WRITE) and + (r_cas_fsm.read() != CAS_UPT_LOCK) and + (r_cas_fsm.read() != CAS_BC_TRT_LOCK) and + (r_cas_fsm.read() != CAS_BC_IVT_LOCK) and + (r_cas_fsm.read() != CAS_MISS_TRT_LOCK) and (r_cas_fsm.read() != CAS_UPT_HEAP_LOCK)) or @@ -7980,23 +7968,24 @@ (r_alloc_trt_fsm.read() == ALLOC_TRT_CAS))) { - if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; - - else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) - r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; - - else if (r_config_fsm.read() == CONFIG_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CONFIG; - - else if (r_read_fsm.read() == READ_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_READ; - - else if (r_write_fsm.read() == WRITE_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_WRITE; - } - break; - - /////////////////////// - case ALLOC_DIR_CLEANUP: // allocated to CLEANUP FSM + dir_last = ALLOC_DIR_CAS; + dir_allocate = true; + } + break; + } + case ALLOC_DIR_CONFIG: // owner is CONFIG FSM + { + if ((r_config_fsm.read() != CONFIG_DIR_REQ) and + (r_config_fsm.read() != CONFIG_DIR_ACCESS) and + (r_config_fsm.read() != CONFIG_TRT_LOCK) and + (r_config_fsm.read() != CONFIG_TRT_SET) and + (r_config_fsm.read() != CONFIG_IVT_LOCK)) + { + dir_last = ALLOC_DIR_CONFIG; + dir_allocate = true; + } + break; + } + case ALLOC_DIR_CLEANUP: // owner is CLEANUP FSM + { if ((r_cleanup_fsm.read() != CLEANUP_DIR_REQ) and (r_cleanup_fsm.read() != CLEANUP_DIR_LOCK) and @@ -8004,45 +7993,74 @@ (r_cleanup_fsm.read() != CLEANUP_HEAP_LOCK)) { - if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK) - r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; - - else if (r_config_fsm.read() == CONFIG_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CONFIG; - - else if (r_read_fsm.read() == READ_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_READ; - - else if (r_write_fsm.read() == WRITE_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_WRITE; - - else if (r_cas_fsm.read() == CAS_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CAS; - } - break; - - //////////////////////// - case ALLOC_DIR_XRAM_RSP: // allocated to XRAM_RSP FSM + dir_last = ALLOC_DIR_CLEANUP; + dir_allocate = true; + } + + break; + } + case ALLOC_DIR_XRAM_RSP: // owner is XRAM_RSP FSM + { if ((r_xram_rsp_fsm.read() != XRAM_RSP_DIR_LOCK) and (r_xram_rsp_fsm.read() != XRAM_RSP_TRT_COPY) and (r_xram_rsp_fsm.read() != XRAM_RSP_IVT_LOCK)) { - if (r_config_fsm.read() == CONFIG_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CONFIG; - - else if (r_read_fsm.read() == READ_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_READ; - - else if (r_write_fsm.read() == WRITE_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_WRITE; - - else if (r_cas_fsm.read() == CAS_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CAS; - - else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ) - r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; - } - break; - - } // end switch alloc_dir_fsm + dir_last = r_alloc_dir_last.read(); + dir_allocate = true; + } + break; + } + } // end switch r_alloc_dir_fsm + + // set r_alloc_dir_fsm and r_alloc_dir_last registers if required + if ( dir_allocate ) + { + // register last owner for round-robin allocation + r_alloc_dir_last = dir_last; + + // higher priority for XRAM_FSM + if ( dir_req_xram_rsp ) r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP; + + // round-robin priority for READ > WRITE > CAS > CONFIG > CLEANUP + else if ( dir_last == ALLOC_DIR_READ ) + { + if (dir_req_write) r_alloc_dir_fsm = ALLOC_DIR_WRITE; + else if (dir_req_cas) r_alloc_dir_fsm = ALLOC_DIR_CAS; + else if (dir_req_config) r_alloc_dir_fsm = ALLOC_DIR_CONFIG; + else if (dir_req_cleanup) r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; + else if (dir_req_read) r_alloc_dir_fsm = ALLOC_DIR_READ; + } + else if ( dir_last == ALLOC_DIR_WRITE ) + { + if (dir_req_cas) r_alloc_dir_fsm = ALLOC_DIR_CAS; + else if (dir_req_config) r_alloc_dir_fsm = ALLOC_DIR_CONFIG; + else if (dir_req_cleanup) r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; + else if (dir_req_read) r_alloc_dir_fsm = ALLOC_DIR_READ; + else if (dir_req_write) r_alloc_dir_fsm = ALLOC_DIR_WRITE; + } + else if ( dir_last == ALLOC_DIR_CAS ) + { + if (dir_req_config) r_alloc_dir_fsm = ALLOC_DIR_CONFIG; + else if (dir_req_cleanup) r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; + else if (dir_req_read) r_alloc_dir_fsm = ALLOC_DIR_READ; + else if (dir_req_write) r_alloc_dir_fsm = ALLOC_DIR_WRITE; + else if (dir_req_cas) r_alloc_dir_fsm = ALLOC_DIR_CAS; + } + else if ( dir_last == ALLOC_DIR_CONFIG ) + { + if (dir_req_cleanup) r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; + else if (dir_req_read) r_alloc_dir_fsm = ALLOC_DIR_READ; + else if (dir_req_write) r_alloc_dir_fsm = ALLOC_DIR_WRITE; + else if (dir_req_cas) r_alloc_dir_fsm = ALLOC_DIR_CAS; + else if (dir_req_config) r_alloc_dir_fsm = ALLOC_DIR_CONFIG; + } + else if ( dir_last == ALLOC_DIR_CLEANUP ) + { + if (dir_req_read) r_alloc_dir_fsm = ALLOC_DIR_READ; + else if (dir_req_write) r_alloc_dir_fsm = ALLOC_DIR_WRITE; + else if (dir_req_cas) r_alloc_dir_fsm = ALLOC_DIR_CAS; + else if (dir_req_config) r_alloc_dir_fsm = ALLOC_DIR_CONFIG; + else if (dir_req_cleanup) r_alloc_dir_fsm = ALLOC_DIR_CLEANUP; + } + } // end if dir_allocate //////////////////////////////////////////////////////////////////////////////////// @@ -8061,35 +8079,24 @@ /////////////////////////////////////////////////////////////////////////////////// - size_t index = 0; - - bool trt_req_read = (r_read_fsm.read() == READ_TRT_LOCK) and - not m_trt.full(index); - - bool trt_req_write = ((r_write_fsm.read() == WRITE_MISS_TRT_LOCK) or - (r_write_fsm.read() == WRITE_BC_TRT_LOCK)) and - not m_trt.full(index); - - bool trt_req_cas = ((r_cas_fsm.read() == CAS_MISS_TRT_LOCK) or - (r_cas_fsm.read() == CAS_BC_TRT_LOCK)) and - not m_trt.full(index); - - bool trt_req_config = (r_config_fsm.read() == CONFIG_TRT_LOCK) and - not m_trt.full(index); - - bool trt_req_ixr_cmd = (r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or + // Compute requests for the 7 FSMS + bool trt_req_read = (r_read_fsm.read() == READ_TRT_LOCK); + bool trt_req_write = (r_write_fsm.read() == WRITE_MISS_TRT_LOCK) or + (r_write_fsm.read() == WRITE_BC_TRT_LOCK); + bool trt_req_cas = (r_cas_fsm.read() == CAS_MISS_TRT_LOCK) or + (r_cas_fsm.read() == CAS_BC_TRT_LOCK); + bool trt_req_config = (r_config_fsm.read() == CONFIG_TRT_LOCK); + bool trt_req_ixr_cmd = (r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_TRT) or - (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or - (r_ixr_cmd_fsm.read() == IXR_CMD_XRAM_TRT) or + (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or + (r_ixr_cmd_fsm.read() == IXR_CMD_XRAM_TRT) or (r_ixr_cmd_fsm.read() == IXR_CMD_CONFIG_TRT); - bool trt_req_ixr_rsp = (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ); - bool trt_req_xram_rsp = (r_xram_rsp_fsm.read() == XRAM_RSP_TRT_COPY); + // Compute trt_allocate, that is actually a release condition: + // allocation can be done if owner FSM does not use the TRT bool trt_allocate = false; - - // compute allocation condition: - // allocation is done if owner FSM does not use the TRT + int trt_last; switch(r_alloc_trt_fsm.read()) { @@ -8098,6 +8105,6 @@ (r_read_fsm.read() != READ_TRT_SET)) { - r_alloc_trt_last = ALLOC_TRT_READ; - trt_allocate = true; + trt_last = ALLOC_TRT_READ; + trt_allocate = true; } break; @@ -8110,6 +8117,6 @@ (r_write_fsm.read() != WRITE_BC_DIR_INVAL)) { - r_alloc_trt_last = ALLOC_TRT_WRITE; - trt_allocate = true; + trt_last = ALLOC_TRT_WRITE; + trt_allocate = true; } break; @@ -8121,6 +8128,6 @@ (r_cas_fsm.read() != CAS_BC_DIR_INVAL)) { - r_alloc_trt_last = ALLOC_TRT_CAS; - trt_allocate = true; + trt_last = ALLOC_TRT_CAS; + trt_allocate = true; } break; @@ -8129,6 +8136,6 @@ (r_config_fsm.read() != CONFIG_TRT_SET)) { - r_alloc_trt_last = ALLOC_TRT_CONFIG; - trt_allocate = true; + trt_last = ALLOC_TRT_CONFIG; + trt_allocate = true; } break; @@ -8140,5 +8147,6 @@ (r_ixr_cmd_fsm.read() != IXR_CMD_CONFIG_TRT)) { - trt_allocate = true; + trt_last = r_alloc_trt_last.read(); + trt_allocate = true; } break; @@ -8149,5 +8157,6 @@ (r_xram_rsp_fsm.read() != XRAM_RSP_TRT_DIRTY)) { - trt_allocate = true; + trt_last = r_alloc_trt_last.read(); + trt_allocate = true; } break; @@ -8156,11 +8165,15 @@ (r_ixr_rsp_fsm.read() != IXR_RSP_TRT_READ)) { - trt_allocate = true; + trt_last = r_alloc_trt_last.read(); + trt_allocate = true; } } // end switch on r_alloc_trt_fsm - // allocate if required + // set r_alloc_trt_fsm and r_alloc_trt_last registers if required if ( trt_allocate ) { + // register last owner for round-robin + r_alloc_trt_last = trt_last; + // static priorities for XRAM_RSP > IXR_RSP > IXR_CMD if ( trt_req_xram_rsp ) r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP; @@ -8169,5 +8182,5 @@ // round robin priorities for READ / WRITE / CAS / CONFIG - else if ( r_alloc_trt_last.read() == ALLOC_TRT_READ ) + else if ( trt_last == ALLOC_TRT_READ ) { if ( trt_req_write ) r_alloc_trt_fsm = ALLOC_TRT_WRITE; @@ -8176,5 +8189,5 @@ else if ( trt_req_read ) r_alloc_trt_fsm = ALLOC_TRT_READ; } - else if ( r_alloc_trt_last.read() == ALLOC_TRT_WRITE ) + else if ( trt_last == ALLOC_TRT_WRITE ) { if ( trt_req_cas ) r_alloc_trt_fsm = ALLOC_TRT_CAS; @@ -8183,5 +8196,5 @@ else if ( trt_req_write ) r_alloc_trt_fsm = ALLOC_TRT_WRITE; } - else if ( r_alloc_trt_last.read() == ALLOC_TRT_CAS ) + else if ( trt_last == ALLOC_TRT_CAS ) { if ( trt_req_config ) r_alloc_trt_fsm = ALLOC_TRT_CONFIG; @@ -8190,5 +8203,5 @@ else if ( trt_req_cas ) r_alloc_trt_fsm = ALLOC_TRT_CAS; } - else if ( r_alloc_trt_last.read() == ALLOC_TRT_CONFIG ) + else if ( trt_last == ALLOC_TRT_CONFIG ) { if ( trt_req_read ) r_alloc_trt_fsm = ALLOC_TRT_READ; @@ -8209,9 +8222,15 @@ ///////////////////////////////////////////////////////////////////////////////////// - //std::cout << std::endl << "alloc_heap_fsm" << std::endl; + // compute requests for the 6 FSMs + bool req_heap_read = (r_read_fsm.read() == READ_HEAP_REQ); + bool req_heap_write = (r_write_fsm.read() == WRITE_UPT_HEAP_LOCK); + bool req_heap_cas = (r_cas_fsm.read() == CAS_UPT_HEAP_LOCK); + bool req_heap_cleanup = (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ); + bool req_heap_xram_rsp = (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ); + bool req_heap_config = (r_config_fsm.read() == CONFIG_HEAP_REQ); switch (r_alloc_heap_fsm.read()) { - //////////////////// + ////////////////////// case ALLOC_HEAP_RESET: // Initializes the heap one ENTRY each cycle. @@ -8227,28 +8246,19 @@ break; - //////////////////// + ///////////////////// case ALLOC_HEAP_READ: - if ((r_read_fsm.read() != READ_HEAP_REQ) and - (r_read_fsm.read() != READ_HEAP_LOCK) and - (r_read_fsm.read() != READ_HEAP_ERASE)) - { - if (r_write_fsm.read() == WRITE_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_WRITE; - - else if (r_cas_fsm.read() == CAS_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_CAS; - - else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; - - else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; - - else if (r_config_fsm.read() == CONFIG_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; - } - break; - - ///////////////////// + if ((r_read_fsm.read() != READ_HEAP_REQ) and + (r_read_fsm.read() != READ_HEAP_LOCK) and + (r_read_fsm.read() != READ_HEAP_ERASE)) + { + if (req_heap_write) r_alloc_heap_fsm = ALLOC_HEAP_WRITE; + else if (req_heap_cas) r_alloc_heap_fsm = ALLOC_HEAP_CAS; + else if (req_heap_cleanup) r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; + else if (req_heap_xram_rsp) r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; + else if (req_heap_config) r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; + } + break; + + ///////////////////// case ALLOC_HEAP_WRITE: if ((r_write_fsm.read() != WRITE_UPT_HEAP_LOCK) and @@ -8256,22 +8266,13 @@ (r_write_fsm.read() != WRITE_UPT_NEXT)) { - if (r_cas_fsm.read() == CAS_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_CAS; - - else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; - - else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; - - else if (r_config_fsm.read() == CONFIG_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; - - else if (r_read_fsm.read() == READ_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_READ; - } - break; - - //////////////////// + if (req_heap_cas) r_alloc_heap_fsm = ALLOC_HEAP_CAS; + else if (req_heap_cleanup) r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; + else if (req_heap_xram_rsp) r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; + else if (req_heap_config) r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; + else if (req_heap_read) r_alloc_heap_fsm = ALLOC_HEAP_READ; + } + break; + + //////////////////// case ALLOC_HEAP_CAS: if ((r_cas_fsm.read() != CAS_UPT_HEAP_LOCK) and @@ -8279,22 +8280,13 @@ (r_cas_fsm.read() != CAS_UPT_NEXT)) { - if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; - - else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; - - else if (r_config_fsm.read() == CONFIG_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; - - else if (r_read_fsm.read() == READ_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_READ; - - else if (r_write_fsm.read() == WRITE_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_WRITE; - } - break; - - /////////////////////// + if (req_heap_cleanup) r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; + else if (req_heap_xram_rsp) r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; + else if (req_heap_config) r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; + else if (req_heap_read) r_alloc_heap_fsm = ALLOC_HEAP_READ; + else if (req_heap_write) r_alloc_heap_fsm = ALLOC_HEAP_WRITE; + } + break; + + //////////////////////// case ALLOC_HEAP_CLEANUP: if ((r_cleanup_fsm.read() != CLEANUP_HEAP_REQ) and @@ -8303,63 +8295,35 @@ (r_cleanup_fsm.read() != CLEANUP_HEAP_CLEAN)) { - if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; - - else if (r_config_fsm.read() == CONFIG_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; - - else if (r_read_fsm.read() == READ_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_READ; - - else if (r_write_fsm.read() == WRITE_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_WRITE; - - else if (r_cas_fsm.read() == CAS_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_CAS; - } - break; - - //////////////////////// + if (req_heap_xram_rsp) r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; + else if (req_heap_config) r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; + else if (req_heap_read) r_alloc_heap_fsm = ALLOC_HEAP_READ; + else if (req_heap_write) r_alloc_heap_fsm = ALLOC_HEAP_WRITE; + else if (req_heap_cas) r_alloc_heap_fsm = ALLOC_HEAP_CAS; + } + break; + + //////////////////////// case ALLOC_HEAP_XRAM_RSP: if ((r_xram_rsp_fsm.read() != XRAM_RSP_HEAP_REQ) and (r_xram_rsp_fsm.read() != XRAM_RSP_HEAP_ERASE)) { - if (r_config_fsm.read() == CONFIG_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; - - else if (r_read_fsm.read() == READ_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_READ; - - else if (r_write_fsm.read() == WRITE_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_WRITE; - - else if (r_cas_fsm.read() == CAS_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_CAS; - - else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; - - } - break; - - /////////////////////// + if (req_heap_config) r_alloc_heap_fsm = ALLOC_HEAP_CONFIG; + else if (req_heap_read) r_alloc_heap_fsm = ALLOC_HEAP_READ; + else if (req_heap_write) r_alloc_heap_fsm = ALLOC_HEAP_WRITE; + else if (req_heap_cas) r_alloc_heap_fsm = ALLOC_HEAP_CAS; + else if (req_heap_cleanup) r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; + } + break; + + /////////////////////// case ALLOC_HEAP_CONFIG: if ((r_config_fsm.read() != CONFIG_HEAP_REQ) and (r_config_fsm.read() != CONFIG_HEAP_SCAN)) { - if (r_read_fsm.read() == READ_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_READ; - - else if (r_write_fsm.read() == WRITE_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_WRITE; - - else if (r_cas_fsm.read() == CAS_UPT_HEAP_LOCK) - r_alloc_heap_fsm = ALLOC_HEAP_CAS; - - else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; - - else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ) - r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; + if (req_heap_read) r_alloc_heap_fsm = ALLOC_HEAP_READ; + else if (req_heap_write) r_alloc_heap_fsm = ALLOC_HEAP_WRITE; + else if (req_heap_cas) r_alloc_heap_fsm = ALLOC_HEAP_CAS; + else if (req_heap_cleanup) r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP; + else if (req_heap_xram_rsp) r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP; } break; @@ -8367,5 +8331,4 @@ } // end switch alloc_heap_fsm - //std::cout << std::endl << "fifo_update" << std::endl; /////////////////////////////////////////////////////////////////////