Index: /trunk/platforms/tsar_generic_iob/arch.py =================================================================== --- /trunk/platforms/tsar_generic_iob/arch.py (revision 1049) +++ /trunk/platforms/tsar_generic_iob/arch.py (revision 1050) @@ -65,6 +65,9 @@ ### define architecture constants - nb_nics = 1 - nb_cmas = 4 + if ( x_size * y_size >= 4 ) : nb_nics = 4 + elif ( x_size * y_size == 2 ) : nb_nics = 2 + else : nb_nics = 1 + + nb_cmas = 1 x_io = 0 y_io = 0 @@ -124,5 +127,5 @@ nic_base = 0x00B5000000 - nic_size = 0x80000 # 512 kbytes + nic_size = 0x1000 # 4 Kkbytes cma_base = 0x00B6000000 @@ -171,5 +174,5 @@ kernel_heap_vbase = 0xD0000000 - kernel_heap_size = 0x00400000 # 4 Mbytes per cluster + kernel_heap_size = 0x00200000 # 2 Mbytes per cluster kernel_sched_vbase = 0xA0000000 @@ -267,30 +270,39 @@ ptype = 'PIC', channels = 32 ) + if ( ioc_type == 'BDV' ): isr_ioc = 'ISR_BDV' + if ( ioc_type == 'HBA' ): isr_ioc = 'ISR_HBA' + if ( ioc_type == 'SDC' ): isr_ioc = 'ISR_SDC' + if ( ioc_type == 'SPI' ): isr_ioc = 'ISR_SPI' + mapping.addIrq( pic, index = 0, src = nic, isrtype = 'ISR_NIC_RX', channel = 0 ) mapping.addIrq( pic, index = 1, src = nic, isrtype = 'ISR_NIC_RX', channel = 1 ) - mapping.addIrq( pic, index = 2, src = nic, + isrtype = 'ISR_NIC_RX', channel = 2 ) + mapping.addIrq( pic, index = 3, src = nic, + isrtype = 'ISR_NIC_RX', channel = 3 ) + + mapping.addIrq( pic, index = 4, src = nic, isrtype = 'ISR_NIC_TX', channel = 0 ) - mapping.addIrq( pic, index = 3, src = nic, + mapping.addIrq( pic, index = 5, src = nic, isrtype = 'ISR_NIC_TX', channel = 1 ) - - mapping.addIrq( pic, index = 4, src = cma, + mapping.addIrq( pic, index = 6, src = nic, + isrtype = 'ISR_NIC_TX', channel = 2 ) + mapping.addIrq( pic, index = 7, src = nic, + isrtype = 'ISR_NIC_TX', channel = 3 ) + + mapping.addIrq( pic, index = 8 , src = cma, isrtype = 'ISR_CMA', channel = 0 ) - mapping.addIrq( pic, index = 5, src = cma, + mapping.addIrq( pic, index = 9 , src = cma, isrtype = 'ISR_CMA', channel = 1 ) - mapping.addIrq( pic, index = 6, src = cma, + mapping.addIrq( pic, index = 10, src = cma, isrtype = 'ISR_CMA', channel = 2 ) - mapping.addIrq( pic, index = 7, src = cma, + mapping.addIrq( pic, index = 11, src = cma, isrtype = 'ISR_CMA', channel = 3 ) - if ( ioc_type == 'BDV' ): isr_ioc = 'ISR_BDV' - if ( ioc_type == 'HBA' ): isr_ioc = 'ISR_HBA' - if ( ioc_type == 'SDC' ): isr_ioc = 'ISR_SDC' - if ( ioc_type == 'SPI' ): isr_ioc = 'ISR_SPI' - - mapping.addIrq( pic, index = 8, src = ioc, + mapping.addIrq( pic, index = 12, src = ioc, isrtype = isr_ioc, channel = 0 ) + mapping.addIrq( pic, index = 16, src = tty, isrtype = 'ISR_TTY_RX', channel = 0 ) Index: /trunk/platforms/tsar_generic_iob/arch_info.py =================================================================== --- /trunk/platforms/tsar_generic_iob/arch_info.py (revision 1049) +++ /trunk/platforms/tsar_generic_iob/arch_info.py (revision 1050) @@ -29,5 +29,4 @@ # - nb_ttys : number of TTY channels (can be from 1 to 8) # - nb_nics : number of NIC channels (from 1 to 2) -# - nb_cmas : number of CMA channels (from 1 to 4) # - fbf_width : frame_buffer width = frame_buffer heigth # - ioc_type : can be 'IOC_BDV','IOC_HBA','IOC_SDC', 'IOC_SPI','NONE' @@ -35,4 +34,5 @@ # - io_cxy : IO cluster identifier # - boot_cxy : boot cluster identifier +# - cache_line : number of bytes in cache line (in 16,32,64) # # The following parameters are imposed by the "tsar_generic_iob" architecture: @@ -51,10 +51,10 @@ nb_ttys = 1, nb_nics = 1, - nb_cmas = 2, fbf_width = 128, ioc_type = 'IOC_BDV', mwr_type = 'MWR_CPY', io_cxy = 0, - boot_cxy = 0 ): + boot_cxy = 0, + cache_line = 64): ### architecture constants @@ -81,6 +81,4 @@ assert( (nb_nics >= 1) and (nb_nics <= 2) ) - assert( (nb_cmas >= 1) and (nb_cmas <= 4) ) - assert( ioc_type in ['IOC_BDV','IOC_HBA','IOC_SDC','IOC_SPI','IOC_RDK'] ) @@ -90,4 +88,6 @@ assert( ((boot_cxy >> y_width) < x_size) and ((boot_cxy & ((1<= NB_PROCS_MAX) -// - NB_TTY_CHANNELS : number of TTY channels in I/O network (up to 16) -// - NB_NIC_CHANNELS : number of NIC channels in I/O network (up to 2) -// - NB_CMA_CHANNELS : number of CMA channels in I/O network (up to 4) +// - NB_TXT_CHANNELS : number of TTY channels in I/O network (up to 16) +// - NB_NIC_CHANNELS : number of NIC channels in I/O network (up to 4) // - FBUF_X_SIZE : width of frame buffer (pixels) // - FBUF_Y_SIZE : heigth of frame buffer (lines) -// - XCU_NB_HWI : number of XCU HWIs (>= NB_PROCS_MAX + 1) -// - XCU_NB_PTI : number of XCU PTIs (>= NB_PROCS_MAX) -// - XCU_NB_WTI : number of XCU WTIs (>= 4*NB_PROCS_MAX) -// - XCU_NB_OUT : number of XCU output IRQs (>= 4*NB_PROCS_MAX) +// - ICU_NB_HWI : number of ICU HWIs (>= NB_PROCS_MAX + 1) +// - ICU_NB_PTI : number of ICU PTIs (>= NB_PROCS_MAX) +// - ICU_NB_WTI : number of ICU WTIs (>= 4*NB_PROCS_MAX) +// - ICU_NB_OUT : number of ICU output IRQs (>= 4*NB_PROCS_MAX) // - USE_IOC_XYZ : IOC type (XYZ in HBA / BDV / SDC) // @@ -119,4 +117,8 @@ // |X_ID|Y_ID| L_ID | // | 4 | 4 | 6 | +// +// The NIC controler has one VCI target port, and one VCI initiator port, +// but it uses two different LOCAL_SRCID values to distinguish TX and TX +// transactions, because there is not enough bits in 4 bits TRDID field. ///////////////////////////////////////////////////////////////////////// @@ -132,10 +134,8 @@ #include "mapping_table.h" - - #include "tsar_iob_cluster.h" #include "vci_chbuf_dma.h" #include "vci_multi_tty.h" -#include "vci_multi_nic.h" +#include "vci_master_nic.h" #include "vci_simple_rom.h" #include "vci_multi_ahci.h" @@ -229,4 +229,7 @@ #define MEMC_SETS 256 +#define MNIC_MAC_4 0x33445566 // 32 LSB bits +#define MNIC_MAC_2 0X1122 // 16 MSB bits + #define L1_IWAYS 4 #define L1_ISETS 64 @@ -264,5 +267,5 @@ // All initiators are in the same indexing space (14 bits). // The SRCID is structured in two fields: -// - The 8 MSB bits define the cluster index (left aligned) +// - The 8 MSB bits define the cluster index. // - The 6 LSB bits define the local index. // Two different initiators cannot have the same SRCID, but a given @@ -285,7 +288,8 @@ #define IOBX_LOCAL_SRCID 0x9 #define MEMC_LOCAL_SRCID 0xA -#define CDMA_LOCAL_SRCID 0xB #define DISK_LOCAL_SRCID 0xC #define IOPI_LOCAL_SRCID 0xD +#define MNRX_LOCAL_SRCID 0xE // NIC_RX transactions +#define MNTX_LOCAL_SRCID 0xF // NIC_TX transactions /////////////////////////////////////////////////////////////////////// @@ -318,14 +322,13 @@ #define IOX_DISK_TGT_ID 1 #define IOX_MNIC_TGT_ID 2 -#define IOX_CDMA_TGT_ID 3 -#define IOX_BROM_TGT_ID 4 -#define IOX_MTTY_TGT_ID 5 -#define IOX_IOPI_TGT_ID 6 -#define IOX_IOB0_TGT_ID 7 -#define IOX_IOB1_TGT_ID 8 +#define IOX_BROM_TGT_ID 3 +#define IOX_MTTY_TGT_ID 4 +#define IOX_IOPI_TGT_ID 5 +#define IOX_IOB0_TGT_ID 6 +#define IOX_IOB1_TGT_ID 7 #define IOX_DISK_INI_ID 0 -#define IOX_CDMA_INI_ID 1 -#define IOX_IOPI_INI_ID 2 +#define IOX_IOPI_INI_ID 1 +#define IOX_MNIC_INI_ID 2 #define IOX_IOB0_INI_ID 3 #define IOX_IOB1_INI_ID 4 @@ -454,24 +457,21 @@ "Error in tsar_generic_iob : NB_PROCS_MAX parameter cannot be larger than 8" ); - assert( (XCU_NB_HWI > NB_PROCS_MAX) and - "Error in tsar_generic_iob : XCU_NB_HWI must be larger than NB_PROCS_MAX" ); - - assert( (XCU_NB_PTI >= NB_PROCS_MAX) and - "Error in tsar_generic_iob : XCU_NB_PTI cannot be smaller than NB_PROCS_MAX" ); - - assert( (XCU_NB_WTI >= 4*NB_PROCS_MAX) and - "Error in tsar_generic_iob : XCU_NB_WTI cannot be smaller than 4*NB_PROCS_MAX" ); - - assert( (XCU_NB_OUT >= 4*NB_PROCS_MAX) and - "Error in tsar_generic_iob : XCU_NB_OUT cannot be smaller than 4*NB_PROCS_MAX" ); + assert( (ICU_NB_HWI > NB_PROCS_MAX) and + "Error in tsar_generic_iob : ICU_NB_HWI cannot be smaller than NB_PROCS_MAX" ); + + assert( (ICU_NB_PTI >= NB_PROCS_MAX) and + "Error in tsar_generic_iob : ICU_NB_PTI cannot be smaller than NB_PROCS_MAX" ); + + assert( (ICU_NB_WTI >= 4*NB_PROCS_MAX) and + "Error in tsar_generic_iob : ICU_NB_WTI cannot be smaller than 4*NB_PROCS_MAX" ); + + assert( (ICU_NB_OUT >= 4*NB_PROCS_MAX) and + "Error in tsar_generic_iob : ICU_NB_OUT cannot be smaller than 4*NB_PROCS_MAX" ); - assert( (NB_TTY_CHANNELS >= 1) and (NB_TTY_CHANNELS <= 16) and - "Error in tsar_generic_iob : NB_TTY_CHANNELS parameter cannot be larger than 16" ); - - assert( (NB_NIC_CHANNELS <= 2) and - "Error in tsar_generic_iob : NB_NIC_CHANNELS parameter cannot be larger than 2" ); - - assert( (NB_CMA_CHANNELS <= 4) and - "Error in tsar_generic_iob : NB_CMA_CHANNELS parameter cannot be larger than 4" ); + assert( (NB_TXT_CHANNELS >= 1) and (NB_TXT_CHANNELS <= 16) and + "Error in tsar_generic_iob : NB_TXT_CHANNELS parameter cannot be larger than 16" ); + + assert( (NB_NIC_CHANNELS <= 4) and + "Error in tsar_generic_iob : NB_NIC_CHANNELS parameter cannot be larger than 4" ); assert( (X_WIDTH == 4) and (Y_WIDTH == 4) and @@ -488,7 +488,6 @@ << " - YMAX = " << YMAX << std::endl << " - NB_PROCS_MAX = " << NB_PROCS_MAX << std::endl - << " - NB_TTY_CHANNELS = " << NB_TTY_CHANNELS << std::endl + << " - NB_TXT_CHANNELS = " << NB_TXT_CHANNELS << std::endl << " - NB_NIC_CHANNELS = " << NB_NIC_CHANNELS << std::endl - << " - NB_CMA_CHANNELS = " << NB_CMA_CHANNELS << std::endl << " - MEMC_WAYS = " << MEMC_WAYS << std::endl << " - MEMC_SETS = " << MEMC_SETS << std::endl @@ -568,5 +567,5 @@ std::ostringstream sxicu; sxicu << "int_seg_xicu_" << x << "_" << y; - maptab_int.add(Segment(sxicu.str(), SEG_XCU_BASE+offset, SEG_XCU_SIZE, + maptab_int.add(Segment(sxicu.str(), SEG_ICU_BASE+offset, SEG_ICU_SIZE, IntTab(cluster(x,y), INT_XICU_TGT_ID), not cacheable)); @@ -587,5 +586,5 @@ std::ostringstream stty; stty << "int_seg_mtty_" << x << "_" << y; - maptab_int.add(Segment(stty.str(), SEG_TTY_BASE+offset, SEG_TTY_SIZE, + maptab_int.add(Segment(stty.str(), SEG_TXT_BASE+offset, SEG_TXT_SIZE, IntTab(cluster(x,y), INT_IOBX_TGT_ID), not cacheable)); @@ -609,9 +608,4 @@ maptab_int.add(Segment(srom.str(), SEG_ROM_BASE+offset, SEG_ROM_SIZE, IntTab(cluster(x,y), INT_IOBX_TGT_ID), cacheable )); - - std::ostringstream sdma; - sdma << "int_seg_cdma_" << x << "_" << y; - maptab_int.add(Segment(sdma.str(), SEG_CMA_BASE+offset, SEG_CMA_SIZE, - IntTab(cluster(x,y), INT_IOBX_TGT_ID), not cacheable)); std::ostringstream spic; @@ -669,11 +663,7 @@ // This define the mapping between the initiators SRCID // and the port index on the RAM local interconnect. - // External initiator have two alias SRCID (iob0 / iob1) - - maptab_ram.srcid_map( IntTab( cluster_iob0, CDMA_LOCAL_SRCID ), - IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); - - maptab_ram.srcid_map( IntTab( cluster_iob1, CDMA_LOCAL_SRCID ), - IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); + // This routing table is used to route the response to the + // relevant initiator: external peripherals transactions + // use IOBX port, while MEMC transactions use MEMC port. maptab_ram.srcid_map( IntTab( cluster_iob0, DISK_LOCAL_SRCID ), @@ -689,4 +679,16 @@ IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); + maptab_ram.srcid_map( IntTab( cluster_iob0, MNRX_LOCAL_SRCID ), + IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); + + maptab_ram.srcid_map( IntTab( cluster_iob1, MNRX_LOCAL_SRCID ), + IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); + + maptab_ram.srcid_map( IntTab( cluster_iob0, MNTX_LOCAL_SRCID ), + IntTab( cluster_iob0, RAM_IOBX_INI_ID ) ); + + maptab_ram.srcid_map( IntTab( cluster_iob1, MNTX_LOCAL_SRCID ), + IntTab( cluster_iob1, RAM_IOBX_INI_ID ) ); + maptab_ram.srcid_map( IntTab( cluster_iob0, MEMC_LOCAL_SRCID ), IntTab( cluster_iob0, RAM_MEMC_INI_ID ) ); @@ -699,8 +701,8 @@ /////////////////////////////////////////////////////////////////////// // IOX network mapping table - // - two levels address decoding for commands (9, 7) bits + // - two levels address decoding for commands // - two levels srcid decoding for responses - // - 5 initiators (IOB0, IOB1, DISK, CDMA, IOPI) - // - 9 targets (IOB0, IOB1, DISK, CDMA, MTTY, FBUF, BROM, MNIC, IOPI) + // - 5 initiators (IOB0, IOB1, DISK, MNIC, IOPI) + // - 8 targets (IOB0, IOB1, DISK, MTTY, FBUF, BROM, MNIC, IOPI) // // Address bit 32 is used to determine if a command must be routed to @@ -720,5 +722,5 @@ << (vci_address_width - x_width - y_width); - maptab_iox.add(Segment("iox_seg_mtty_0", SEG_TTY_BASE + iob0_base, SEG_TTY_SIZE, + maptab_iox.add(Segment("iox_seg_mtty_0", SEG_TXT_BASE + iob0_base, SEG_TXT_SIZE, IntTab(0, IOX_MTTY_TGT_ID), false)); maptab_iox.add(Segment("iox_seg_fbuf_0", SEG_FBF_BASE + iob0_base, SEG_FBF_SIZE, @@ -728,6 +730,4 @@ maptab_iox.add(Segment("iox_seg_mnic_0", SEG_NIC_BASE + iob0_base, SEG_NIC_SIZE, IntTab(0, IOX_MNIC_TGT_ID), false)); - maptab_iox.add(Segment("iox_seg_cdma_0", SEG_CMA_BASE + iob0_base, SEG_CMA_SIZE, - IntTab(0, IOX_CDMA_TGT_ID), false)); maptab_iox.add(Segment("iox_seg_brom_0", SEG_ROM_BASE + iob0_base, SEG_ROM_SIZE, IntTab(0, IOX_BROM_TGT_ID), false)); @@ -740,5 +740,5 @@ << (vci_address_width - x_width - y_width); - maptab_iox.add(Segment("iox_seg_mtty_1", SEG_TTY_BASE + iob1_base, SEG_TTY_SIZE, + maptab_iox.add(Segment("iox_seg_mtty_1", SEG_TXT_BASE + iob1_base, SEG_TXT_SIZE, IntTab(0, IOX_MTTY_TGT_ID), false)); maptab_iox.add(Segment("iox_seg_fbuf_1", SEG_FBF_BASE + iob1_base, SEG_FBF_SIZE, @@ -748,6 +748,4 @@ maptab_iox.add(Segment("iox_seg_mnic_1", SEG_NIC_BASE + iob1_base, SEG_NIC_SIZE, IntTab(0, IOX_MNIC_TGT_ID), false)); - maptab_iox.add(Segment("iox_seg_cdma_1", SEG_CMA_BASE + iob1_base, SEG_CMA_SIZE, - IntTab(0, IOX_CDMA_TGT_ID), false)); maptab_iox.add(Segment("iox_seg_brom_1", SEG_ROM_BASE + iob1_base, SEG_ROM_SIZE, IntTab(0, IOX_BROM_TGT_ID), false)); @@ -770,5 +768,5 @@ << (vci_address_width-x_width-y_width); - const uint64_t xicu_base = SEG_XCU_BASE + offset; + const uint64_t xicu_base = SEG_ICU_BASE + offset; if ( (y & 0x1) == 0 ) // use IOB0 @@ -776,10 +774,10 @@ std::ostringstream sxcu0; sxcu0 << "iox_seg_xcu0_" << x << "_" << y; - maptab_iox.add(Segment(sxcu0.str(), xicu_base, SEG_XCU_SIZE, + maptab_iox.add(Segment(sxcu0.str(), xicu_base, SEG_ICU_SIZE, IntTab(0, IOX_IOB0_TGT_ID), not cacheable, wti)); std::ostringstream siob0; siob0 << "iox_seg_ram0_" << x << "_" << y; - maptab_iox.add(Segment(siob0.str(), offset, SEG_XCU_BASE, + maptab_iox.add(Segment(siob0.str(), offset, SEG_ICU_BASE, IntTab(0, IOX_IOB0_TGT_ID), not cacheable, not wti)); } @@ -788,10 +786,10 @@ std::ostringstream sxcu1; sxcu1 << "iox_seg_xcu1_" << x << "_" << y; - maptab_iox.add(Segment(sxcu1.str(), xicu_base, SEG_XCU_SIZE, + maptab_iox.add(Segment(sxcu1.str(), xicu_base, SEG_ICU_SIZE, IntTab(0, IOX_IOB1_TGT_ID), not cacheable, wti)); std::ostringstream siob1; siob1 << "iox_seg_ram1_" << x << "_" << y; - maptab_iox.add(Segment(siob1.str(), offset, SEG_XCU_BASE, + maptab_iox.add(Segment(siob1.str(), offset, SEG_ICU_BASE, IntTab(0, IOX_IOB1_TGT_ID), not cacheable, not wti)); } @@ -800,14 +798,20 @@ // This define the mapping between the external initiators (SRCID) - // and the port index on the IOX local interconnect. - - maptab_iox.srcid_map( IntTab( 0, CDMA_LOCAL_SRCID ) , - IntTab( 0, IOX_CDMA_INI_ID ) ); + // and the initiator port index on the IOX local interconnect. + maptab_iox.srcid_map( IntTab( 0, DISK_LOCAL_SRCID ) , IntTab( 0, IOX_DISK_INI_ID ) ); + maptab_iox.srcid_map( IntTab( 0, IOPI_LOCAL_SRCID ) , IntTab( 0, IOX_IOPI_INI_ID ) ); + maptab_iox.srcid_map( IntTab( 0, IOX_IOB0_INI_ID ) , IntTab( 0, IOX_IOB0_INI_ID ) ); + + maptab_iox.srcid_map( IntTab( 0, MNRX_LOCAL_SRCID ) , + IntTab( 0, IOX_MNIC_INI_ID ) ); + + maptab_iox.srcid_map( IntTab( 0, MNTX_LOCAL_SRCID ) , + IntTab( 0, IOX_MNIC_INI_ID ) ); if ( cluster_iob0 != cluster_iob1 ) @@ -828,8 +832,7 @@ sc_signal signal_irq_false; sc_signal signal_irq_disk; - sc_signal signal_irq_mtty_rx[NB_TTY_CHANNELS]; + sc_signal signal_irq_mtty_rx[NB_TXT_CHANNELS]; sc_signal signal_irq_mnic_rx[NB_NIC_CHANNELS]; sc_signal signal_irq_mnic_tx[NB_NIC_CHANNELS]; - sc_signal signal_irq_cdma[NB_CMA_CHANNELS]; // VCI signals for IOX network @@ -837,6 +840,6 @@ VciSignals signal_vci_ini_iob1("signal_vci_ini_iob1"); VciSignals signal_vci_ini_disk("signal_vci_ini_disk"); - VciSignals signal_vci_ini_cdma("signal_vci_ini_cdma"); VciSignals signal_vci_ini_iopi("signal_vci_ini_iopi"); + VciSignals signal_vci_ini_mnic("signal_vci_ini_mnic"); VciSignals signal_vci_tgt_iob0("signal_vci_tgt_iob0"); @@ -847,5 +850,4 @@ VciSignals signal_vci_tgt_brom("signal_vci_tgt_brom"); VciSignals signal_vci_tgt_disk("signal_vci_tgt_disk"); - VciSignals signal_vci_tgt_cdma("signal_vci_tgt_cdma"); VciSignals signal_vci_tgt_iopi("signal_vci_tgt_iopi"); @@ -1006,5 +1008,5 @@ const size_t nb_iox_initiators = (cluster_iob0 != cluster_iob1) ? 5 : 4; - const size_t nb_iox_targets = (cluster_iob0 != cluster_iob1) ? 9 : 8; + const size_t nb_iox_targets = (cluster_iob0 != cluster_iob1) ? 8 : 7; // IOX network @@ -1020,14 +1022,17 @@ maptab_iox, loader ); - // Network Controller - VciMultiNic* mnic; - mnic = new VciMultiNic( "mnic", - IntTab(0, IOX_MNIC_TGT_ID), - maptab_iox, - NB_NIC_CHANNELS, - 0, // mac_4 address - 0, // mac_2 address - 1, // NIC_MODE_SYNTHESIS - 12); // INTER_FRAME_GAP + // Ethernet Controller + VciMasterNic* mnic; + mnic = new VciMasterNic( "mnic", + maptab_iox, + IntTab(0, MNRX_LOCAL_SRCID), + IntTab(0, MNTX_LOCAL_SRCID), + IntTab(0, IOX_MNIC_TGT_ID), + NB_NIC_CHANNELS, + 64, // burst length + MNIC_MAC_4, // default MAC address (LSB) + MNIC_MAC_2, // default MAC address (MSB) + 1, // NIC_MODE_SYNTHESIS + 12); // INTER_FRAME_GAP // Frame Buffer @@ -1079,17 +1084,7 @@ #endif - // Chained Buffer DMA controller - VciChbufDma* cdma; - cdma = new VciChbufDma( "cdma", - maptab_iox, - IntTab(0, CDMA_LOCAL_SRCID), - IntTab(0, IOX_CDMA_TGT_ID), - 64, // burst size (bytes) - NB_CMA_CHANNELS, - 4 ); // number of pipelined bursts - // Multi-TTY controller std::vector vect_names; - for( size_t tid = 0 ; tid < NB_TTY_CHANNELS ; tid++ ) + for( size_t tid = 0 ; tid < NB_TXT_CHANNELS ; tid++ ) { std::ostringstream term_name; @@ -1204,8 +1199,8 @@ L1_DSETS, XRAM_LATENCY, - XCU_NB_HWI, - XCU_NB_PTI, - XCU_NB_WTI, - XCU_NB_OUT, + ICU_NB_HWI, + ICU_NB_PTI, + ICU_NB_WTI, + ICU_NB_OUT, coproc_type, @@ -1240,6 +1235,6 @@ iox_network->p_to_ini[IOX_IOB0_INI_ID] (signal_vci_ini_iob0); iox_network->p_to_ini[IOX_DISK_INI_ID] (signal_vci_ini_disk); - iox_network->p_to_ini[IOX_CDMA_INI_ID] (signal_vci_ini_cdma); iox_network->p_to_ini[IOX_IOPI_INI_ID] (signal_vci_ini_iopi); + iox_network->p_to_ini[IOX_MNIC_INI_ID] (signal_vci_ini_mnic); iox_network->p_to_tgt[IOX_IOB0_TGT_ID] (signal_vci_tgt_iob0); @@ -1249,5 +1244,4 @@ iox_network->p_to_tgt[IOX_BROM_TGT_ID] (signal_vci_tgt_brom); iox_network->p_to_tgt[IOX_DISK_TGT_ID] (signal_vci_tgt_disk); - iox_network->p_to_tgt[IOX_CDMA_TGT_ID] (signal_vci_tgt_cdma); iox_network->p_to_tgt[IOX_IOPI_TGT_ID] (signal_vci_tgt_iopi); @@ -1333,5 +1327,6 @@ mnic->p_clk (signal_clk); mnic->p_resetn (signal_resetn); - mnic->p_vci (signal_vci_tgt_mnic); + mnic->p_vci_tgt (signal_vci_tgt_mnic); + mnic->p_vci_ini (signal_vci_ini_mnic); for ( size_t i=0 ; ip_resetn (signal_resetn); mtty->p_vci (signal_vci_tgt_mtty); - for ( size_t i=0 ; ip_irq[i] (signal_irq_mtty_rx[i]); } std::cout << " - MTTY connected" << std::endl; - - // CDMA connexion - cdma->p_clk (signal_clk); - cdma->p_resetn (signal_resetn); - cdma->p_vci_target (signal_vci_tgt_cdma); - cdma->p_vci_initiator (signal_vci_ini_cdma); - for ( size_t i=0 ; i<(NB_CMA_CHANNELS) ; i++) - { - cdma->p_irq[i] (signal_irq_cdma[i]); - } - - std::cout << " - CDMA connected" << std::endl; // IOPI connexion @@ -1379,12 +1362,10 @@ { if (i < NB_NIC_CHANNELS) iopi->p_hwi[i] (signal_irq_mnic_rx[i]); - else if(i < 2 ) iopi->p_hwi[i] (signal_irq_false); - else if(i < 2+NB_NIC_CHANNELS) iopi->p_hwi[i] (signal_irq_mnic_tx[i-2]); else if(i < 4 ) iopi->p_hwi[i] (signal_irq_false); - else if(i < 4+NB_CMA_CHANNELS) iopi->p_hwi[i] (signal_irq_cdma[i-4]); - else if(i < 8) iopi->p_hwi[i] (signal_irq_false); - else if(i < 9) iopi->p_hwi[i] (signal_irq_disk); + else if(i < 4+NB_NIC_CHANNELS) iopi->p_hwi[i] (signal_irq_mnic_tx[i-4]); + else if(i < 12) iopi->p_hwi[i] (signal_irq_false); + else if(i < 13) iopi->p_hwi[i] (signal_irq_disk); else if(i < 16) iopi->p_hwi[i] (signal_irq_false); - else if(i < 16+NB_TTY_CHANNELS) iopi->p_hwi[i] (signal_irq_mtty_rx[i-16]); + else if(i < 16+NB_TXT_CHANNELS) iopi->p_hwi[i] (signal_irq_mtty_rx[i-16]); else iopi->p_hwi[i] (signal_irq_false); } @@ -1688,8 +1669,8 @@ // Monitor a specific address for one L2 cache (single word if second argument true) - // clusters[0][0]->memc->cache_monitor( 0x00FF8000ULL, false ); + // clusters[0][0]->memc->cache_monitor( 0x00007000ULL, false ); // Monitor a specific address for one XRAM - // clusters[0][0]->xram->start_monitor( 0x600800ULL , 64); + // clusters[0][0]->xram->start_monitor( 0x00007000ULL , 64); if ( debug_ok and (n > debug_from) ) @@ -1717,14 +1698,14 @@ // coprocessor in cluster(x,y) - clusters[x][y]->mwmr->print_trace(); - std::ostringstream mwmr_tgt_signame; - mwmr_tgt_signame << "[SIG]MWMR_TGT_" << x << "_" << y; - clusters[x][y]->signal_int_vci_tgt_mwmr.print_trace(mwmr_tgt_signame.str()); - std::ostringstream mwmr_ini_signame; - mwmr_ini_signame << "[SIG]MWMR_INI_" << x << "_" << y; - clusters[x][y]->signal_int_vci_ini_mwmr.print_trace(mwmr_ini_signame.str()); - if ( USE_MWR_CPY ) clusters[x][y]->cpy->print_trace(); - if ( USE_MWR_DCT ) clusters[x][y]->dct->print_trace(); - if ( USE_MWR_GCD ) clusters[x][y]->gcd->print_trace(); +// clusters[x][y]->mwmr->print_trace(); +// std::ostringstream mwmr_tgt_signame; +// mwmr_tgt_signame << "[SIG]MWMR_TGT_" << x << "_" << y; +// clusters[x][y]->signal_int_vci_tgt_mwmr.print_trace(mwmr_tgt_signame.str()); +// std::ostringstream mwmr_ini_signame; +// mwmr_ini_signame << "[SIG]MWMR_INI_" << x << "_" << y; +// clusters[x][y]->signal_int_vci_ini_mwmr.print_trace(mwmr_ini_signame.str()); +// if ( USE_MWR_CPY ) clusters[x][y]->cpy->print_trace(); +// if ( USE_MWR_DCT ) clusters[x][y]->dct->print_trace(); +// if ( USE_MWR_GCD ) clusters[x][y]->gcd->print_trace(); // local interrupts in cluster(x,y) @@ -1766,4 +1747,7 @@ // clusters[x][y]->ram_router_cmd->print_trace(); // clusters[x][y]->ram_router_rsp->print_trace(); + +// clusters[x][y]->ram_xbar_cmd->print_trace(); +// clusters[x][y]->ram_xbar_rsp->print_trace(); } @@ -1778,8 +1762,4 @@ // signal_vci_tgt_iob0.print_trace("[SIG]IOB0_IOX_TGT"); - cdma->print_trace(); - signal_vci_tgt_cdma.print_trace("[SIG]CDMA_TGT"); - signal_vci_ini_cdma.print_trace("[SIG]CDMA_INI"); - // brom->print_trace(); // signal_vci_tgt_brom.print_trace("[SIG]BROM_TGT"); @@ -1796,9 +1776,10 @@ #endif -// mnic->print_trace( 0x000 ); -// signal_vci_tgt_mnic.print_trace("[SIG]MNIC_TGT"); - - fbuf->print_trace(); - signal_vci_tgt_fbuf.print_trace("[SIG]FBUF_TGT"); + mnic->print_trace( 0 ); + signal_vci_tgt_mnic.print_trace("[SIG]MNIC_TGT"); + signal_vci_ini_mnic.print_trace("[SIG]MNIC_INI"); + +// fbuf->print_trace(); +// signal_vci_tgt_fbuf.print_trace("[SIG]FBUF_TGT"); // iopi->print_trace(); Index: /trunk/platforms/tsar_generic_iob/top.desc =================================================================== --- /trunk/platforms/tsar_generic_iob/top.desc (revision 1049) +++ /trunk/platforms/tsar_generic_iob/top.desc (revision 1050) @@ -61,5 +61,5 @@ # NIC - Uses('caba:vci_multi_nic', + Uses('caba:vci_master_nic', cell_size = vci_cell_size_ext), Index: /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h =================================================================== --- /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (revision 1049) +++ /trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/include/tsar_iob_cluster.h (revision 1050) @@ -198,9 +198,8 @@ DspinRouter* ram_router_rsp; + // IO Network Components (not instanciated in all clusters) + DspinLocalCrossbar* ram_xbar_cmd; DspinLocalCrossbar* ram_xbar_rsp; - - - // IO Network Components (not instanciated in all clusters) VciIoBridge